Dan Williams | 70c14ff | 2007-07-20 02:07:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * drivers/char/watchdog/iop_wdt.c |
| 3 | * |
| 4 | * WDT driver for Intel I/O Processors |
| 5 | * Copyright (C) 2005, Intel Corporation. |
| 6 | * |
| 7 | * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms and conditions of the GNU General Public License, |
| 11 | * version 2, as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 16 | * more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along with |
| 19 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
| 20 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
| 21 | * |
| 22 | * Curt E Bruns <curt.e.bruns@intel.com> |
| 23 | * Peter Milne <peter.milne@d-tacq.com> |
| 24 | * Dan Williams <dan.j.williams@intel.com> |
| 25 | */ |
| 26 | |
| 27 | #include <linux/module.h> |
| 28 | #include <linux/kernel.h> |
| 29 | #include <linux/fs.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/device.h> |
| 32 | #include <linux/miscdevice.h> |
| 33 | #include <linux/watchdog.h> |
| 34 | #include <linux/uaccess.h> |
| 35 | #include <asm/hardware.h> |
| 36 | |
| 37 | static int nowayout = WATCHDOG_NOWAYOUT; |
| 38 | static unsigned long wdt_status; |
| 39 | static unsigned long boot_status; |
| 40 | |
| 41 | #define WDT_IN_USE 0 |
| 42 | #define WDT_OK_TO_CLOSE 1 |
| 43 | #define WDT_ENABLED 2 |
| 44 | |
| 45 | static unsigned long iop_watchdog_timeout(void) |
| 46 | { |
| 47 | return (0xffffffffUL / get_iop_tick_rate()); |
| 48 | } |
| 49 | |
| 50 | /** |
| 51 | * wdt_supports_disable - determine if we are accessing a iop13xx watchdog |
| 52 | * or iop3xx by whether it has a disable command |
| 53 | */ |
| 54 | static int wdt_supports_disable(void) |
| 55 | { |
| 56 | int can_disable; |
| 57 | |
| 58 | if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM) |
| 59 | can_disable = 1; |
| 60 | else |
| 61 | can_disable = 0; |
| 62 | |
| 63 | return can_disable; |
| 64 | } |
| 65 | |
| 66 | static void wdt_enable(void) |
| 67 | { |
| 68 | /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF |
| 69 | * Takes approx. 10.7s to timeout |
| 70 | */ |
| 71 | write_wdtcr(IOP_WDTCR_EN_ARM); |
| 72 | write_wdtcr(IOP_WDTCR_EN); |
| 73 | } |
| 74 | |
| 75 | /* returns 0 if the timer was successfully disabled */ |
| 76 | static int wdt_disable(void) |
| 77 | { |
| 78 | /* Stop Counting */ |
| 79 | if (wdt_supports_disable()) { |
| 80 | write_wdtcr(IOP_WDTCR_DIS_ARM); |
| 81 | write_wdtcr(IOP_WDTCR_DIS); |
| 82 | clear_bit(WDT_ENABLED, &wdt_status); |
| 83 | printk(KERN_INFO "WATCHDOG: Disabled\n"); |
| 84 | return 0; |
| 85 | } else |
| 86 | return 1; |
| 87 | } |
| 88 | |
| 89 | static int iop_wdt_open(struct inode *inode, struct file *file) |
| 90 | { |
| 91 | if (test_and_set_bit(WDT_IN_USE, &wdt_status)) |
| 92 | return -EBUSY; |
| 93 | |
| 94 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); |
| 95 | |
| 96 | wdt_enable(); |
| 97 | |
| 98 | set_bit(WDT_ENABLED, &wdt_status); |
| 99 | |
| 100 | return nonseekable_open(inode, file); |
| 101 | } |
| 102 | |
| 103 | static ssize_t |
| 104 | iop_wdt_write(struct file *file, const char *data, size_t len, |
| 105 | loff_t *ppos) |
| 106 | { |
| 107 | if (len) { |
| 108 | if (!nowayout) { |
| 109 | size_t i; |
| 110 | |
| 111 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); |
| 112 | |
| 113 | for (i = 0; i != len; i++) { |
| 114 | char c; |
| 115 | |
| 116 | if (get_user(c, data + i)) |
| 117 | return -EFAULT; |
| 118 | if (c == 'V') |
| 119 | set_bit(WDT_OK_TO_CLOSE, &wdt_status); |
| 120 | } |
| 121 | } |
| 122 | wdt_enable(); |
| 123 | } |
| 124 | |
| 125 | return len; |
| 126 | } |
| 127 | |
| 128 | static struct watchdog_info ident = { |
| 129 | .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, |
| 130 | .identity = "iop watchdog", |
| 131 | }; |
| 132 | |
| 133 | static int |
| 134 | iop_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, |
| 135 | unsigned long arg) |
| 136 | { |
| 137 | int options; |
| 138 | int ret = -ENOTTY; |
| 139 | |
| 140 | switch (cmd) { |
| 141 | case WDIOC_GETSUPPORT: |
| 142 | if (copy_to_user |
| 143 | ((struct watchdog_info *)arg, &ident, sizeof ident)) |
| 144 | ret = -EFAULT; |
| 145 | else |
| 146 | ret = 0; |
| 147 | break; |
| 148 | |
| 149 | case WDIOC_GETSTATUS: |
| 150 | ret = put_user(0, (int *)arg); |
| 151 | break; |
| 152 | |
| 153 | case WDIOC_GETBOOTSTATUS: |
| 154 | ret = put_user(boot_status, (int *)arg); |
| 155 | break; |
| 156 | |
| 157 | case WDIOC_GETTIMEOUT: |
| 158 | ret = put_user(iop_watchdog_timeout(), (int *)arg); |
| 159 | break; |
| 160 | |
| 161 | case WDIOC_KEEPALIVE: |
| 162 | wdt_enable(); |
| 163 | ret = 0; |
| 164 | break; |
| 165 | |
| 166 | case WDIOC_SETOPTIONS: |
| 167 | if (get_user(options, (int *)arg)) |
| 168 | return -EFAULT; |
| 169 | |
| 170 | if (options & WDIOS_DISABLECARD) { |
| 171 | if (!nowayout) { |
| 172 | if (wdt_disable() == 0) { |
| 173 | set_bit(WDT_OK_TO_CLOSE, &wdt_status); |
| 174 | ret = 0; |
| 175 | } else |
| 176 | ret = -ENXIO; |
| 177 | } else |
| 178 | ret = 0; |
| 179 | } |
| 180 | |
| 181 | if (options & WDIOS_ENABLECARD) { |
| 182 | wdt_enable(); |
| 183 | ret = 0; |
| 184 | } |
| 185 | break; |
| 186 | } |
| 187 | |
| 188 | return ret; |
| 189 | } |
| 190 | |
| 191 | static int iop_wdt_release(struct inode *inode, struct file *file) |
| 192 | { |
| 193 | int state = 1; |
| 194 | if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) |
| 195 | if (test_bit(WDT_ENABLED, &wdt_status)) |
| 196 | state = wdt_disable(); |
| 197 | |
| 198 | /* if the timer is not disbaled reload and notify that we are still |
| 199 | * going down |
| 200 | */ |
| 201 | if (state != 0) { |
| 202 | wdt_enable(); |
| 203 | printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - " |
| 204 | "reset in %lu seconds\n", iop_watchdog_timeout()); |
| 205 | } |
| 206 | |
| 207 | clear_bit(WDT_IN_USE, &wdt_status); |
| 208 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); |
| 209 | |
| 210 | return 0; |
| 211 | } |
| 212 | |
| 213 | static const struct file_operations iop_wdt_fops = { |
| 214 | .owner = THIS_MODULE, |
| 215 | .llseek = no_llseek, |
| 216 | .write = iop_wdt_write, |
| 217 | .ioctl = iop_wdt_ioctl, |
| 218 | .open = iop_wdt_open, |
| 219 | .release = iop_wdt_release, |
| 220 | }; |
| 221 | |
| 222 | static struct miscdevice iop_wdt_miscdev = { |
| 223 | .minor = WATCHDOG_MINOR, |
| 224 | .name = "watchdog", |
| 225 | .fops = &iop_wdt_fops, |
| 226 | }; |
| 227 | |
| 228 | static int __init iop_wdt_init(void) |
| 229 | { |
| 230 | int ret; |
| 231 | |
| 232 | ret = misc_register(&iop_wdt_miscdev); |
| 233 | if (ret == 0) |
| 234 | printk("iop watchdog timer: timeout %lu sec\n", |
| 235 | iop_watchdog_timeout()); |
| 236 | |
| 237 | /* check if the reset was caused by the watchdog timer */ |
| 238 | boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0; |
| 239 | |
| 240 | /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset |
| 241 | * NOTE: An IB Reset will Reset both cores in the IOP342 |
| 242 | */ |
| 243 | write_wdtsr(IOP13XX_WDTCR_IB_RESET); |
| 244 | |
| 245 | return ret; |
| 246 | } |
| 247 | |
| 248 | static void __exit iop_wdt_exit(void) |
| 249 | { |
| 250 | misc_deregister(&iop_wdt_miscdev); |
| 251 | } |
| 252 | |
| 253 | module_init(iop_wdt_init); |
| 254 | module_exit(iop_wdt_exit); |
| 255 | |
| 256 | module_param(nowayout, int, 0); |
| 257 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"); |
| 258 | |
| 259 | MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>"); |
| 260 | MODULE_DESCRIPTION("iop watchdog timer driver"); |
| 261 | MODULE_LICENSE("GPL"); |
| 262 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |