Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 1 | /* |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 2 | * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 3 | * |
Lei Xu | a2d6d2f | 2011-02-25 14:44:23 -0800 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Freescale Semiconductor. |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 5 | * Author: Jack Lan <jack.lan@freescale.com> |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 6 | * Copyright (C) 2008 MIMOMax Wireless Ltd. |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 13 | |
Joe Perches | a737e83 | 2015-04-16 12:46:14 -0700 | [diff] [blame] | 14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 15 | |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/i2c.h> |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 20 | #include <linux/spi/spi.h> |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 21 | #include <linux/rtc.h> |
| 22 | #include <linux/bcd.h> |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 23 | #include <linux/slab.h> |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 24 | #include <linux/regmap.h> |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 25 | |
| 26 | #define DS3232_REG_SECONDS 0x00 |
| 27 | #define DS3232_REG_MINUTES 0x01 |
| 28 | #define DS3232_REG_HOURS 0x02 |
| 29 | #define DS3232_REG_AMPM 0x02 |
| 30 | #define DS3232_REG_DAY 0x03 |
| 31 | #define DS3232_REG_DATE 0x04 |
| 32 | #define DS3232_REG_MONTH 0x05 |
| 33 | #define DS3232_REG_CENTURY 0x05 |
| 34 | #define DS3232_REG_YEAR 0x06 |
| 35 | #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ |
| 36 | #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ |
| 37 | #define DS3232_REG_CR 0x0E /* Control register */ |
| 38 | # define DS3232_REG_CR_nEOSC 0x80 |
| 39 | # define DS3232_REG_CR_INTCN 0x04 |
| 40 | # define DS3232_REG_CR_A2IE 0x02 |
| 41 | # define DS3232_REG_CR_A1IE 0x01 |
| 42 | |
| 43 | #define DS3232_REG_SR 0x0F /* control/status register */ |
| 44 | # define DS3232_REG_SR_OSF 0x80 |
| 45 | # define DS3232_REG_SR_BSY 0x04 |
| 46 | # define DS3232_REG_SR_A2F 0x02 |
| 47 | # define DS3232_REG_SR_A1F 0x01 |
| 48 | |
| 49 | struct ds3232 { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 50 | struct device *dev; |
| 51 | struct regmap *regmap; |
| 52 | int irq; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 53 | struct rtc_device *rtc; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 54 | |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 55 | bool suspended; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 56 | }; |
| 57 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 58 | static int ds3232_check_rtc_status(struct device *dev) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 59 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 60 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 61 | int ret = 0; |
| 62 | int control, stat; |
| 63 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 64 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
| 65 | if (ret) |
| 66 | return ret; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 67 | |
| 68 | if (stat & DS3232_REG_SR_OSF) |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 69 | dev_warn(dev, |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 70 | "oscillator discontinuity flagged, " |
| 71 | "time unreliable\n"); |
| 72 | |
| 73 | stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); |
| 74 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 75 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
| 76 | if (ret) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 77 | return ret; |
| 78 | |
| 79 | /* If the alarm is pending, clear it before requesting |
| 80 | * the interrupt, so an interrupt event isn't reported |
| 81 | * before everything is initialized. |
| 82 | */ |
| 83 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 84 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
| 85 | if (ret) |
| 86 | return ret; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 87 | |
| 88 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); |
| 89 | control |= DS3232_REG_CR_INTCN; |
| 90 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 91 | return regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | static int ds3232_read_time(struct device *dev, struct rtc_time *time) |
| 95 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 96 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 97 | int ret; |
| 98 | u8 buf[7]; |
| 99 | unsigned int year, month, day, hour, minute, second; |
| 100 | unsigned int week, twelve_hr, am_pm; |
| 101 | unsigned int century, add_century = 0; |
| 102 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 103 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
| 104 | if (ret) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 105 | return ret; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 106 | |
| 107 | second = buf[0]; |
| 108 | minute = buf[1]; |
| 109 | hour = buf[2]; |
| 110 | week = buf[3]; |
| 111 | day = buf[4]; |
| 112 | month = buf[5]; |
| 113 | year = buf[6]; |
| 114 | |
| 115 | /* Extract additional information for AM/PM and century */ |
| 116 | |
| 117 | twelve_hr = hour & 0x40; |
| 118 | am_pm = hour & 0x20; |
| 119 | century = month & 0x80; |
| 120 | |
| 121 | /* Write to rtc_time structure */ |
| 122 | |
| 123 | time->tm_sec = bcd2bin(second); |
| 124 | time->tm_min = bcd2bin(minute); |
| 125 | if (twelve_hr) { |
| 126 | /* Convert to 24 hr */ |
| 127 | if (am_pm) |
| 128 | time->tm_hour = bcd2bin(hour & 0x1F) + 12; |
| 129 | else |
| 130 | time->tm_hour = bcd2bin(hour & 0x1F); |
| 131 | } else { |
| 132 | time->tm_hour = bcd2bin(hour); |
| 133 | } |
| 134 | |
Lei Xu | a2d6d2f | 2011-02-25 14:44:23 -0800 | [diff] [blame] | 135 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
| 136 | time->tm_wday = bcd2bin(week) - 1; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 137 | time->tm_mday = bcd2bin(day); |
Lei Xu | a2d6d2f | 2011-02-25 14:44:23 -0800 | [diff] [blame] | 138 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
| 139 | time->tm_mon = bcd2bin(month & 0x7F) - 1; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 140 | if (century) |
| 141 | add_century = 100; |
| 142 | |
| 143 | time->tm_year = bcd2bin(year) + add_century; |
| 144 | |
| 145 | return rtc_valid_tm(time); |
| 146 | } |
| 147 | |
| 148 | static int ds3232_set_time(struct device *dev, struct rtc_time *time) |
| 149 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 150 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 151 | u8 buf[7]; |
| 152 | |
| 153 | /* Extract time from rtc_time and load into ds3232*/ |
| 154 | |
| 155 | buf[0] = bin2bcd(time->tm_sec); |
| 156 | buf[1] = bin2bcd(time->tm_min); |
| 157 | buf[2] = bin2bcd(time->tm_hour); |
Lei Xu | a2d6d2f | 2011-02-25 14:44:23 -0800 | [diff] [blame] | 158 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
| 159 | buf[3] = bin2bcd(time->tm_wday + 1); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 160 | buf[4] = bin2bcd(time->tm_mday); /* Date */ |
Lei Xu | a2d6d2f | 2011-02-25 14:44:23 -0800 | [diff] [blame] | 161 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
| 162 | buf[5] = bin2bcd(time->tm_mon + 1); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 163 | if (time->tm_year >= 100) { |
| 164 | buf[5] |= 0x80; |
| 165 | buf[6] = bin2bcd(time->tm_year - 100); |
| 166 | } else { |
| 167 | buf[6] = bin2bcd(time->tm_year); |
| 168 | } |
| 169 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 170 | return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 171 | } |
| 172 | |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 173 | /* |
| 174 | * DS3232 has two alarm, we only use alarm1 |
| 175 | * According to linux specification, only support one-shot alarm |
| 176 | * no periodic alarm mode |
| 177 | */ |
| 178 | static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 179 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 180 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 181 | int control, stat; |
| 182 | int ret; |
| 183 | u8 buf[4]; |
| 184 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 185 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
| 186 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 187 | goto out; |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 188 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
| 189 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 190 | goto out; |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 191 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
| 192 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 193 | goto out; |
| 194 | |
| 195 | alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); |
| 196 | alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); |
| 197 | alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); |
| 198 | alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); |
| 199 | |
| 200 | alarm->time.tm_mon = -1; |
| 201 | alarm->time.tm_year = -1; |
| 202 | alarm->time.tm_wday = -1; |
| 203 | alarm->time.tm_yday = -1; |
| 204 | alarm->time.tm_isdst = -1; |
| 205 | |
| 206 | alarm->enabled = !!(control & DS3232_REG_CR_A1IE); |
| 207 | alarm->pending = !!(stat & DS3232_REG_SR_A1F); |
| 208 | |
| 209 | ret = 0; |
| 210 | out: |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 211 | return ret; |
| 212 | } |
| 213 | |
| 214 | /* |
| 215 | * linux rtc-module does not support wday alarm |
| 216 | * and only 24h time mode supported indeed |
| 217 | */ |
| 218 | static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 219 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 220 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 221 | int control, stat; |
| 222 | int ret; |
| 223 | u8 buf[4]; |
| 224 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 225 | if (ds3232->irq <= 0) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 226 | return -EINVAL; |
| 227 | |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 228 | buf[0] = bin2bcd(alarm->time.tm_sec); |
| 229 | buf[1] = bin2bcd(alarm->time.tm_min); |
| 230 | buf[2] = bin2bcd(alarm->time.tm_hour); |
| 231 | buf[3] = bin2bcd(alarm->time.tm_mday); |
| 232 | |
| 233 | /* clear alarm interrupt enable bit */ |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 234 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
| 235 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 236 | goto out; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 237 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 238 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
| 239 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 240 | goto out; |
| 241 | |
| 242 | /* clear any pending alarm flag */ |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 243 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
| 244 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 245 | goto out; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 246 | stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 247 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
| 248 | if (ret) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 249 | goto out; |
| 250 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 251 | ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 252 | if (ret) |
| 253 | goto out; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 254 | |
| 255 | if (alarm->enabled) { |
| 256 | control |= DS3232_REG_CR_A1IE; |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 257 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 258 | } |
| 259 | out: |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 260 | return ret; |
| 261 | } |
| 262 | |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 263 | static int ds3232_update_alarm(struct device *dev, unsigned int enabled) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 264 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 265 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 266 | int control; |
| 267 | int ret; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 268 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 269 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
| 270 | if (ret) |
Akinobu Mita | fc1dcb0 | 2016-03-07 00:27:53 +0900 | [diff] [blame] | 271 | return ret; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 272 | |
Akinobu Mita | 7522297 | 2016-03-07 00:27:51 +0900 | [diff] [blame] | 273 | if (enabled) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 274 | /* enable alarm1 interrupt */ |
| 275 | control |= DS3232_REG_CR_A1IE; |
| 276 | else |
| 277 | /* disable alarm1 interrupt */ |
| 278 | control &= ~(DS3232_REG_CR_A1IE); |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 279 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 280 | |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 281 | return ret; |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 282 | } |
| 283 | |
| 284 | static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 285 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 286 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 287 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 288 | if (ds3232->irq <= 0) |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 289 | return -EINVAL; |
| 290 | |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 291 | return ds3232_update_alarm(dev, enabled); |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 292 | } |
| 293 | |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 294 | static irqreturn_t ds3232_irq(int irq, void *dev_id) |
| 295 | { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 296 | struct device *dev = dev_id; |
| 297 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Akinobu Mita | fc1dcb0 | 2016-03-07 00:27:53 +0900 | [diff] [blame] | 298 | struct mutex *lock = &ds3232->rtc->ops_lock; |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 299 | int ret; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 300 | int stat, control; |
| 301 | |
Akinobu Mita | fc1dcb0 | 2016-03-07 00:27:53 +0900 | [diff] [blame] | 302 | mutex_lock(lock); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 303 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 304 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
| 305 | if (ret) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 306 | goto unlock; |
| 307 | |
| 308 | if (stat & DS3232_REG_SR_A1F) { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 309 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
| 310 | if (ret) { |
Akinobu Mita | 95c60c1 | 2016-03-07 00:27:52 +0900 | [diff] [blame] | 311 | dev_warn(ds3232->dev, |
| 312 | "Read Control Register error %d\n", ret); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 313 | } else { |
| 314 | /* disable alarm1 interrupt */ |
| 315 | control &= ~(DS3232_REG_CR_A1IE); |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 316 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, |
| 317 | control); |
| 318 | if (ret) { |
| 319 | dev_warn(ds3232->dev, |
| 320 | "Write Control Register error %d\n", |
| 321 | ret); |
| 322 | goto unlock; |
| 323 | } |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 324 | |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 325 | /* clear the alarm pend flag */ |
| 326 | stat &= ~DS3232_REG_SR_A1F; |
Akinobu Mita | 7b4393a | 2016-03-07 00:27:50 +0900 | [diff] [blame] | 327 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
| 328 | if (ret) { |
| 329 | dev_warn(ds3232->dev, |
| 330 | "Write Status Register error %d\n", |
| 331 | ret); |
| 332 | goto unlock; |
| 333 | } |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 334 | |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 335 | rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 336 | } |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 337 | } |
| 338 | |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 339 | unlock: |
Akinobu Mita | fc1dcb0 | 2016-03-07 00:27:53 +0900 | [diff] [blame] | 340 | mutex_unlock(lock); |
Akinobu Mita | 95c60c1 | 2016-03-07 00:27:52 +0900 | [diff] [blame] | 341 | |
| 342 | return IRQ_HANDLED; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 343 | } |
| 344 | |
| 345 | static const struct rtc_class_ops ds3232_rtc_ops = { |
| 346 | .read_time = ds3232_read_time, |
| 347 | .set_time = ds3232_set_time, |
Lan Chunhe-B25806 | f46418c | 2010-10-27 15:33:12 -0700 | [diff] [blame] | 348 | .read_alarm = ds3232_read_alarm, |
| 349 | .set_alarm = ds3232_set_alarm, |
| 350 | .alarm_irq_enable = ds3232_alarm_irq_enable, |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 351 | }; |
| 352 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 353 | static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, |
| 354 | const char *name) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 355 | { |
| 356 | struct ds3232 *ds3232; |
| 357 | int ret; |
| 358 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 359 | ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 360 | if (!ds3232) |
| 361 | return -ENOMEM; |
| 362 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 363 | ds3232->regmap = regmap; |
| 364 | ds3232->irq = irq; |
| 365 | ds3232->dev = dev; |
| 366 | dev_set_drvdata(dev, ds3232); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 367 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 368 | ret = ds3232_check_rtc_status(dev); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 369 | if (ret) |
Sachin Kamat | 6671461 | 2013-04-29 16:20:31 -0700 | [diff] [blame] | 370 | return ret; |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 371 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 372 | if (ds3232->irq > 0) { |
Akinobu Mita | 95c60c1 | 2016-03-07 00:27:52 +0900 | [diff] [blame] | 373 | ret = devm_request_threaded_irq(dev, ds3232->irq, NULL, |
| 374 | ds3232_irq, |
| 375 | IRQF_SHARED | IRQF_ONESHOT, |
| 376 | name, dev); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 377 | if (ret) { |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 378 | ds3232->irq = 0; |
| 379 | dev_err(dev, "unable to request IRQ\n"); |
| 380 | } else |
| 381 | device_init_wakeup(dev, 1); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 382 | } |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 383 | ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, |
| 384 | THIS_MODULE); |
| 385 | |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 386 | return PTR_ERR_OR_ZERO(ds3232->rtc); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 387 | } |
| 388 | |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 389 | #ifdef CONFIG_PM_SLEEP |
| 390 | static int ds3232_suspend(struct device *dev) |
| 391 | { |
| 392 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 393 | |
Akinobu Mita | 95c60c1 | 2016-03-07 00:27:52 +0900 | [diff] [blame] | 394 | if (device_may_wakeup(dev)) { |
| 395 | if (enable_irq_wake(ds3232->irq)) |
Wang Dongsheng | dc2280e | 2015-08-12 17:14:13 +0800 | [diff] [blame] | 396 | dev_warn_once(dev, "Cannot set wakeup source\n"); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
| 402 | static int ds3232_resume(struct device *dev) |
| 403 | { |
| 404 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 405 | |
Akinobu Mita | 95c60c1 | 2016-03-07 00:27:52 +0900 | [diff] [blame] | 406 | if (device_may_wakeup(dev)) |
| 407 | disable_irq_wake(ds3232->irq); |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 408 | |
| 409 | return 0; |
| 410 | } |
| 411 | #endif |
| 412 | |
| 413 | static const struct dev_pm_ops ds3232_pm_ops = { |
| 414 | SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) |
| 415 | }; |
| 416 | |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 417 | #if IS_ENABLED(CONFIG_I2C) |
| 418 | |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 419 | static int ds3232_i2c_probe(struct i2c_client *client, |
| 420 | const struct i2c_device_id *id) |
| 421 | { |
| 422 | struct regmap *regmap; |
| 423 | static const struct regmap_config config = { |
| 424 | .reg_bits = 8, |
| 425 | .val_bits = 8, |
| 426 | }; |
| 427 | |
| 428 | regmap = devm_regmap_init_i2c(client, &config); |
| 429 | if (IS_ERR(regmap)) { |
| 430 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", |
| 431 | __func__, PTR_ERR(regmap)); |
| 432 | return PTR_ERR(regmap); |
| 433 | } |
| 434 | |
| 435 | return ds3232_probe(&client->dev, regmap, client->irq, client->name); |
| 436 | } |
| 437 | |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 438 | static const struct i2c_device_id ds3232_id[] = { |
| 439 | { "ds3232", 0 }, |
| 440 | { } |
| 441 | }; |
| 442 | MODULE_DEVICE_TABLE(i2c, ds3232_id); |
| 443 | |
| 444 | static struct i2c_driver ds3232_driver = { |
| 445 | .driver = { |
| 446 | .name = "rtc-ds3232", |
Wang Dongsheng | c93a3ae | 2014-04-03 14:50:08 -0700 | [diff] [blame] | 447 | .pm = &ds3232_pm_ops, |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 448 | }, |
Akinobu Mita | 370927c | 2016-03-07 00:27:47 +0900 | [diff] [blame] | 449 | .probe = ds3232_i2c_probe, |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 450 | .id_table = ds3232_id, |
| 451 | }; |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 452 | |
| 453 | static int ds3232_register_driver(void) |
| 454 | { |
| 455 | return i2c_add_driver(&ds3232_driver); |
| 456 | } |
| 457 | |
| 458 | static void ds3232_unregister_driver(void) |
| 459 | { |
| 460 | i2c_del_driver(&ds3232_driver); |
| 461 | } |
| 462 | |
| 463 | #else |
| 464 | |
| 465 | static int ds3232_register_driver(void) |
| 466 | { |
| 467 | return 0; |
| 468 | } |
| 469 | |
| 470 | static void ds3232_unregister_driver(void) |
| 471 | { |
| 472 | } |
| 473 | |
| 474 | #endif |
| 475 | |
| 476 | #if IS_ENABLED(CONFIG_SPI_MASTER) |
| 477 | |
| 478 | static int ds3234_probe(struct spi_device *spi) |
| 479 | { |
| 480 | int res; |
| 481 | unsigned int tmp; |
| 482 | static const struct regmap_config config = { |
| 483 | .reg_bits = 8, |
| 484 | .val_bits = 8, |
| 485 | .write_flag_mask = 0x80, |
| 486 | }; |
| 487 | struct regmap *regmap; |
| 488 | |
| 489 | regmap = devm_regmap_init_spi(spi, &config); |
| 490 | if (IS_ERR(regmap)) { |
| 491 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", |
| 492 | __func__, PTR_ERR(regmap)); |
| 493 | return PTR_ERR(regmap); |
| 494 | } |
| 495 | |
| 496 | spi->mode = SPI_MODE_3; |
| 497 | spi->bits_per_word = 8; |
| 498 | spi_setup(spi); |
| 499 | |
| 500 | res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); |
| 501 | if (res) |
| 502 | return res; |
| 503 | |
| 504 | /* Control settings |
| 505 | * |
| 506 | * CONTROL_REG |
| 507 | * BIT 7 6 5 4 3 2 1 0 |
| 508 | * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE |
| 509 | * |
| 510 | * 0 0 0 1 1 1 0 0 |
| 511 | * |
| 512 | * CONTROL_STAT_REG |
| 513 | * BIT 7 6 5 4 3 2 1 0 |
| 514 | * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F |
| 515 | * |
| 516 | * 1 0 0 0 1 0 0 0 |
| 517 | */ |
| 518 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); |
| 519 | if (res) |
| 520 | return res; |
| 521 | res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); |
| 522 | if (res) |
| 523 | return res; |
| 524 | |
| 525 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); |
| 526 | if (res) |
| 527 | return res; |
| 528 | res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); |
| 529 | if (res) |
| 530 | return res; |
| 531 | |
| 532 | /* Print our settings */ |
| 533 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); |
| 534 | if (res) |
| 535 | return res; |
| 536 | dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); |
| 537 | |
| 538 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); |
| 539 | if (res) |
| 540 | return res; |
| 541 | dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); |
| 542 | |
| 543 | return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); |
| 544 | } |
| 545 | |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 546 | static struct spi_driver ds3234_driver = { |
| 547 | .driver = { |
| 548 | .name = "ds3234", |
| 549 | }, |
| 550 | .probe = ds3234_probe, |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 551 | }; |
| 552 | |
| 553 | static int ds3234_register_driver(void) |
| 554 | { |
| 555 | return spi_register_driver(&ds3234_driver); |
| 556 | } |
| 557 | |
| 558 | static void ds3234_unregister_driver(void) |
| 559 | { |
| 560 | spi_unregister_driver(&ds3234_driver); |
| 561 | } |
| 562 | |
| 563 | #else |
| 564 | |
| 565 | static int ds3234_register_driver(void) |
| 566 | { |
| 567 | return 0; |
| 568 | } |
| 569 | |
| 570 | static void ds3234_unregister_driver(void) |
| 571 | { |
| 572 | } |
| 573 | |
| 574 | #endif |
| 575 | |
| 576 | static int __init ds323x_init(void) |
| 577 | { |
| 578 | int ret; |
| 579 | |
| 580 | ret = ds3232_register_driver(); |
| 581 | if (ret) { |
| 582 | pr_err("Failed to register ds3232 driver: %d\n", ret); |
| 583 | return ret; |
| 584 | } |
| 585 | |
| 586 | ret = ds3234_register_driver(); |
| 587 | if (ret) { |
| 588 | pr_err("Failed to register ds3234 driver: %d\n", ret); |
| 589 | ds3232_unregister_driver(); |
| 590 | } |
| 591 | |
| 592 | return ret; |
| 593 | } |
| 594 | module_init(ds323x_init) |
| 595 | |
| 596 | static void __exit ds323x_exit(void) |
| 597 | { |
| 598 | ds3234_unregister_driver(); |
| 599 | ds3232_unregister_driver(); |
| 600 | } |
| 601 | module_exit(ds323x_exit) |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 602 | |
| 603 | MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 604 | MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); |
| 605 | MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); |
Roy Zang | c03675f | 2010-08-10 18:02:20 -0700 | [diff] [blame] | 606 | MODULE_LICENSE("GPL"); |
Akinobu Mita | 080481f5 | 2016-03-07 00:27:48 +0900 | [diff] [blame] | 607 | MODULE_ALIAS("spi:ds3234"); |