blob: 581cb081cb0f04586f98e8b10bdf1e095a3b65a0 [file] [log] [blame]
Tony Lindgrenf20b9332011-12-16 14:13:09 -08001/*
2 * Device Tree Source for OMAP2 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
15
16 aliases {
17 serial0 = &uart1;
18 serial1 = &uart2;
19 serial2 = &uart3;
20 };
21
22 cpus {
23 cpu@0 {
24 compatible = "arm,arm1136jf-s";
25 };
26 };
27
28 soc {
29 compatible = "ti,omap-infra";
30 mpu {
31 compatible = "ti,omap2-mpu";
32 ti,hwmods = "mpu";
33 };
34 };
35
36 ocp {
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges;
41 ti,hwmods = "l3_main";
42
43 intc: interrupt-controller@1 {
44 compatible = "ti,omap2-intc";
45 interrupt-controller;
46 #interrupt-cells = <1>;
Jon Hunter95dca122012-06-12 19:40:46 -050047 ti,intc-size = <96>;
48 reg = <0x480FE000 0x1000>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -080049 };
50
51 uart1: serial@4806a000 {
52 compatible = "ti,omap2-uart";
53 ti,hwmods = "uart1";
54 clock-frequency = <48000000>;
55 };
56
57 uart2: serial@4806c000 {
58 compatible = "ti,omap2-uart";
59 ti,hwmods = "uart2";
60 clock-frequency = <48000000>;
61 };
62
63 uart3: serial@4806e000 {
64 compatible = "ti,omap2-uart";
65 ti,hwmods = "uart3";
66 clock-frequency = <48000000>;
67 };
68 };
69};