Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Pinctrl driver for Rockchip SoCs |
| 3 | * |
| 4 | * Copyright (c) 2013 MundoReader S.L. |
| 5 | * Author: Heiko Stuebner <heiko@sntech.de> |
| 6 | * |
| 7 | * With some ideas taken from pinctrl-samsung: |
| 8 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| 9 | * http://www.samsung.com |
| 10 | * Copyright (c) 2012 Linaro Ltd |
| 11 | * http://www.linaro.org |
| 12 | * |
| 13 | * and pinctrl-at91: |
| 14 | * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify |
| 17 | * it under the terms of the GNU General Public License version 2 as published |
| 18 | * by the Free Software Foundation. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | */ |
| 25 | |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/io.h> |
| 29 | #include <linux/bitops.h> |
| 30 | #include <linux/gpio.h> |
| 31 | #include <linux/of_address.h> |
| 32 | #include <linux/of_irq.h> |
| 33 | #include <linux/pinctrl/machine.h> |
| 34 | #include <linux/pinctrl/pinconf.h> |
| 35 | #include <linux/pinctrl/pinctrl.h> |
| 36 | #include <linux/pinctrl/pinmux.h> |
| 37 | #include <linux/pinctrl/pinconf-generic.h> |
| 38 | #include <linux/irqchip/chained_irq.h> |
Heiko Stübner | 7e865ab | 2013-07-23 13:34:20 +0200 | [diff] [blame] | 39 | #include <linux/clk.h> |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 40 | #include <linux/regmap.h> |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 41 | #include <linux/mfd/syscon.h> |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 42 | #include <dt-bindings/pinctrl/rockchip.h> |
| 43 | |
| 44 | #include "core.h" |
| 45 | #include "pinconf.h" |
| 46 | |
| 47 | /* GPIO control registers */ |
| 48 | #define GPIO_SWPORT_DR 0x00 |
| 49 | #define GPIO_SWPORT_DDR 0x04 |
| 50 | #define GPIO_INTEN 0x30 |
| 51 | #define GPIO_INTMASK 0x34 |
| 52 | #define GPIO_INTTYPE_LEVEL 0x38 |
| 53 | #define GPIO_INT_POLARITY 0x3c |
| 54 | #define GPIO_INT_STATUS 0x40 |
| 55 | #define GPIO_INT_RAWSTATUS 0x44 |
| 56 | #define GPIO_DEBOUNCE 0x48 |
| 57 | #define GPIO_PORTS_EOI 0x4c |
| 58 | #define GPIO_EXT_PORT 0x50 |
| 59 | #define GPIO_LS_SYNC 0x60 |
| 60 | |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 61 | enum rockchip_pinctrl_type { |
| 62 | RK2928, |
| 63 | RK3066B, |
| 64 | RK3188, |
| 65 | }; |
| 66 | |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 67 | /** |
| 68 | * Encode variants of iomux registers into a type variable |
| 69 | */ |
| 70 | #define IOMUX_GPIO_ONLY BIT(0) |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 71 | #define IOMUX_WIDTH_4BIT BIT(1) |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 72 | #define IOMUX_SOURCE_PMU BIT(2) |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 73 | |
| 74 | /** |
| 75 | * @type: iomux variant using IOMUX_* constants |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 76 | * @offset: if initialized to -1 it will be autocalculated, by specifying |
| 77 | * an initial offset value the relevant source offset can be reset |
| 78 | * to a new value for autocalculating the following iomux registers. |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 79 | */ |
| 80 | struct rockchip_iomux { |
| 81 | int type; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 82 | int offset; |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 83 | }; |
| 84 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 85 | /** |
| 86 | * @reg_base: register base of the gpio bank |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 87 | * @reg_pull: optional separate register for additional pull settings |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 88 | * @clk: clock of the gpio bank |
| 89 | * @irq: interrupt of the gpio bank |
| 90 | * @pin_base: first pin number |
| 91 | * @nr_pins: number of pins in this bank |
| 92 | * @name: name of the bank |
| 93 | * @bank_num: number of the bank, to account for holes |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 94 | * @iomux: array describing the 4 iomux sources of the bank |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 95 | * @valid: are all necessary informations present |
| 96 | * @of_node: dt node of this bank |
| 97 | * @drvdata: common pinctrl basedata |
| 98 | * @domain: irqdomain of the gpio bank |
| 99 | * @gpio_chip: gpiolib chip |
| 100 | * @grange: gpio range |
| 101 | * @slock: spinlock for the gpio bank |
| 102 | */ |
| 103 | struct rockchip_pin_bank { |
| 104 | void __iomem *reg_base; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 105 | struct regmap *regmap_pull; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 106 | struct clk *clk; |
| 107 | int irq; |
| 108 | u32 pin_base; |
| 109 | u8 nr_pins; |
| 110 | char *name; |
| 111 | u8 bank_num; |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 112 | struct rockchip_iomux iomux[4]; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 113 | bool valid; |
| 114 | struct device_node *of_node; |
| 115 | struct rockchip_pinctrl *drvdata; |
| 116 | struct irq_domain *domain; |
| 117 | struct gpio_chip gpio_chip; |
| 118 | struct pinctrl_gpio_range grange; |
| 119 | spinlock_t slock; |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 120 | u32 toggle_edge_mode; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 121 | }; |
| 122 | |
| 123 | #define PIN_BANK(id, pins, label) \ |
| 124 | { \ |
| 125 | .bank_num = id, \ |
| 126 | .nr_pins = pins, \ |
| 127 | .name = label, \ |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 128 | .iomux = { \ |
| 129 | { .offset = -1 }, \ |
| 130 | { .offset = -1 }, \ |
| 131 | { .offset = -1 }, \ |
| 132 | { .offset = -1 }, \ |
| 133 | }, \ |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 134 | } |
| 135 | |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 136 | #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \ |
| 137 | { \ |
| 138 | .bank_num = id, \ |
| 139 | .nr_pins = pins, \ |
| 140 | .name = label, \ |
| 141 | .iomux = { \ |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 142 | { .type = iom0, .offset = -1 }, \ |
| 143 | { .type = iom1, .offset = -1 }, \ |
| 144 | { .type = iom2, .offset = -1 }, \ |
| 145 | { .type = iom3, .offset = -1 }, \ |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 146 | }, \ |
| 147 | } |
| 148 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 149 | /** |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 150 | */ |
| 151 | struct rockchip_pin_ctrl { |
| 152 | struct rockchip_pin_bank *pin_banks; |
| 153 | u32 nr_banks; |
| 154 | u32 nr_pins; |
| 155 | char *label; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 156 | enum rockchip_pinctrl_type type; |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 157 | int grf_mux_offset; |
| 158 | int pmu_mux_offset; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 159 | void (*pull_calc_reg)(struct rockchip_pin_bank *bank, |
| 160 | int pin_num, struct regmap **regmap, |
| 161 | int *reg, u8 *bit); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 162 | }; |
| 163 | |
| 164 | struct rockchip_pin_config { |
| 165 | unsigned int func; |
| 166 | unsigned long *configs; |
| 167 | unsigned int nconfigs; |
| 168 | }; |
| 169 | |
| 170 | /** |
| 171 | * struct rockchip_pin_group: represent group of pins of a pinmux function. |
| 172 | * @name: name of the pin group, used to lookup the group. |
| 173 | * @pins: the pins included in this group. |
| 174 | * @npins: number of pins included in this group. |
| 175 | * @func: the mux function number to be programmed when selected. |
| 176 | * @configs: the config values to be set for each pin |
| 177 | * @nconfigs: number of configs for each pin |
| 178 | */ |
| 179 | struct rockchip_pin_group { |
| 180 | const char *name; |
| 181 | unsigned int npins; |
| 182 | unsigned int *pins; |
| 183 | struct rockchip_pin_config *data; |
| 184 | }; |
| 185 | |
| 186 | /** |
| 187 | * struct rockchip_pmx_func: represent a pin function. |
| 188 | * @name: name of the pin function, used to lookup the function. |
| 189 | * @groups: one or more names of pin groups that provide this function. |
| 190 | * @num_groups: number of groups included in @groups. |
| 191 | */ |
| 192 | struct rockchip_pmx_func { |
| 193 | const char *name; |
| 194 | const char **groups; |
| 195 | u8 ngroups; |
| 196 | }; |
| 197 | |
| 198 | struct rockchip_pinctrl { |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 199 | struct regmap *regmap_base; |
Heiko Stübner | bfc7a42 | 2014-05-05 13:58:00 +0200 | [diff] [blame] | 200 | int reg_size; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 201 | struct regmap *regmap_pull; |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 202 | struct regmap *regmap_pmu; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 203 | struct device *dev; |
| 204 | struct rockchip_pin_ctrl *ctrl; |
| 205 | struct pinctrl_desc pctl; |
| 206 | struct pinctrl_dev *pctl_dev; |
| 207 | struct rockchip_pin_group *groups; |
| 208 | unsigned int ngroups; |
| 209 | struct rockchip_pmx_func *functions; |
| 210 | unsigned int nfunctions; |
| 211 | }; |
| 212 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 213 | static struct regmap_config rockchip_regmap_config = { |
| 214 | .reg_bits = 32, |
| 215 | .val_bits = 32, |
| 216 | .reg_stride = 4, |
| 217 | }; |
| 218 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 219 | static inline struct rockchip_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) |
| 220 | { |
| 221 | return container_of(gc, struct rockchip_pin_bank, gpio_chip); |
| 222 | } |
| 223 | |
| 224 | static const inline struct rockchip_pin_group *pinctrl_name_to_group( |
| 225 | const struct rockchip_pinctrl *info, |
| 226 | const char *name) |
| 227 | { |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 228 | int i; |
| 229 | |
| 230 | for (i = 0; i < info->ngroups; i++) { |
Axel Lin | 1cb9539 | 2013-08-21 10:28:50 +0800 | [diff] [blame] | 231 | if (!strcmp(info->groups[i].name, name)) |
| 232 | return &info->groups[i]; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 233 | } |
| 234 | |
Axel Lin | 1cb9539 | 2013-08-21 10:28:50 +0800 | [diff] [blame] | 235 | return NULL; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | /* |
| 239 | * given a pin number that is local to a pin controller, find out the pin bank |
| 240 | * and the register base of the pin bank. |
| 241 | */ |
| 242 | static struct rockchip_pin_bank *pin_to_bank(struct rockchip_pinctrl *info, |
| 243 | unsigned pin) |
| 244 | { |
| 245 | struct rockchip_pin_bank *b = info->ctrl->pin_banks; |
| 246 | |
Axel Lin | 51578b9 | 2013-08-23 15:49:00 +0800 | [diff] [blame] | 247 | while (pin >= (b->pin_base + b->nr_pins)) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 248 | b++; |
| 249 | |
| 250 | return b; |
| 251 | } |
| 252 | |
| 253 | static struct rockchip_pin_bank *bank_num_to_bank( |
| 254 | struct rockchip_pinctrl *info, |
| 255 | unsigned num) |
| 256 | { |
| 257 | struct rockchip_pin_bank *b = info->ctrl->pin_banks; |
| 258 | int i; |
| 259 | |
Axel Lin | 1cb9539 | 2013-08-21 10:28:50 +0800 | [diff] [blame] | 260 | for (i = 0; i < info->ctrl->nr_banks; i++, b++) { |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 261 | if (b->bank_num == num) |
Axel Lin | 1cb9539 | 2013-08-21 10:28:50 +0800 | [diff] [blame] | 262 | return b; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 263 | } |
| 264 | |
Axel Lin | 1cb9539 | 2013-08-21 10:28:50 +0800 | [diff] [blame] | 265 | return ERR_PTR(-EINVAL); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 266 | } |
| 267 | |
| 268 | /* |
| 269 | * Pinctrl_ops handling |
| 270 | */ |
| 271 | |
| 272 | static int rockchip_get_groups_count(struct pinctrl_dev *pctldev) |
| 273 | { |
| 274 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 275 | |
| 276 | return info->ngroups; |
| 277 | } |
| 278 | |
| 279 | static const char *rockchip_get_group_name(struct pinctrl_dev *pctldev, |
| 280 | unsigned selector) |
| 281 | { |
| 282 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 283 | |
| 284 | return info->groups[selector].name; |
| 285 | } |
| 286 | |
| 287 | static int rockchip_get_group_pins(struct pinctrl_dev *pctldev, |
| 288 | unsigned selector, const unsigned **pins, |
| 289 | unsigned *npins) |
| 290 | { |
| 291 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 292 | |
| 293 | if (selector >= info->ngroups) |
| 294 | return -EINVAL; |
| 295 | |
| 296 | *pins = info->groups[selector].pins; |
| 297 | *npins = info->groups[selector].npins; |
| 298 | |
| 299 | return 0; |
| 300 | } |
| 301 | |
| 302 | static int rockchip_dt_node_to_map(struct pinctrl_dev *pctldev, |
| 303 | struct device_node *np, |
| 304 | struct pinctrl_map **map, unsigned *num_maps) |
| 305 | { |
| 306 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 307 | const struct rockchip_pin_group *grp; |
| 308 | struct pinctrl_map *new_map; |
| 309 | struct device_node *parent; |
| 310 | int map_num = 1; |
| 311 | int i; |
| 312 | |
| 313 | /* |
| 314 | * first find the group of this node and check if we need to create |
| 315 | * config maps for pins |
| 316 | */ |
| 317 | grp = pinctrl_name_to_group(info, np->name); |
| 318 | if (!grp) { |
| 319 | dev_err(info->dev, "unable to find group for node %s\n", |
| 320 | np->name); |
| 321 | return -EINVAL; |
| 322 | } |
| 323 | |
| 324 | map_num += grp->npins; |
| 325 | new_map = devm_kzalloc(pctldev->dev, sizeof(*new_map) * map_num, |
| 326 | GFP_KERNEL); |
| 327 | if (!new_map) |
| 328 | return -ENOMEM; |
| 329 | |
| 330 | *map = new_map; |
| 331 | *num_maps = map_num; |
| 332 | |
| 333 | /* create mux map */ |
| 334 | parent = of_get_parent(np); |
| 335 | if (!parent) { |
| 336 | devm_kfree(pctldev->dev, new_map); |
| 337 | return -EINVAL; |
| 338 | } |
| 339 | new_map[0].type = PIN_MAP_TYPE_MUX_GROUP; |
| 340 | new_map[0].data.mux.function = parent->name; |
| 341 | new_map[0].data.mux.group = np->name; |
| 342 | of_node_put(parent); |
| 343 | |
| 344 | /* create config map */ |
| 345 | new_map++; |
| 346 | for (i = 0; i < grp->npins; i++) { |
| 347 | new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN; |
| 348 | new_map[i].data.configs.group_or_pin = |
| 349 | pin_get_name(pctldev, grp->pins[i]); |
| 350 | new_map[i].data.configs.configs = grp->data[i].configs; |
| 351 | new_map[i].data.configs.num_configs = grp->data[i].nconfigs; |
| 352 | } |
| 353 | |
| 354 | dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", |
| 355 | (*map)->data.mux.function, (*map)->data.mux.group, map_num); |
| 356 | |
| 357 | return 0; |
| 358 | } |
| 359 | |
| 360 | static void rockchip_dt_free_map(struct pinctrl_dev *pctldev, |
| 361 | struct pinctrl_map *map, unsigned num_maps) |
| 362 | { |
| 363 | } |
| 364 | |
| 365 | static const struct pinctrl_ops rockchip_pctrl_ops = { |
| 366 | .get_groups_count = rockchip_get_groups_count, |
| 367 | .get_group_name = rockchip_get_group_name, |
| 368 | .get_group_pins = rockchip_get_group_pins, |
| 369 | .dt_node_to_map = rockchip_dt_node_to_map, |
| 370 | .dt_free_map = rockchip_dt_free_map, |
| 371 | }; |
| 372 | |
| 373 | /* |
| 374 | * Hardware access |
| 375 | */ |
| 376 | |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 377 | static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) |
| 378 | { |
| 379 | struct rockchip_pinctrl *info = bank->drvdata; |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 380 | int iomux_num = (pin / 8); |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 381 | struct regmap *regmap; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 382 | unsigned int val; |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 383 | int reg, ret, mask; |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 384 | u8 bit; |
| 385 | |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 386 | if (iomux_num > 3) |
| 387 | return -EINVAL; |
| 388 | |
| 389 | if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 390 | return RK_FUNC_GPIO; |
| 391 | |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 392 | regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) |
| 393 | ? info->regmap_pmu : info->regmap_base; |
| 394 | |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 395 | /* get basic quadrupel of mux registers and the correct reg inside */ |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 396 | mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 397 | reg = bank->iomux[iomux_num].offset; |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 398 | if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { |
| 399 | if ((pin % 8) >= 4) |
| 400 | reg += 0x4; |
| 401 | bit = (pin % 4) * 4; |
| 402 | } else { |
| 403 | bit = (pin % 8) * 2; |
| 404 | } |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 405 | |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 406 | ret = regmap_read(regmap, reg, &val); |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 407 | if (ret) |
| 408 | return ret; |
| 409 | |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 410 | return ((val >> bit) & mask); |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 411 | } |
| 412 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 413 | /* |
| 414 | * Set a new mux function for a pin. |
| 415 | * |
| 416 | * The register is divided into the upper and lower 16 bit. When changing |
| 417 | * a value, the previous register value is not read and changed. Instead |
| 418 | * it seems the changed bits are marked in the upper 16 bit, while the |
| 419 | * changed value gets set in the same offset in the lower 16 bit. |
| 420 | * All pin settings seem to be 2 bit wide in both the upper and lower |
| 421 | * parts. |
| 422 | * @bank: pin bank to change |
| 423 | * @pin: pin to change |
| 424 | * @mux: new mux function to set |
| 425 | */ |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 426 | static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 427 | { |
| 428 | struct rockchip_pinctrl *info = bank->drvdata; |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 429 | int iomux_num = (pin / 8); |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 430 | struct regmap *regmap; |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 431 | int reg, ret, mask; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 432 | unsigned long flags; |
| 433 | u8 bit; |
| 434 | u32 data; |
| 435 | |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 436 | if (iomux_num > 3) |
| 437 | return -EINVAL; |
| 438 | |
| 439 | if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { |
Heiko Stübner | c4a532de | 2014-03-26 00:57:52 +0100 | [diff] [blame] | 440 | if (mux != RK_FUNC_GPIO) { |
| 441 | dev_err(info->dev, |
| 442 | "pin %d only supports a gpio mux\n", pin); |
| 443 | return -ENOTSUPP; |
| 444 | } else { |
| 445 | return 0; |
| 446 | } |
| 447 | } |
| 448 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 449 | dev_dbg(info->dev, "setting mux of GPIO%d-%d to %d\n", |
| 450 | bank->bank_num, pin, mux); |
| 451 | |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 452 | regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) |
| 453 | ? info->regmap_pmu : info->regmap_base; |
| 454 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 455 | /* get basic quadrupel of mux registers and the correct reg inside */ |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 456 | mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 457 | reg = bank->iomux[iomux_num].offset; |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 458 | if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { |
| 459 | if ((pin % 8) >= 4) |
| 460 | reg += 0x4; |
| 461 | bit = (pin % 4) * 4; |
| 462 | } else { |
| 463 | bit = (pin % 8) * 2; |
| 464 | } |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 465 | |
| 466 | spin_lock_irqsave(&bank->slock, flags); |
| 467 | |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 468 | data = (mask << (bit + 16)); |
| 469 | data |= (mux & mask) << bit; |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 470 | ret = regmap_write(regmap, reg, data); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 471 | |
| 472 | spin_unlock_irqrestore(&bank->slock, flags); |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 473 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 474 | return ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 475 | } |
| 476 | |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 477 | #define RK2928_PULL_OFFSET 0x118 |
| 478 | #define RK2928_PULL_PINS_PER_REG 16 |
| 479 | #define RK2928_PULL_BANK_STRIDE 8 |
| 480 | |
| 481 | static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 482 | int pin_num, struct regmap **regmap, |
| 483 | int *reg, u8 *bit) |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 484 | { |
| 485 | struct rockchip_pinctrl *info = bank->drvdata; |
| 486 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 487 | *regmap = info->regmap_base; |
| 488 | *reg = RK2928_PULL_OFFSET; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 489 | *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; |
| 490 | *reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4; |
| 491 | |
| 492 | *bit = pin_num % RK2928_PULL_PINS_PER_REG; |
| 493 | }; |
| 494 | |
Heiko Stübner | bfc7a42 | 2014-05-05 13:58:00 +0200 | [diff] [blame] | 495 | #define RK3188_PULL_OFFSET 0x164 |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 496 | #define RK3188_PULL_BITS_PER_PIN 2 |
| 497 | #define RK3188_PULL_PINS_PER_REG 8 |
| 498 | #define RK3188_PULL_BANK_STRIDE 16 |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 499 | #define RK3188_PULL_PMU_OFFSET 0x64 |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 500 | |
| 501 | static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 502 | int pin_num, struct regmap **regmap, |
| 503 | int *reg, u8 *bit) |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 504 | { |
| 505 | struct rockchip_pinctrl *info = bank->drvdata; |
| 506 | |
| 507 | /* The first 12 pins of the first bank are located elsewhere */ |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 508 | if (bank->bank_num == 0 && pin_num < 12) { |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 509 | *regmap = info->regmap_pmu ? info->regmap_pmu |
| 510 | : bank->regmap_pull; |
| 511 | *reg = info->regmap_pmu ? RK3188_PULL_PMU_OFFSET : 0; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 512 | *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4); |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 513 | *bit = pin_num % RK3188_PULL_PINS_PER_REG; |
| 514 | *bit *= RK3188_PULL_BITS_PER_PIN; |
| 515 | } else { |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 516 | *regmap = info->regmap_pull ? info->regmap_pull |
| 517 | : info->regmap_base; |
| 518 | *reg = info->regmap_pull ? 0 : RK3188_PULL_OFFSET; |
| 519 | |
Heiko Stübner | bfc7a42 | 2014-05-05 13:58:00 +0200 | [diff] [blame] | 520 | /* correct the offset, as it is the 2nd pull register */ |
| 521 | *reg -= 4; |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 522 | *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; |
| 523 | *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4); |
| 524 | |
| 525 | /* |
| 526 | * The bits in these registers have an inverse ordering |
| 527 | * with the lowest pin being in bits 15:14 and the highest |
| 528 | * pin in bits 1:0 |
| 529 | */ |
| 530 | *bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG); |
| 531 | *bit *= RK3188_PULL_BITS_PER_PIN; |
| 532 | } |
| 533 | } |
| 534 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 535 | static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) |
| 536 | { |
| 537 | struct rockchip_pinctrl *info = bank->drvdata; |
| 538 | struct rockchip_pin_ctrl *ctrl = info->ctrl; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 539 | struct regmap *regmap; |
| 540 | int reg, ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 541 | u8 bit; |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 542 | u32 data; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 543 | |
| 544 | /* rk3066b does support any pulls */ |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 545 | if (ctrl->type == RK3066B) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 546 | return PIN_CONFIG_BIAS_DISABLE; |
| 547 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 548 | ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); |
| 549 | |
| 550 | ret = regmap_read(regmap, reg, &data); |
| 551 | if (ret) |
| 552 | return ret; |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 553 | |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 554 | switch (ctrl->type) { |
| 555 | case RK2928: |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 556 | return !(data & BIT(bit)) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 557 | ? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT |
| 558 | : PIN_CONFIG_BIAS_DISABLE; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 559 | case RK3188: |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 560 | data >>= bit; |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 561 | data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1; |
| 562 | |
| 563 | switch (data) { |
| 564 | case 0: |
| 565 | return PIN_CONFIG_BIAS_DISABLE; |
| 566 | case 1: |
| 567 | return PIN_CONFIG_BIAS_PULL_UP; |
| 568 | case 2: |
| 569 | return PIN_CONFIG_BIAS_PULL_DOWN; |
| 570 | case 3: |
| 571 | return PIN_CONFIG_BIAS_BUS_HOLD; |
| 572 | } |
| 573 | |
| 574 | dev_err(info->dev, "unknown pull setting\n"); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 575 | return -EIO; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 576 | default: |
| 577 | dev_err(info->dev, "unsupported pinctrl type\n"); |
| 578 | return -EINVAL; |
| 579 | }; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 580 | } |
| 581 | |
| 582 | static int rockchip_set_pull(struct rockchip_pin_bank *bank, |
| 583 | int pin_num, int pull) |
| 584 | { |
| 585 | struct rockchip_pinctrl *info = bank->drvdata; |
| 586 | struct rockchip_pin_ctrl *ctrl = info->ctrl; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 587 | struct regmap *regmap; |
| 588 | int reg, ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 589 | unsigned long flags; |
| 590 | u8 bit; |
| 591 | u32 data; |
| 592 | |
| 593 | dev_dbg(info->dev, "setting pull of GPIO%d-%d to %d\n", |
| 594 | bank->bank_num, pin_num, pull); |
| 595 | |
| 596 | /* rk3066b does support any pulls */ |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 597 | if (ctrl->type == RK3066B) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 598 | return pull ? -EINVAL : 0; |
| 599 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 600 | ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 601 | |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 602 | switch (ctrl->type) { |
| 603 | case RK2928: |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 604 | spin_lock_irqsave(&bank->slock, flags); |
| 605 | |
| 606 | data = BIT(bit + 16); |
| 607 | if (pull == PIN_CONFIG_BIAS_DISABLE) |
| 608 | data |= BIT(bit); |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 609 | ret = regmap_write(regmap, reg, data); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 610 | |
| 611 | spin_unlock_irqrestore(&bank->slock, flags); |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 612 | break; |
| 613 | case RK3188: |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 614 | spin_lock_irqsave(&bank->slock, flags); |
| 615 | |
| 616 | /* enable the write to the equivalent lower bits */ |
| 617 | data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16); |
| 618 | |
| 619 | switch (pull) { |
| 620 | case PIN_CONFIG_BIAS_DISABLE: |
| 621 | break; |
| 622 | case PIN_CONFIG_BIAS_PULL_UP: |
| 623 | data |= (1 << bit); |
| 624 | break; |
| 625 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 626 | data |= (2 << bit); |
| 627 | break; |
| 628 | case PIN_CONFIG_BIAS_BUS_HOLD: |
| 629 | data |= (3 << bit); |
| 630 | break; |
| 631 | default: |
Dan Carpenter | d32c3e2 | 2013-11-14 11:22:54 +0300 | [diff] [blame] | 632 | spin_unlock_irqrestore(&bank->slock, flags); |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 633 | dev_err(info->dev, "unsupported pull setting %d\n", |
| 634 | pull); |
| 635 | return -EINVAL; |
| 636 | } |
| 637 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 638 | ret = regmap_write(regmap, reg, data); |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 639 | |
| 640 | spin_unlock_irqrestore(&bank->slock, flags); |
| 641 | break; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 642 | default: |
| 643 | dev_err(info->dev, "unsupported pinctrl type\n"); |
| 644 | return -EINVAL; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 645 | } |
| 646 | |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 647 | return ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 648 | } |
| 649 | |
| 650 | /* |
| 651 | * Pinmux_ops handling |
| 652 | */ |
| 653 | |
| 654 | static int rockchip_pmx_get_funcs_count(struct pinctrl_dev *pctldev) |
| 655 | { |
| 656 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 657 | |
| 658 | return info->nfunctions; |
| 659 | } |
| 660 | |
| 661 | static const char *rockchip_pmx_get_func_name(struct pinctrl_dev *pctldev, |
| 662 | unsigned selector) |
| 663 | { |
| 664 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 665 | |
| 666 | return info->functions[selector].name; |
| 667 | } |
| 668 | |
| 669 | static int rockchip_pmx_get_groups(struct pinctrl_dev *pctldev, |
| 670 | unsigned selector, const char * const **groups, |
| 671 | unsigned * const num_groups) |
| 672 | { |
| 673 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 674 | |
| 675 | *groups = info->functions[selector].groups; |
| 676 | *num_groups = info->functions[selector].ngroups; |
| 677 | |
| 678 | return 0; |
| 679 | } |
| 680 | |
| 681 | static int rockchip_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, |
| 682 | unsigned group) |
| 683 | { |
| 684 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 685 | const unsigned int *pins = info->groups[group].pins; |
| 686 | const struct rockchip_pin_config *data = info->groups[group].data; |
| 687 | struct rockchip_pin_bank *bank; |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 688 | int cnt, ret = 0; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 689 | |
| 690 | dev_dbg(info->dev, "enable function %s group %s\n", |
| 691 | info->functions[selector].name, info->groups[group].name); |
| 692 | |
| 693 | /* |
| 694 | * for each pin in the pin group selected, program the correspoding pin |
| 695 | * pin function number in the config register. |
| 696 | */ |
| 697 | for (cnt = 0; cnt < info->groups[group].npins; cnt++) { |
| 698 | bank = pin_to_bank(info, pins[cnt]); |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 699 | ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, |
| 700 | data[cnt].func); |
| 701 | if (ret) |
| 702 | break; |
| 703 | } |
| 704 | |
| 705 | if (ret) { |
| 706 | /* revert the already done pin settings */ |
| 707 | for (cnt--; cnt >= 0; cnt--) |
| 708 | rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); |
| 709 | |
| 710 | return ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 711 | } |
| 712 | |
| 713 | return 0; |
| 714 | } |
| 715 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 716 | /* |
| 717 | * The calls to gpio_direction_output() and gpio_direction_input() |
| 718 | * leads to this function call (via the pinctrl_gpio_direction_{input|output}() |
| 719 | * function called from the gpiolib interface). |
| 720 | */ |
| 721 | static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, |
| 722 | struct pinctrl_gpio_range *range, |
| 723 | unsigned offset, bool input) |
| 724 | { |
| 725 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 726 | struct rockchip_pin_bank *bank; |
| 727 | struct gpio_chip *chip; |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 728 | int pin, ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 729 | u32 data; |
| 730 | |
| 731 | chip = range->gc; |
| 732 | bank = gc_to_pin_bank(chip); |
| 733 | pin = offset - chip->base; |
| 734 | |
| 735 | dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n", |
| 736 | offset, range->name, pin, input ? "input" : "output"); |
| 737 | |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 738 | ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); |
| 739 | if (ret < 0) |
| 740 | return ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 741 | |
| 742 | data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); |
| 743 | /* set bit to 1 for output, 0 for input */ |
| 744 | if (!input) |
| 745 | data |= BIT(pin); |
| 746 | else |
| 747 | data &= ~BIT(pin); |
| 748 | writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); |
| 749 | |
| 750 | return 0; |
| 751 | } |
| 752 | |
| 753 | static const struct pinmux_ops rockchip_pmx_ops = { |
| 754 | .get_functions_count = rockchip_pmx_get_funcs_count, |
| 755 | .get_function_name = rockchip_pmx_get_func_name, |
| 756 | .get_function_groups = rockchip_pmx_get_groups, |
| 757 | .enable = rockchip_pmx_enable, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 758 | .gpio_set_direction = rockchip_pmx_gpio_set_direction, |
| 759 | }; |
| 760 | |
| 761 | /* |
| 762 | * Pinconf_ops handling |
| 763 | */ |
| 764 | |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 765 | static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl, |
| 766 | enum pin_config_param pull) |
| 767 | { |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 768 | switch (ctrl->type) { |
| 769 | case RK2928: |
| 770 | return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT || |
| 771 | pull == PIN_CONFIG_BIAS_DISABLE); |
| 772 | case RK3066B: |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 773 | return pull ? false : true; |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 774 | case RK3188: |
| 775 | return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT); |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 776 | } |
| 777 | |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 778 | return false; |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 779 | } |
| 780 | |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 781 | static int rockchip_gpio_direction_output(struct gpio_chip *gc, |
| 782 | unsigned offset, int value); |
| 783 | static int rockchip_gpio_get(struct gpio_chip *gc, unsigned offset); |
| 784 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 785 | /* set the pin config settings for a specified pin */ |
| 786 | static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 787 | unsigned long *configs, unsigned num_configs) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 788 | { |
| 789 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 790 | struct rockchip_pin_bank *bank = pin_to_bank(info, pin); |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 791 | enum pin_config_param param; |
| 792 | u16 arg; |
| 793 | int i; |
| 794 | int rc; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 795 | |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 796 | for (i = 0; i < num_configs; i++) { |
| 797 | param = pinconf_to_config_param(configs[i]); |
| 798 | arg = pinconf_to_config_argument(configs[i]); |
| 799 | |
| 800 | switch (param) { |
| 801 | case PIN_CONFIG_BIAS_DISABLE: |
| 802 | rc = rockchip_set_pull(bank, pin - bank->pin_base, |
| 803 | param); |
| 804 | if (rc) |
| 805 | return rc; |
| 806 | break; |
| 807 | case PIN_CONFIG_BIAS_PULL_UP: |
| 808 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 809 | case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 810 | case PIN_CONFIG_BIAS_BUS_HOLD: |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 811 | if (!rockchip_pinconf_pull_valid(info->ctrl, param)) |
| 812 | return -ENOTSUPP; |
| 813 | |
| 814 | if (!arg) |
| 815 | return -EINVAL; |
| 816 | |
| 817 | rc = rockchip_set_pull(bank, pin - bank->pin_base, |
| 818 | param); |
| 819 | if (rc) |
| 820 | return rc; |
| 821 | break; |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 822 | case PIN_CONFIG_OUTPUT: |
| 823 | rc = rockchip_gpio_direction_output(&bank->gpio_chip, |
| 824 | pin - bank->pin_base, |
| 825 | arg); |
| 826 | if (rc) |
| 827 | return rc; |
| 828 | break; |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 829 | default: |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 830 | return -ENOTSUPP; |
Sherman Yin | 03b054e | 2013-08-27 11:32:12 -0700 | [diff] [blame] | 831 | break; |
| 832 | } |
| 833 | } /* for each config */ |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 834 | |
| 835 | return 0; |
| 836 | } |
| 837 | |
| 838 | /* get the pin config settings for a specified pin */ |
| 839 | static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, |
| 840 | unsigned long *config) |
| 841 | { |
| 842 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
| 843 | struct rockchip_pin_bank *bank = pin_to_bank(info, pin); |
| 844 | enum pin_config_param param = pinconf_to_config_param(*config); |
Heiko Stübner | dab3eba | 2014-04-23 14:27:51 +0200 | [diff] [blame] | 845 | u16 arg; |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 846 | int rc; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 847 | |
| 848 | switch (param) { |
| 849 | case PIN_CONFIG_BIAS_DISABLE: |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 850 | if (rockchip_get_pull(bank, pin - bank->pin_base) != param) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 851 | return -EINVAL; |
| 852 | |
Heiko Stübner | dab3eba | 2014-04-23 14:27:51 +0200 | [diff] [blame] | 853 | arg = 0; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 854 | break; |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 855 | case PIN_CONFIG_BIAS_PULL_UP: |
| 856 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| 857 | case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 858 | case PIN_CONFIG_BIAS_BUS_HOLD: |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 859 | if (!rockchip_pinconf_pull_valid(info->ctrl, param)) |
| 860 | return -ENOTSUPP; |
| 861 | |
| 862 | if (rockchip_get_pull(bank, pin - bank->pin_base) != param) |
| 863 | return -EINVAL; |
| 864 | |
Heiko Stübner | dab3eba | 2014-04-23 14:27:51 +0200 | [diff] [blame] | 865 | arg = 1; |
Heiko Stübner | 44b6d93 | 2013-06-16 17:41:16 +0200 | [diff] [blame] | 866 | break; |
Heiko Stübner | a076e2e | 2014-04-23 14:28:59 +0200 | [diff] [blame] | 867 | case PIN_CONFIG_OUTPUT: |
| 868 | rc = rockchip_get_mux(bank, pin - bank->pin_base); |
| 869 | if (rc != RK_FUNC_GPIO) |
| 870 | return -EINVAL; |
| 871 | |
| 872 | rc = rockchip_gpio_get(&bank->gpio_chip, pin - bank->pin_base); |
| 873 | if (rc < 0) |
| 874 | return rc; |
| 875 | |
| 876 | arg = rc ? 1 : 0; |
| 877 | break; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 878 | default: |
| 879 | return -ENOTSUPP; |
| 880 | break; |
| 881 | } |
| 882 | |
Heiko Stübner | dab3eba | 2014-04-23 14:27:51 +0200 | [diff] [blame] | 883 | *config = pinconf_to_config_packed(param, arg); |
| 884 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 885 | return 0; |
| 886 | } |
| 887 | |
| 888 | static const struct pinconf_ops rockchip_pinconf_ops = { |
| 889 | .pin_config_get = rockchip_pinconf_get, |
| 890 | .pin_config_set = rockchip_pinconf_set, |
| 891 | }; |
| 892 | |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 893 | static const struct of_device_id rockchip_bank_match[] = { |
| 894 | { .compatible = "rockchip,gpio-bank" }, |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 895 | { .compatible = "rockchip,rk3188-gpio-bank0" }, |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 896 | {}, |
| 897 | }; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 898 | |
| 899 | static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info, |
| 900 | struct device_node *np) |
| 901 | { |
| 902 | struct device_node *child; |
| 903 | |
| 904 | for_each_child_of_node(np, child) { |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 905 | if (of_match_node(rockchip_bank_match, child)) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 906 | continue; |
| 907 | |
| 908 | info->nfunctions++; |
| 909 | info->ngroups += of_get_child_count(child); |
| 910 | } |
| 911 | } |
| 912 | |
| 913 | static int rockchip_pinctrl_parse_groups(struct device_node *np, |
| 914 | struct rockchip_pin_group *grp, |
| 915 | struct rockchip_pinctrl *info, |
| 916 | u32 index) |
| 917 | { |
| 918 | struct rockchip_pin_bank *bank; |
| 919 | int size; |
| 920 | const __be32 *list; |
| 921 | int num; |
| 922 | int i, j; |
| 923 | int ret; |
| 924 | |
| 925 | dev_dbg(info->dev, "group(%d): %s\n", index, np->name); |
| 926 | |
| 927 | /* Initialise group */ |
| 928 | grp->name = np->name; |
| 929 | |
| 930 | /* |
| 931 | * the binding format is rockchip,pins = <bank pin mux CONFIG>, |
| 932 | * do sanity check and calculate pins number |
| 933 | */ |
| 934 | list = of_get_property(np, "rockchip,pins", &size); |
| 935 | /* we do not check return since it's safe node passed down */ |
| 936 | size /= sizeof(*list); |
| 937 | if (!size || size % 4) { |
| 938 | dev_err(info->dev, "wrong pins number or pins and configs should be by 4\n"); |
| 939 | return -EINVAL; |
| 940 | } |
| 941 | |
| 942 | grp->npins = size / 4; |
| 943 | |
| 944 | grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), |
| 945 | GFP_KERNEL); |
| 946 | grp->data = devm_kzalloc(info->dev, grp->npins * |
| 947 | sizeof(struct rockchip_pin_config), |
| 948 | GFP_KERNEL); |
| 949 | if (!grp->pins || !grp->data) |
| 950 | return -ENOMEM; |
| 951 | |
| 952 | for (i = 0, j = 0; i < size; i += 4, j++) { |
| 953 | const __be32 *phandle; |
| 954 | struct device_node *np_config; |
| 955 | |
| 956 | num = be32_to_cpu(*list++); |
| 957 | bank = bank_num_to_bank(info, num); |
| 958 | if (IS_ERR(bank)) |
| 959 | return PTR_ERR(bank); |
| 960 | |
| 961 | grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); |
| 962 | grp->data[j].func = be32_to_cpu(*list++); |
| 963 | |
| 964 | phandle = list++; |
| 965 | if (!phandle) |
| 966 | return -EINVAL; |
| 967 | |
| 968 | np_config = of_find_node_by_phandle(be32_to_cpup(phandle)); |
| 969 | ret = pinconf_generic_parse_dt_config(np_config, |
| 970 | &grp->data[j].configs, &grp->data[j].nconfigs); |
| 971 | if (ret) |
| 972 | return ret; |
| 973 | } |
| 974 | |
| 975 | return 0; |
| 976 | } |
| 977 | |
| 978 | static int rockchip_pinctrl_parse_functions(struct device_node *np, |
| 979 | struct rockchip_pinctrl *info, |
| 980 | u32 index) |
| 981 | { |
| 982 | struct device_node *child; |
| 983 | struct rockchip_pmx_func *func; |
| 984 | struct rockchip_pin_group *grp; |
| 985 | int ret; |
| 986 | static u32 grp_index; |
| 987 | u32 i = 0; |
| 988 | |
| 989 | dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name); |
| 990 | |
| 991 | func = &info->functions[index]; |
| 992 | |
| 993 | /* Initialise function */ |
| 994 | func->name = np->name; |
| 995 | func->ngroups = of_get_child_count(np); |
| 996 | if (func->ngroups <= 0) |
| 997 | return 0; |
| 998 | |
| 999 | func->groups = devm_kzalloc(info->dev, |
| 1000 | func->ngroups * sizeof(char *), GFP_KERNEL); |
| 1001 | if (!func->groups) |
| 1002 | return -ENOMEM; |
| 1003 | |
| 1004 | for_each_child_of_node(np, child) { |
| 1005 | func->groups[i] = child->name; |
| 1006 | grp = &info->groups[grp_index++]; |
| 1007 | ret = rockchip_pinctrl_parse_groups(child, grp, info, i++); |
| 1008 | if (ret) |
| 1009 | return ret; |
| 1010 | } |
| 1011 | |
| 1012 | return 0; |
| 1013 | } |
| 1014 | |
| 1015 | static int rockchip_pinctrl_parse_dt(struct platform_device *pdev, |
| 1016 | struct rockchip_pinctrl *info) |
| 1017 | { |
| 1018 | struct device *dev = &pdev->dev; |
| 1019 | struct device_node *np = dev->of_node; |
| 1020 | struct device_node *child; |
| 1021 | int ret; |
| 1022 | int i; |
| 1023 | |
| 1024 | rockchip_pinctrl_child_count(info, np); |
| 1025 | |
| 1026 | dev_dbg(&pdev->dev, "nfunctions = %d\n", info->nfunctions); |
| 1027 | dev_dbg(&pdev->dev, "ngroups = %d\n", info->ngroups); |
| 1028 | |
| 1029 | info->functions = devm_kzalloc(dev, info->nfunctions * |
| 1030 | sizeof(struct rockchip_pmx_func), |
| 1031 | GFP_KERNEL); |
| 1032 | if (!info->functions) { |
| 1033 | dev_err(dev, "failed to allocate memory for function list\n"); |
| 1034 | return -EINVAL; |
| 1035 | } |
| 1036 | |
| 1037 | info->groups = devm_kzalloc(dev, info->ngroups * |
| 1038 | sizeof(struct rockchip_pin_group), |
| 1039 | GFP_KERNEL); |
| 1040 | if (!info->groups) { |
| 1041 | dev_err(dev, "failed allocate memory for ping group list\n"); |
| 1042 | return -EINVAL; |
| 1043 | } |
| 1044 | |
| 1045 | i = 0; |
| 1046 | |
| 1047 | for_each_child_of_node(np, child) { |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 1048 | if (of_match_node(rockchip_bank_match, child)) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1049 | continue; |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 1050 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1051 | ret = rockchip_pinctrl_parse_functions(child, info, i++); |
| 1052 | if (ret) { |
| 1053 | dev_err(&pdev->dev, "failed to parse function\n"); |
| 1054 | return ret; |
| 1055 | } |
| 1056 | } |
| 1057 | |
| 1058 | return 0; |
| 1059 | } |
| 1060 | |
| 1061 | static int rockchip_pinctrl_register(struct platform_device *pdev, |
| 1062 | struct rockchip_pinctrl *info) |
| 1063 | { |
| 1064 | struct pinctrl_desc *ctrldesc = &info->pctl; |
| 1065 | struct pinctrl_pin_desc *pindesc, *pdesc; |
| 1066 | struct rockchip_pin_bank *pin_bank; |
| 1067 | int pin, bank, ret; |
| 1068 | int k; |
| 1069 | |
| 1070 | ctrldesc->name = "rockchip-pinctrl"; |
| 1071 | ctrldesc->owner = THIS_MODULE; |
| 1072 | ctrldesc->pctlops = &rockchip_pctrl_ops; |
| 1073 | ctrldesc->pmxops = &rockchip_pmx_ops; |
| 1074 | ctrldesc->confops = &rockchip_pinconf_ops; |
| 1075 | |
| 1076 | pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * |
| 1077 | info->ctrl->nr_pins, GFP_KERNEL); |
| 1078 | if (!pindesc) { |
| 1079 | dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n"); |
| 1080 | return -ENOMEM; |
| 1081 | } |
| 1082 | ctrldesc->pins = pindesc; |
| 1083 | ctrldesc->npins = info->ctrl->nr_pins; |
| 1084 | |
| 1085 | pdesc = pindesc; |
| 1086 | for (bank = 0 , k = 0; bank < info->ctrl->nr_banks; bank++) { |
| 1087 | pin_bank = &info->ctrl->pin_banks[bank]; |
| 1088 | for (pin = 0; pin < pin_bank->nr_pins; pin++, k++) { |
| 1089 | pdesc->number = k; |
| 1090 | pdesc->name = kasprintf(GFP_KERNEL, "%s-%d", |
| 1091 | pin_bank->name, pin); |
| 1092 | pdesc++; |
| 1093 | } |
| 1094 | } |
| 1095 | |
| 1096 | info->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, info); |
| 1097 | if (!info->pctl_dev) { |
| 1098 | dev_err(&pdev->dev, "could not register pinctrl driver\n"); |
| 1099 | return -EINVAL; |
| 1100 | } |
| 1101 | |
| 1102 | for (bank = 0; bank < info->ctrl->nr_banks; ++bank) { |
| 1103 | pin_bank = &info->ctrl->pin_banks[bank]; |
| 1104 | pin_bank->grange.name = pin_bank->name; |
| 1105 | pin_bank->grange.id = bank; |
| 1106 | pin_bank->grange.pin_base = pin_bank->pin_base; |
| 1107 | pin_bank->grange.base = pin_bank->gpio_chip.base; |
| 1108 | pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; |
| 1109 | pin_bank->grange.gc = &pin_bank->gpio_chip; |
| 1110 | pinctrl_add_gpio_range(info->pctl_dev, &pin_bank->grange); |
| 1111 | } |
| 1112 | |
| 1113 | ret = rockchip_pinctrl_parse_dt(pdev, info); |
| 1114 | if (ret) { |
| 1115 | pinctrl_unregister(info->pctl_dev); |
| 1116 | return ret; |
| 1117 | } |
| 1118 | |
| 1119 | return 0; |
| 1120 | } |
| 1121 | |
| 1122 | /* |
| 1123 | * GPIO handling |
| 1124 | */ |
| 1125 | |
Axel Lin | 0351c28 | 2013-08-27 22:30:17 +0800 | [diff] [blame] | 1126 | static int rockchip_gpio_request(struct gpio_chip *chip, unsigned offset) |
| 1127 | { |
| 1128 | return pinctrl_request_gpio(chip->base + offset); |
| 1129 | } |
| 1130 | |
| 1131 | static void rockchip_gpio_free(struct gpio_chip *chip, unsigned offset) |
| 1132 | { |
| 1133 | pinctrl_free_gpio(chip->base + offset); |
| 1134 | } |
| 1135 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1136 | static void rockchip_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
| 1137 | { |
| 1138 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); |
| 1139 | void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; |
| 1140 | unsigned long flags; |
| 1141 | u32 data; |
| 1142 | |
| 1143 | spin_lock_irqsave(&bank->slock, flags); |
| 1144 | |
| 1145 | data = readl(reg); |
| 1146 | data &= ~BIT(offset); |
| 1147 | if (value) |
| 1148 | data |= BIT(offset); |
| 1149 | writel(data, reg); |
| 1150 | |
| 1151 | spin_unlock_irqrestore(&bank->slock, flags); |
| 1152 | } |
| 1153 | |
| 1154 | /* |
| 1155 | * Returns the level of the pin for input direction and setting of the DR |
| 1156 | * register for output gpios. |
| 1157 | */ |
| 1158 | static int rockchip_gpio_get(struct gpio_chip *gc, unsigned offset) |
| 1159 | { |
| 1160 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); |
| 1161 | u32 data; |
| 1162 | |
| 1163 | data = readl(bank->reg_base + GPIO_EXT_PORT); |
| 1164 | data >>= offset; |
| 1165 | data &= 1; |
| 1166 | return data; |
| 1167 | } |
| 1168 | |
| 1169 | /* |
| 1170 | * gpiolib gpio_direction_input callback function. The setting of the pin |
| 1171 | * mux function as 'gpio input' will be handled by the pinctrl susbsystem |
| 1172 | * interface. |
| 1173 | */ |
| 1174 | static int rockchip_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
| 1175 | { |
| 1176 | return pinctrl_gpio_direction_input(gc->base + offset); |
| 1177 | } |
| 1178 | |
| 1179 | /* |
| 1180 | * gpiolib gpio_direction_output callback function. The setting of the pin |
| 1181 | * mux function as 'gpio output' will be handled by the pinctrl susbsystem |
| 1182 | * interface. |
| 1183 | */ |
| 1184 | static int rockchip_gpio_direction_output(struct gpio_chip *gc, |
| 1185 | unsigned offset, int value) |
| 1186 | { |
| 1187 | rockchip_gpio_set(gc, offset, value); |
| 1188 | return pinctrl_gpio_direction_output(gc->base + offset); |
| 1189 | } |
| 1190 | |
| 1191 | /* |
| 1192 | * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin |
| 1193 | * and a virtual IRQ, if not already present. |
| 1194 | */ |
| 1195 | static int rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
| 1196 | { |
| 1197 | struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); |
| 1198 | unsigned int virq; |
| 1199 | |
| 1200 | if (!bank->domain) |
| 1201 | return -ENXIO; |
| 1202 | |
| 1203 | virq = irq_create_mapping(bank->domain, offset); |
| 1204 | |
| 1205 | return (virq) ? : -ENXIO; |
| 1206 | } |
| 1207 | |
| 1208 | static const struct gpio_chip rockchip_gpiolib_chip = { |
Axel Lin | 0351c28 | 2013-08-27 22:30:17 +0800 | [diff] [blame] | 1209 | .request = rockchip_gpio_request, |
| 1210 | .free = rockchip_gpio_free, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1211 | .set = rockchip_gpio_set, |
| 1212 | .get = rockchip_gpio_get, |
| 1213 | .direction_input = rockchip_gpio_direction_input, |
| 1214 | .direction_output = rockchip_gpio_direction_output, |
| 1215 | .to_irq = rockchip_gpio_to_irq, |
| 1216 | .owner = THIS_MODULE, |
| 1217 | }; |
| 1218 | |
| 1219 | /* |
| 1220 | * Interrupt handling |
| 1221 | */ |
| 1222 | |
| 1223 | static void rockchip_irq_demux(unsigned int irq, struct irq_desc *desc) |
| 1224 | { |
| 1225 | struct irq_chip *chip = irq_get_chip(irq); |
| 1226 | struct rockchip_pin_bank *bank = irq_get_handler_data(irq); |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1227 | u32 polarity = 0, data = 0; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1228 | u32 pend; |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1229 | bool edge_changed = false; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1230 | |
| 1231 | dev_dbg(bank->drvdata->dev, "got irq for bank %s\n", bank->name); |
| 1232 | |
| 1233 | chained_irq_enter(chip, desc); |
| 1234 | |
| 1235 | pend = readl_relaxed(bank->reg_base + GPIO_INT_STATUS); |
| 1236 | |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1237 | if (bank->toggle_edge_mode) { |
| 1238 | polarity = readl_relaxed(bank->reg_base + |
| 1239 | GPIO_INT_POLARITY); |
| 1240 | data = readl_relaxed(bank->reg_base + GPIO_EXT_PORT); |
| 1241 | } |
| 1242 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1243 | while (pend) { |
| 1244 | unsigned int virq; |
| 1245 | |
| 1246 | irq = __ffs(pend); |
| 1247 | pend &= ~BIT(irq); |
| 1248 | virq = irq_linear_revmap(bank->domain, irq); |
| 1249 | |
| 1250 | if (!virq) { |
| 1251 | dev_err(bank->drvdata->dev, "unmapped irq %d\n", irq); |
| 1252 | continue; |
| 1253 | } |
| 1254 | |
| 1255 | dev_dbg(bank->drvdata->dev, "handling irq %d\n", irq); |
| 1256 | |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1257 | /* |
| 1258 | * Triggering IRQ on both rising and falling edge |
| 1259 | * needs manual intervention. |
| 1260 | */ |
| 1261 | if (bank->toggle_edge_mode & BIT(irq)) { |
| 1262 | if (data & BIT(irq)) |
| 1263 | polarity &= ~BIT(irq); |
| 1264 | else |
| 1265 | polarity |= BIT(irq); |
| 1266 | |
| 1267 | edge_changed = true; |
| 1268 | } |
| 1269 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1270 | generic_handle_irq(virq); |
| 1271 | } |
| 1272 | |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1273 | if (bank->toggle_edge_mode && edge_changed) { |
| 1274 | /* Interrupt params should only be set with ints disabled */ |
| 1275 | data = readl_relaxed(bank->reg_base + GPIO_INTEN); |
| 1276 | writel_relaxed(0, bank->reg_base + GPIO_INTEN); |
| 1277 | writel(polarity, bank->reg_base + GPIO_INT_POLARITY); |
| 1278 | writel(data, bank->reg_base + GPIO_INTEN); |
| 1279 | } |
| 1280 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1281 | chained_irq_exit(chip, desc); |
| 1282 | } |
| 1283 | |
| 1284 | static int rockchip_irq_set_type(struct irq_data *d, unsigned int type) |
| 1285 | { |
| 1286 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 1287 | struct rockchip_pin_bank *bank = gc->private; |
| 1288 | u32 mask = BIT(d->hwirq); |
| 1289 | u32 polarity; |
| 1290 | u32 level; |
| 1291 | u32 data; |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 1292 | int ret; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1293 | |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1294 | /* make sure the pin is configured as gpio input */ |
Heiko Stübner | 1479718 | 2014-03-26 00:57:00 +0100 | [diff] [blame] | 1295 | ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO); |
| 1296 | if (ret < 0) |
| 1297 | return ret; |
| 1298 | |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1299 | data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); |
| 1300 | data &= ~mask; |
| 1301 | writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); |
| 1302 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1303 | if (type & IRQ_TYPE_EDGE_BOTH) |
| 1304 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
| 1305 | else |
| 1306 | __irq_set_handler_locked(d->irq, handle_level_irq); |
| 1307 | |
| 1308 | irq_gc_lock(gc); |
| 1309 | |
| 1310 | level = readl_relaxed(gc->reg_base + GPIO_INTTYPE_LEVEL); |
| 1311 | polarity = readl_relaxed(gc->reg_base + GPIO_INT_POLARITY); |
| 1312 | |
| 1313 | switch (type) { |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1314 | case IRQ_TYPE_EDGE_BOTH: |
| 1315 | bank->toggle_edge_mode |= mask; |
| 1316 | level |= mask; |
| 1317 | |
| 1318 | /* |
| 1319 | * Determine gpio state. If 1 next interrupt should be falling |
| 1320 | * otherwise rising. |
| 1321 | */ |
| 1322 | data = readl(bank->reg_base + GPIO_EXT_PORT); |
| 1323 | if (data & mask) |
| 1324 | polarity &= ~mask; |
| 1325 | else |
| 1326 | polarity |= mask; |
| 1327 | break; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1328 | case IRQ_TYPE_EDGE_RISING: |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1329 | bank->toggle_edge_mode &= ~mask; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1330 | level |= mask; |
| 1331 | polarity |= mask; |
| 1332 | break; |
| 1333 | case IRQ_TYPE_EDGE_FALLING: |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1334 | bank->toggle_edge_mode &= ~mask; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1335 | level |= mask; |
| 1336 | polarity &= ~mask; |
| 1337 | break; |
| 1338 | case IRQ_TYPE_LEVEL_HIGH: |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1339 | bank->toggle_edge_mode &= ~mask; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1340 | level &= ~mask; |
| 1341 | polarity |= mask; |
| 1342 | break; |
| 1343 | case IRQ_TYPE_LEVEL_LOW: |
Heiko Stübner | 5a92750 | 2013-10-16 01:09:08 +0200 | [diff] [blame] | 1344 | bank->toggle_edge_mode &= ~mask; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1345 | level &= ~mask; |
| 1346 | polarity &= ~mask; |
| 1347 | break; |
| 1348 | default: |
Axel Lin | 7cc5f97 | 2013-06-23 08:48:34 +0800 | [diff] [blame] | 1349 | irq_gc_unlock(gc); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1350 | return -EINVAL; |
| 1351 | } |
| 1352 | |
| 1353 | writel_relaxed(level, gc->reg_base + GPIO_INTTYPE_LEVEL); |
| 1354 | writel_relaxed(polarity, gc->reg_base + GPIO_INT_POLARITY); |
| 1355 | |
| 1356 | irq_gc_unlock(gc); |
| 1357 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1358 | return 0; |
| 1359 | } |
| 1360 | |
| 1361 | static int rockchip_interrupts_register(struct platform_device *pdev, |
| 1362 | struct rockchip_pinctrl *info) |
| 1363 | { |
| 1364 | struct rockchip_pin_ctrl *ctrl = info->ctrl; |
| 1365 | struct rockchip_pin_bank *bank = ctrl->pin_banks; |
| 1366 | unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; |
| 1367 | struct irq_chip_generic *gc; |
| 1368 | int ret; |
| 1369 | int i; |
| 1370 | |
| 1371 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { |
| 1372 | if (!bank->valid) { |
| 1373 | dev_warn(&pdev->dev, "bank %s is not valid\n", |
| 1374 | bank->name); |
| 1375 | continue; |
| 1376 | } |
| 1377 | |
| 1378 | bank->domain = irq_domain_add_linear(bank->of_node, 32, |
| 1379 | &irq_generic_chip_ops, NULL); |
| 1380 | if (!bank->domain) { |
| 1381 | dev_warn(&pdev->dev, "could not initialize irq domain for bank %s\n", |
| 1382 | bank->name); |
| 1383 | continue; |
| 1384 | } |
| 1385 | |
| 1386 | ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, |
| 1387 | "rockchip_gpio_irq", handle_level_irq, |
| 1388 | clr, 0, IRQ_GC_INIT_MASK_CACHE); |
| 1389 | if (ret) { |
| 1390 | dev_err(&pdev->dev, "could not alloc generic chips for bank %s\n", |
| 1391 | bank->name); |
| 1392 | irq_domain_remove(bank->domain); |
| 1393 | continue; |
| 1394 | } |
| 1395 | |
| 1396 | gc = irq_get_domain_generic_chip(bank->domain, 0); |
| 1397 | gc->reg_base = bank->reg_base; |
| 1398 | gc->private = bank; |
| 1399 | gc->chip_types[0].regs.mask = GPIO_INTEN; |
| 1400 | gc->chip_types[0].regs.ack = GPIO_PORTS_EOI; |
| 1401 | gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; |
| 1402 | gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; |
| 1403 | gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; |
| 1404 | gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; |
| 1405 | gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; |
| 1406 | |
| 1407 | irq_set_handler_data(bank->irq, bank); |
| 1408 | irq_set_chained_handler(bank->irq, rockchip_irq_demux); |
| 1409 | } |
| 1410 | |
| 1411 | return 0; |
| 1412 | } |
| 1413 | |
| 1414 | static int rockchip_gpiolib_register(struct platform_device *pdev, |
| 1415 | struct rockchip_pinctrl *info) |
| 1416 | { |
| 1417 | struct rockchip_pin_ctrl *ctrl = info->ctrl; |
| 1418 | struct rockchip_pin_bank *bank = ctrl->pin_banks; |
| 1419 | struct gpio_chip *gc; |
| 1420 | int ret; |
| 1421 | int i; |
| 1422 | |
| 1423 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { |
| 1424 | if (!bank->valid) { |
| 1425 | dev_warn(&pdev->dev, "bank %s is not valid\n", |
| 1426 | bank->name); |
| 1427 | continue; |
| 1428 | } |
| 1429 | |
| 1430 | bank->gpio_chip = rockchip_gpiolib_chip; |
| 1431 | |
| 1432 | gc = &bank->gpio_chip; |
| 1433 | gc->base = bank->pin_base; |
| 1434 | gc->ngpio = bank->nr_pins; |
| 1435 | gc->dev = &pdev->dev; |
| 1436 | gc->of_node = bank->of_node; |
| 1437 | gc->label = bank->name; |
| 1438 | |
| 1439 | ret = gpiochip_add(gc); |
| 1440 | if (ret) { |
| 1441 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", |
| 1442 | gc->label, ret); |
| 1443 | goto fail; |
| 1444 | } |
| 1445 | } |
| 1446 | |
| 1447 | rockchip_interrupts_register(pdev, info); |
| 1448 | |
| 1449 | return 0; |
| 1450 | |
| 1451 | fail: |
| 1452 | for (--i, --bank; i >= 0; --i, --bank) { |
| 1453 | if (!bank->valid) |
| 1454 | continue; |
| 1455 | |
| 1456 | if (gpiochip_remove(&bank->gpio_chip)) |
| 1457 | dev_err(&pdev->dev, "gpio chip %s remove failed\n", |
| 1458 | bank->gpio_chip.label); |
| 1459 | } |
| 1460 | return ret; |
| 1461 | } |
| 1462 | |
| 1463 | static int rockchip_gpiolib_unregister(struct platform_device *pdev, |
| 1464 | struct rockchip_pinctrl *info) |
| 1465 | { |
| 1466 | struct rockchip_pin_ctrl *ctrl = info->ctrl; |
| 1467 | struct rockchip_pin_bank *bank = ctrl->pin_banks; |
| 1468 | int ret = 0; |
| 1469 | int i; |
| 1470 | |
| 1471 | for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank) { |
| 1472 | if (!bank->valid) |
| 1473 | continue; |
| 1474 | |
| 1475 | ret = gpiochip_remove(&bank->gpio_chip); |
| 1476 | } |
| 1477 | |
| 1478 | if (ret) |
| 1479 | dev_err(&pdev->dev, "gpio chip remove failed\n"); |
| 1480 | |
| 1481 | return ret; |
| 1482 | } |
| 1483 | |
| 1484 | static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, |
Heiko Stübner | 622f323 | 2014-05-05 13:58:46 +0200 | [diff] [blame] | 1485 | struct rockchip_pinctrl *info) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1486 | { |
| 1487 | struct resource res; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 1488 | void __iomem *base; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1489 | |
| 1490 | if (of_address_to_resource(bank->of_node, 0, &res)) { |
Heiko Stübner | 622f323 | 2014-05-05 13:58:46 +0200 | [diff] [blame] | 1491 | dev_err(info->dev, "cannot find IO resource for bank\n"); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1492 | return -ENOENT; |
| 1493 | } |
| 1494 | |
Heiko Stübner | 622f323 | 2014-05-05 13:58:46 +0200 | [diff] [blame] | 1495 | bank->reg_base = devm_ioremap_resource(info->dev, &res); |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1496 | if (IS_ERR(bank->reg_base)) |
| 1497 | return PTR_ERR(bank->reg_base); |
| 1498 | |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 1499 | /* |
| 1500 | * special case, where parts of the pull setting-registers are |
| 1501 | * part of the PMU register space |
| 1502 | */ |
| 1503 | if (of_device_is_compatible(bank->of_node, |
| 1504 | "rockchip,rk3188-gpio-bank0")) { |
Heiko Stübner | a658efa | 2014-05-05 13:59:30 +0200 | [diff] [blame] | 1505 | struct device_node *node; |
Heiko Stübner | bfc7a42 | 2014-05-05 13:58:00 +0200 | [diff] [blame] | 1506 | |
Heiko Stübner | a658efa | 2014-05-05 13:59:30 +0200 | [diff] [blame] | 1507 | node = of_parse_phandle(bank->of_node->parent, |
| 1508 | "rockchip,pmu", 0); |
| 1509 | if (!node) { |
| 1510 | if (of_address_to_resource(bank->of_node, 1, &res)) { |
| 1511 | dev_err(info->dev, "cannot find IO resource for bank\n"); |
| 1512 | return -ENOENT; |
| 1513 | } |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 1514 | |
Heiko Stübner | a658efa | 2014-05-05 13:59:30 +0200 | [diff] [blame] | 1515 | base = devm_ioremap_resource(info->dev, &res); |
| 1516 | if (IS_ERR(base)) |
| 1517 | return PTR_ERR(base); |
| 1518 | rockchip_regmap_config.max_register = |
| 1519 | resource_size(&res) - 4; |
| 1520 | rockchip_regmap_config.name = |
| 1521 | "rockchip,rk3188-gpio-bank0-pull"; |
| 1522 | bank->regmap_pull = devm_regmap_init_mmio(info->dev, |
| 1523 | base, |
| 1524 | &rockchip_regmap_config); |
| 1525 | } |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 1526 | } |
Heiko Stübner | 65fca61 | 2013-10-16 01:07:49 +0200 | [diff] [blame] | 1527 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1528 | bank->irq = irq_of_parse_and_map(bank->of_node, 0); |
| 1529 | |
| 1530 | bank->clk = of_clk_get(bank->of_node, 0); |
| 1531 | if (IS_ERR(bank->clk)) |
| 1532 | return PTR_ERR(bank->clk); |
| 1533 | |
| 1534 | return clk_prepare_enable(bank->clk); |
| 1535 | } |
| 1536 | |
| 1537 | static const struct of_device_id rockchip_pinctrl_dt_match[]; |
| 1538 | |
| 1539 | /* retrieve the soc specific data */ |
| 1540 | static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data( |
| 1541 | struct rockchip_pinctrl *d, |
| 1542 | struct platform_device *pdev) |
| 1543 | { |
| 1544 | const struct of_device_id *match; |
| 1545 | struct device_node *node = pdev->dev.of_node; |
| 1546 | struct device_node *np; |
| 1547 | struct rockchip_pin_ctrl *ctrl; |
| 1548 | struct rockchip_pin_bank *bank; |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1549 | int grf_offs, pmu_offs, i, j; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1550 | |
| 1551 | match = of_match_node(rockchip_pinctrl_dt_match, node); |
| 1552 | ctrl = (struct rockchip_pin_ctrl *)match->data; |
| 1553 | |
| 1554 | for_each_child_of_node(node, np) { |
| 1555 | if (!of_find_property(np, "gpio-controller", NULL)) |
| 1556 | continue; |
| 1557 | |
| 1558 | bank = ctrl->pin_banks; |
| 1559 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { |
| 1560 | if (!strcmp(bank->name, np->name)) { |
| 1561 | bank->of_node = np; |
| 1562 | |
Heiko Stübner | 622f323 | 2014-05-05 13:58:46 +0200 | [diff] [blame] | 1563 | if (!rockchip_get_bank_data(bank, d)) |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1564 | bank->valid = true; |
| 1565 | |
| 1566 | break; |
| 1567 | } |
| 1568 | } |
| 1569 | } |
| 1570 | |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1571 | grf_offs = ctrl->grf_mux_offset; |
| 1572 | pmu_offs = ctrl->pmu_mux_offset; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1573 | bank = ctrl->pin_banks; |
| 1574 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1575 | int bank_pins = 0; |
| 1576 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1577 | spin_lock_init(&bank->slock); |
| 1578 | bank->drvdata = d; |
| 1579 | bank->pin_base = ctrl->nr_pins; |
| 1580 | ctrl->nr_pins += bank->nr_pins; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1581 | |
| 1582 | /* calculate iomux offsets */ |
| 1583 | for (j = 0; j < 4; j++) { |
| 1584 | struct rockchip_iomux *iom = &bank->iomux[j]; |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 1585 | int inc; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1586 | |
| 1587 | if (bank_pins >= bank->nr_pins) |
| 1588 | break; |
| 1589 | |
| 1590 | /* preset offset value, set new start value */ |
| 1591 | if (iom->offset >= 0) { |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1592 | if (iom->type & IOMUX_SOURCE_PMU) |
| 1593 | pmu_offs = iom->offset; |
| 1594 | else |
| 1595 | grf_offs = iom->offset; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1596 | } else { /* set current offset */ |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1597 | iom->offset = (iom->type & IOMUX_SOURCE_PMU) ? |
| 1598 | pmu_offs : grf_offs; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1599 | } |
| 1600 | |
| 1601 | dev_dbg(d->dev, "bank %d, iomux %d has offset 0x%x\n", |
| 1602 | i, j, iom->offset); |
| 1603 | |
| 1604 | /* |
| 1605 | * Increase offset according to iomux width. |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 1606 | * 4bit iomux'es are spread over two registers. |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1607 | */ |
Heiko Stübner | 03716e1 | 2014-06-16 01:36:57 +0200 | [diff] [blame] | 1608 | inc = (iom->type & IOMUX_WIDTH_4BIT) ? 8 : 4; |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1609 | if (iom->type & IOMUX_SOURCE_PMU) |
| 1610 | pmu_offs += inc; |
| 1611 | else |
| 1612 | grf_offs += inc; |
Heiko Stübner | 6bc0d121 | 2014-06-16 01:36:33 +0200 | [diff] [blame] | 1613 | |
| 1614 | bank_pins += 8; |
| 1615 | } |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1616 | } |
| 1617 | |
| 1618 | return ctrl; |
| 1619 | } |
| 1620 | |
| 1621 | static int rockchip_pinctrl_probe(struct platform_device *pdev) |
| 1622 | { |
| 1623 | struct rockchip_pinctrl *info; |
| 1624 | struct device *dev = &pdev->dev; |
| 1625 | struct rockchip_pin_ctrl *ctrl; |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 1626 | struct device_node *np = pdev->dev.of_node, *node; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1627 | struct resource *res; |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 1628 | void __iomem *base; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1629 | int ret; |
| 1630 | |
| 1631 | if (!dev->of_node) { |
| 1632 | dev_err(dev, "device tree node not found\n"); |
| 1633 | return -ENODEV; |
| 1634 | } |
| 1635 | |
| 1636 | info = devm_kzalloc(dev, sizeof(struct rockchip_pinctrl), GFP_KERNEL); |
| 1637 | if (!info) |
| 1638 | return -ENOMEM; |
| 1639 | |
Heiko Stübner | 622f323 | 2014-05-05 13:58:46 +0200 | [diff] [blame] | 1640 | info->dev = dev; |
| 1641 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1642 | ctrl = rockchip_pinctrl_get_soc_data(info, pdev); |
| 1643 | if (!ctrl) { |
| 1644 | dev_err(dev, "driver data not available\n"); |
| 1645 | return -EINVAL; |
| 1646 | } |
| 1647 | info->ctrl = ctrl; |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1648 | |
Heiko Stübner | 1e747e5 | 2014-05-05 13:59:51 +0200 | [diff] [blame] | 1649 | node = of_parse_phandle(np, "rockchip,grf", 0); |
| 1650 | if (node) { |
| 1651 | info->regmap_base = syscon_node_to_regmap(node); |
| 1652 | if (IS_ERR(info->regmap_base)) |
| 1653 | return PTR_ERR(info->regmap_base); |
| 1654 | } else { |
| 1655 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Heiko Stübner | 751a99a | 2014-05-05 13:58:20 +0200 | [diff] [blame] | 1656 | base = devm_ioremap_resource(&pdev->dev, res); |
| 1657 | if (IS_ERR(base)) |
| 1658 | return PTR_ERR(base); |
| 1659 | |
| 1660 | rockchip_regmap_config.max_register = resource_size(res) - 4; |
Heiko Stübner | 1e747e5 | 2014-05-05 13:59:51 +0200 | [diff] [blame] | 1661 | rockchip_regmap_config.name = "rockchip,pinctrl"; |
| 1662 | info->regmap_base = devm_regmap_init_mmio(&pdev->dev, base, |
| 1663 | &rockchip_regmap_config); |
| 1664 | |
| 1665 | /* to check for the old dt-bindings */ |
| 1666 | info->reg_size = resource_size(res); |
| 1667 | |
| 1668 | /* Honor the old binding, with pull registers as 2nd resource */ |
| 1669 | if (ctrl->type == RK3188 && info->reg_size < 0x200) { |
| 1670 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 1671 | base = devm_ioremap_resource(&pdev->dev, res); |
| 1672 | if (IS_ERR(base)) |
| 1673 | return PTR_ERR(base); |
| 1674 | |
| 1675 | rockchip_regmap_config.max_register = |
| 1676 | resource_size(res) - 4; |
| 1677 | rockchip_regmap_config.name = "rockchip,pinctrl-pull"; |
| 1678 | info->regmap_pull = devm_regmap_init_mmio(&pdev->dev, |
| 1679 | base, |
| 1680 | &rockchip_regmap_config); |
| 1681 | } |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 1682 | } |
| 1683 | |
Heiko Stübner | 14dee86 | 2014-05-05 13:59:09 +0200 | [diff] [blame] | 1684 | /* try to find the optional reference to the pmu syscon */ |
| 1685 | node = of_parse_phandle(np, "rockchip,pmu", 0); |
| 1686 | if (node) { |
| 1687 | info->regmap_pmu = syscon_node_to_regmap(node); |
| 1688 | if (IS_ERR(info->regmap_pmu)) |
| 1689 | return PTR_ERR(info->regmap_pmu); |
| 1690 | } |
| 1691 | |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1692 | ret = rockchip_gpiolib_register(pdev, info); |
| 1693 | if (ret) |
| 1694 | return ret; |
| 1695 | |
| 1696 | ret = rockchip_pinctrl_register(pdev, info); |
| 1697 | if (ret) { |
| 1698 | rockchip_gpiolib_unregister(pdev, info); |
| 1699 | return ret; |
| 1700 | } |
| 1701 | |
| 1702 | platform_set_drvdata(pdev, info); |
| 1703 | |
| 1704 | return 0; |
| 1705 | } |
| 1706 | |
| 1707 | static struct rockchip_pin_bank rk2928_pin_banks[] = { |
| 1708 | PIN_BANK(0, 32, "gpio0"), |
| 1709 | PIN_BANK(1, 32, "gpio1"), |
| 1710 | PIN_BANK(2, 32, "gpio2"), |
| 1711 | PIN_BANK(3, 32, "gpio3"), |
| 1712 | }; |
| 1713 | |
| 1714 | static struct rockchip_pin_ctrl rk2928_pin_ctrl = { |
| 1715 | .pin_banks = rk2928_pin_banks, |
| 1716 | .nr_banks = ARRAY_SIZE(rk2928_pin_banks), |
| 1717 | .label = "RK2928-GPIO", |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1718 | .type = RK2928, |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1719 | .grf_mux_offset = 0xa8, |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1720 | .pull_calc_reg = rk2928_calc_pull_reg_and_bit, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1721 | }; |
| 1722 | |
| 1723 | static struct rockchip_pin_bank rk3066a_pin_banks[] = { |
| 1724 | PIN_BANK(0, 32, "gpio0"), |
| 1725 | PIN_BANK(1, 32, "gpio1"), |
| 1726 | PIN_BANK(2, 32, "gpio2"), |
| 1727 | PIN_BANK(3, 32, "gpio3"), |
| 1728 | PIN_BANK(4, 32, "gpio4"), |
| 1729 | PIN_BANK(6, 16, "gpio6"), |
| 1730 | }; |
| 1731 | |
| 1732 | static struct rockchip_pin_ctrl rk3066a_pin_ctrl = { |
| 1733 | .pin_banks = rk3066a_pin_banks, |
| 1734 | .nr_banks = ARRAY_SIZE(rk3066a_pin_banks), |
| 1735 | .label = "RK3066a-GPIO", |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1736 | .type = RK2928, |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1737 | .grf_mux_offset = 0xa8, |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1738 | .pull_calc_reg = rk2928_calc_pull_reg_and_bit, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1739 | }; |
| 1740 | |
| 1741 | static struct rockchip_pin_bank rk3066b_pin_banks[] = { |
| 1742 | PIN_BANK(0, 32, "gpio0"), |
| 1743 | PIN_BANK(1, 32, "gpio1"), |
| 1744 | PIN_BANK(2, 32, "gpio2"), |
| 1745 | PIN_BANK(3, 32, "gpio3"), |
| 1746 | }; |
| 1747 | |
| 1748 | static struct rockchip_pin_ctrl rk3066b_pin_ctrl = { |
| 1749 | .pin_banks = rk3066b_pin_banks, |
| 1750 | .nr_banks = ARRAY_SIZE(rk3066b_pin_banks), |
| 1751 | .label = "RK3066b-GPIO", |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1752 | .type = RK3066B, |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1753 | .grf_mux_offset = 0x60, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1754 | }; |
| 1755 | |
| 1756 | static struct rockchip_pin_bank rk3188_pin_banks[] = { |
Heiko Stübner | fc72c92 | 2014-06-16 01:36:05 +0200 | [diff] [blame] | 1757 | PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0), |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1758 | PIN_BANK(1, 32, "gpio1"), |
| 1759 | PIN_BANK(2, 32, "gpio2"), |
| 1760 | PIN_BANK(3, 32, "gpio3"), |
| 1761 | }; |
| 1762 | |
| 1763 | static struct rockchip_pin_ctrl rk3188_pin_ctrl = { |
| 1764 | .pin_banks = rk3188_pin_banks, |
| 1765 | .nr_banks = ARRAY_SIZE(rk3188_pin_banks), |
| 1766 | .label = "RK3188-GPIO", |
Heiko Stübner | a282926 | 2013-10-16 01:07:20 +0200 | [diff] [blame] | 1767 | .type = RK3188, |
Heiko Stübner | 95ec8ae | 2014-06-16 01:37:23 +0200 | [diff] [blame^] | 1768 | .grf_mux_offset = 0x60, |
Heiko Stübner | 6ca5274 | 2013-10-16 01:08:42 +0200 | [diff] [blame] | 1769 | .pull_calc_reg = rk3188_calc_pull_reg_and_bit, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1770 | }; |
| 1771 | |
| 1772 | static const struct of_device_id rockchip_pinctrl_dt_match[] = { |
| 1773 | { .compatible = "rockchip,rk2928-pinctrl", |
| 1774 | .data = (void *)&rk2928_pin_ctrl }, |
| 1775 | { .compatible = "rockchip,rk3066a-pinctrl", |
| 1776 | .data = (void *)&rk3066a_pin_ctrl }, |
| 1777 | { .compatible = "rockchip,rk3066b-pinctrl", |
| 1778 | .data = (void *)&rk3066b_pin_ctrl }, |
| 1779 | { .compatible = "rockchip,rk3188-pinctrl", |
| 1780 | .data = (void *)&rk3188_pin_ctrl }, |
| 1781 | {}, |
| 1782 | }; |
| 1783 | MODULE_DEVICE_TABLE(of, rockchip_pinctrl_dt_match); |
| 1784 | |
| 1785 | static struct platform_driver rockchip_pinctrl_driver = { |
| 1786 | .probe = rockchip_pinctrl_probe, |
| 1787 | .driver = { |
| 1788 | .name = "rockchip-pinctrl", |
| 1789 | .owner = THIS_MODULE, |
Axel Lin | 0be9e70 | 2013-08-23 14:27:53 +0800 | [diff] [blame] | 1790 | .of_match_table = rockchip_pinctrl_dt_match, |
Heiko Stübner | d3e5116 | 2013-06-10 22:16:22 +0200 | [diff] [blame] | 1791 | }, |
| 1792 | }; |
| 1793 | |
| 1794 | static int __init rockchip_pinctrl_drv_register(void) |
| 1795 | { |
| 1796 | return platform_driver_register(&rockchip_pinctrl_driver); |
| 1797 | } |
| 1798 | postcore_initcall(rockchip_pinctrl_drv_register); |
| 1799 | |
| 1800 | MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>"); |
| 1801 | MODULE_DESCRIPTION("Rockchip pinctrl driver"); |
| 1802 | MODULE_LICENSE("GPL v2"); |