Richard Cochran | 87c0e76 | 2012-10-29 08:45:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * TI Common Platform Time Sync |
| 3 | * |
| 4 | * Copyright (C) 2012 Richard Cochran <richardcochran@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | #ifndef _TI_CPTS_H_ |
| 21 | #define _TI_CPTS_H_ |
| 22 | |
| 23 | #include <linux/clk.h> |
| 24 | #include <linux/clkdev.h> |
| 25 | #include <linux/clocksource.h> |
| 26 | #include <linux/device.h> |
| 27 | #include <linux/list.h> |
| 28 | #include <linux/ptp_clock_kernel.h> |
| 29 | #include <linux/skbuff.h> |
| 30 | |
| 31 | struct cpsw_cpts { |
| 32 | u32 idver; /* Identification and version */ |
| 33 | u32 control; /* Time sync control */ |
| 34 | u32 res1; |
| 35 | u32 ts_push; /* Time stamp event push */ |
| 36 | u32 ts_load_val; /* Time stamp load value */ |
| 37 | u32 ts_load_en; /* Time stamp load enable */ |
| 38 | u32 res2[2]; |
| 39 | u32 intstat_raw; /* Time sync interrupt status raw */ |
| 40 | u32 intstat_masked; /* Time sync interrupt status masked */ |
| 41 | u32 int_enable; /* Time sync interrupt enable */ |
| 42 | u32 res3; |
| 43 | u32 event_pop; /* Event interrupt pop */ |
| 44 | u32 event_low; /* 32 Bit Event Time Stamp */ |
| 45 | u32 event_high; /* Event Type Fields */ |
| 46 | }; |
| 47 | |
| 48 | /* Bit definitions for the IDVER register */ |
| 49 | #define TX_IDENT_SHIFT (16) /* TX Identification Value */ |
| 50 | #define TX_IDENT_MASK (0xffff) |
| 51 | #define RTL_VER_SHIFT (11) /* RTL Version Value */ |
| 52 | #define RTL_VER_MASK (0x1f) |
| 53 | #define MAJOR_VER_SHIFT (8) /* Major Version Value */ |
| 54 | #define MAJOR_VER_MASK (0x7) |
| 55 | #define MINOR_VER_SHIFT (0) /* Minor Version Value */ |
| 56 | #define MINOR_VER_MASK (0xff) |
| 57 | |
| 58 | /* Bit definitions for the CONTROL register */ |
| 59 | #define HW4_TS_PUSH_EN (1<<11) /* Hardware push 4 enable */ |
| 60 | #define HW3_TS_PUSH_EN (1<<10) /* Hardware push 3 enable */ |
| 61 | #define HW2_TS_PUSH_EN (1<<9) /* Hardware push 2 enable */ |
| 62 | #define HW1_TS_PUSH_EN (1<<8) /* Hardware push 1 enable */ |
| 63 | #define INT_TEST (1<<1) /* Interrupt Test */ |
| 64 | #define CPTS_EN (1<<0) /* Time Sync Enable */ |
| 65 | |
| 66 | /* |
| 67 | * Definitions for the single bit resisters: |
| 68 | * TS_PUSH TS_LOAD_EN INTSTAT_RAW INTSTAT_MASKED INT_ENABLE EVENT_POP |
| 69 | */ |
| 70 | #define TS_PUSH (1<<0) /* Time stamp event push */ |
| 71 | #define TS_LOAD_EN (1<<0) /* Time Stamp Load */ |
| 72 | #define TS_PEND_RAW (1<<0) /* int read (before enable) */ |
| 73 | #define TS_PEND (1<<0) /* masked interrupt read (after enable) */ |
| 74 | #define TS_PEND_EN (1<<0) /* masked interrupt enable */ |
| 75 | #define EVENT_POP (1<<0) /* writing discards one event */ |
| 76 | |
| 77 | /* Bit definitions for the EVENT_HIGH register */ |
| 78 | #define PORT_NUMBER_SHIFT (24) /* Indicates Ethernet port or HW pin */ |
| 79 | #define PORT_NUMBER_MASK (0x1f) |
| 80 | #define EVENT_TYPE_SHIFT (20) /* Time sync event type */ |
| 81 | #define EVENT_TYPE_MASK (0xf) |
| 82 | #define MESSAGE_TYPE_SHIFT (16) /* PTP message type */ |
| 83 | #define MESSAGE_TYPE_MASK (0xf) |
| 84 | #define SEQUENCE_ID_SHIFT (0) /* PTP message sequence ID */ |
| 85 | #define SEQUENCE_ID_MASK (0xffff) |
| 86 | |
| 87 | enum { |
| 88 | CPTS_EV_PUSH, /* Time Stamp Push Event */ |
| 89 | CPTS_EV_ROLL, /* Time Stamp Rollover Event */ |
| 90 | CPTS_EV_HALF, /* Time Stamp Half Rollover Event */ |
| 91 | CPTS_EV_HW, /* Hardware Time Stamp Push Event */ |
| 92 | CPTS_EV_RX, /* Ethernet Receive Event */ |
| 93 | CPTS_EV_TX, /* Ethernet Transmit Event */ |
| 94 | }; |
| 95 | |
| 96 | /* This covers any input clock up to about 500 MHz. */ |
| 97 | #define CPTS_OVERFLOW_PERIOD (HZ * 8) |
| 98 | |
| 99 | #define CPTS_FIFO_DEPTH 16 |
| 100 | #define CPTS_MAX_EVENTS 32 |
| 101 | |
| 102 | struct cpts_event { |
| 103 | struct list_head list; |
| 104 | unsigned long tmo; |
| 105 | u32 high; |
| 106 | u32 low; |
| 107 | }; |
| 108 | |
| 109 | struct cpts { |
| 110 | struct cpsw_cpts __iomem *reg; |
| 111 | int tx_enable; |
| 112 | int rx_enable; |
| 113 | #ifdef CONFIG_TI_CPTS |
| 114 | struct ptp_clock_info info; |
| 115 | struct ptp_clock *clock; |
| 116 | spinlock_t lock; /* protects time registers */ |
| 117 | u32 cc_mult; /* for the nominal frequency */ |
| 118 | struct cyclecounter cc; |
| 119 | struct timecounter tc; |
| 120 | struct delayed_work overflow_work; |
| 121 | int phc_index; |
| 122 | struct clk *refclk; |
Richard Cochran | 87c0e76 | 2012-10-29 08:45:16 +0000 | [diff] [blame] | 123 | struct list_head events; |
| 124 | struct list_head pool; |
| 125 | struct cpts_event pool_data[CPTS_MAX_EVENTS]; |
| 126 | #endif |
| 127 | }; |
| 128 | |
| 129 | #ifdef CONFIG_TI_CPTS |
Joe Perches | 95f7f15 | 2013-09-23 11:37:59 -0700 | [diff] [blame^] | 130 | void cpts_rx_timestamp(struct cpts *cpts, struct sk_buff *skb); |
| 131 | void cpts_tx_timestamp(struct cpts *cpts, struct sk_buff *skb); |
Richard Cochran | 87c0e76 | 2012-10-29 08:45:16 +0000 | [diff] [blame] | 132 | #else |
| 133 | static inline void cpts_rx_timestamp(struct cpts *cpts, struct sk_buff *skb) |
| 134 | { |
| 135 | } |
| 136 | static inline void cpts_tx_timestamp(struct cpts *cpts, struct sk_buff *skb) |
| 137 | { |
| 138 | } |
| 139 | #endif |
| 140 | |
Joe Perches | 95f7f15 | 2013-09-23 11:37:59 -0700 | [diff] [blame^] | 141 | int cpts_register(struct device *dev, struct cpts *cpts, u32 mult, u32 shift); |
| 142 | void cpts_unregister(struct cpts *cpts); |
Richard Cochran | 87c0e76 | 2012-10-29 08:45:16 +0000 | [diff] [blame] | 143 | |
| 144 | #endif |