blob: aa73b4f4172c43091574ff12f6076abb8ef9c3b4 [file] [log] [blame]
Maxime Coquelin338a6aa2015-06-03 16:54:02 +02001/*
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include "armv7-m.dtsi"
49
50/ {
51 clocks {
52 clk_sysclk: clk-sysclk {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
55 clock-frequency = <180000000>;
56 };
57
58 clk_hclk: clk-hclk {
59 #clock-cells = <0>;
60 compatible = "fixed-clock";
61 clock-frequency = <180000000>;
62 };
63
64 clk_pclk1: clk-pclk1 {
65 #clock-cells = <0>;
66 compatible = "fixed-clock";
67 clock-frequency = <45000000>;
68 };
69
70 clk_pclk2: clk-pclk2 {
71 #clock-cells = <0>;
72 compatible = "fixed-clock";
73 clock-frequency = <90000000>;
74 };
75
76 clk_pmtr1: clk-pmtr1 {
77 #clock-cells = <0>;
78 compatible = "fixed-clock";
79 clock-frequency = <90000000>;
80 };
81
82 clk_pmtr2: clk-pmtr2 {
83 #clock-cells = <0>;
84 compatible = "fixed-clock";
85 clock-frequency = <180000000>;
86 };
87
88 clk_systick: clk-systick {
89 compatible = "fixed-factor-clock";
90 clocks = <&clk_hclk>;
91 #clock-cells = <0>;
92 clock-div = <8>;
93 clock-mult = <1>;
94 };
95 };
96
97 soc {
98 timer2: timer@40000000 {
99 compatible = "st,stm32-timer";
100 reg = <0x40000000 0x400>;
101 interrupts = <28>;
102 clocks = <&clk_pmtr1>;
103 status = "disabled";
104 };
105
106 timer3: timer@40000400 {
107 compatible = "st,stm32-timer";
108 reg = <0x40000400 0x400>;
109 interrupts = <29>;
110 clocks = <&clk_pmtr1>;
111 status = "disabled";
112 };
113
114 timer4: timer@40000800 {
115 compatible = "st,stm32-timer";
116 reg = <0x40000800 0x400>;
117 interrupts = <30>;
118 clocks = <&clk_pmtr1>;
119 status = "disabled";
120 };
121
122 timer5: timer@40000c00 {
123 compatible = "st,stm32-timer";
124 reg = <0x40000c00 0x400>;
125 interrupts = <50>;
126 clocks = <&clk_pmtr1>;
127 };
128
129 timer6: timer@40001000 {
130 compatible = "st,stm32-timer";
131 reg = <0x40001000 0x400>;
132 interrupts = <54>;
133 clocks = <&clk_pmtr1>;
134 status = "disabled";
135 };
136
137 timer7: timer@40001400 {
138 compatible = "st,stm32-timer";
139 reg = <0x40001400 0x400>;
140 interrupts = <55>;
141 clocks = <&clk_pmtr1>;
142 status = "disabled";
143 };
144
145 usart2: serial@40004400 {
146 compatible = "st,stm32-usart", "st,stm32-uart";
147 reg = <0x40004400 0x400>;
148 interrupts = <38>;
149 clocks = <&clk_pclk1>;
150 status = "disabled";
151 };
152
153 usart3: serial@40004800 {
154 compatible = "st,stm32-usart", "st,stm32-uart";
155 reg = <0x40004800 0x400>;
156 interrupts = <39>;
157 clocks = <&clk_pclk1>;
158 status = "disabled";
159 };
160
161 usart4: serial@40004c00 {
162 compatible = "st,stm32-uart";
163 reg = <0x40004c00 0x400>;
164 interrupts = <52>;
165 clocks = <&clk_pclk1>;
166 status = "disabled";
167 };
168
169 usart5: serial@40005000 {
170 compatible = "st,stm32-uart";
171 reg = <0x40005000 0x400>;
172 interrupts = <53>;
173 clocks = <&clk_pclk1>;
174 status = "disabled";
175 };
176
177 usart7: serial@40007800 {
178 compatible = "st,stm32-usart", "st,stm32-uart";
179 reg = <0x40007800 0x400>;
180 interrupts = <82>;
181 clocks = <&clk_pclk1>;
182 status = "disabled";
183 };
184
185 usart8: serial@40007c00 {
186 compatible = "st,stm32-usart", "st,stm32-uart";
187 reg = <0x40007c00 0x400>;
188 interrupts = <83>;
189 clocks = <&clk_pclk1>;
190 status = "disabled";
191 };
192
193 usart1: serial@40011000 {
194 compatible = "st,stm32-usart", "st,stm32-uart";
195 reg = <0x40011000 0x400>;
196 interrupts = <37>;
197 clocks = <&clk_pclk2>;
198 status = "disabled";
199 };
200
201 usart6: serial@40011400 {
202 compatible = "st,stm32-usart", "st,stm32-uart";
203 reg = <0x40011400 0x400>;
204 interrupts = <71>;
205 clocks = <&clk_pclk2>;
206 status = "disabled";
207 };
208 };
209};
210
211&systick {
212 clocks = <&clk_systick>;
213 status = "okay";
214};