| Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Definitions for timer registers |
| 3 | * |
| 4 | * Copyright 2004 Philip Rischel <rischelp@idt.com> |
| 5 | * Copyright 2008 Florian Fainelli <florian@openwrt.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | * |
| 12 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 13 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 15 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 16 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 17 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 18 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 19 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 20 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 21 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License along |
| 24 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 25 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #ifndef __ASM_RC32434_TIMER_H |
| 30 | #define __ASM_RC32434_TIMER_H |
| 31 | |
| 32 | #include <asm/mach-rc32434/rb.h> |
| 33 | |
| 34 | #define TIMER0_BASE_ADDR 0x18028000 |
| 35 | #define TIMER_COUNT 3 |
| 36 | |
| 37 | struct timer_counter { |
| 38 | u32 count; |
| 39 | u32 compare; |
| 40 | u32 ctc; /*use CTC_ */ |
| 41 | }; |
| 42 | |
| 43 | struct timer { |
| 44 | struct timer_counter tim[TIMER_COUNT]; |
| 45 | u32 rcount; /* use RCOUNT_ */ |
| 46 | u32 rcompare; /* use RCOMPARE_ */ |
| 47 | u32 rtc; /* use RTC_ */ |
| 48 | }; |
| 49 | |
| 50 | #define RC32434_CTC_EN_BIT 0 |
| 51 | #define RC32434_CTC_TO_BIT 1 |
| 52 | |
| 53 | /* Real time clock registers */ |
| 54 | #define RC32434_RTC_MSK(x) BIT_TO_MASK(x) |
| 55 | #define RC32434_RTC_CE_BIT 0 |
| 56 | #define RC32434_RTC_TO_BIT 1 |
| 57 | #define RC32434_RTC_RQE_BIT 2 |
| 58 | |
| 59 | /* Counter registers */ |
| 60 | #define RC32434_RCOUNT_BIT 0 |
| 61 | #define RC32434_RCOUNT_MSK 0x0000ffff |
| 62 | #define RC32434_RCOMP_BIT 0 |
| 63 | #define RC32434_RCOMP_MSK 0x0000ffff |
| 64 | |
| 65 | #endif /* __ASM_RC32434_TIMER_H */ |