blob: 92c374d411d5c08c07caa6887f323f3ecef59cd1 [file] [log] [blame]
Magnus Damm97991652011-04-29 02:28:08 +09001/*
2 * sh7372 Power management support
3 *
4 * Copyright (C) 2011 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/pm.h>
12#include <linux/suspend.h>
13#include <linux/module.h>
14#include <linux/list.h>
15#include <linux/err.h>
16#include <linux/slab.h>
17#include <asm/system.h>
18#include <asm/io.h>
19#include <asm/tlbflush.h>
20#include <mach/common.h>
21
22#define SMFRAM 0xe6a70000
23#define SYSTBCR 0xe6150024
24#define SBAR 0xe6180020
25#define APARMBAREA 0xe6f10020
26
27#ifdef CONFIG_SUSPEND
28static void sh7372_enter_core_standby(void)
29{
30 void __iomem *smfram = (void __iomem *)SMFRAM;
31
32 __raw_writel(0, APARMBAREA); /* translate 4k */
33 __raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */
34 __raw_writel(0x10, SYSTBCR); /* enable core standby */
35
36 __raw_writel(0, smfram + 0x3c); /* clear page table address */
37
38 sh7372_cpu_suspend();
39 cpu_init();
40
41 /* if page table address is non-NULL then we have been powered down */
42 if (__raw_readl(smfram + 0x3c)) {
43 __raw_writel(__raw_readl(smfram + 0x40),
44 __va(__raw_readl(smfram + 0x3c)));
45
46 flush_tlb_all();
47 set_cr(__raw_readl(smfram + 0x38));
48 }
49
50 __raw_writel(0, SYSTBCR); /* disable core standby */
51 __raw_writel(0, SBAR); /* disable reset vector translation */
52}
53
54static int sh7372_enter_suspend(suspend_state_t suspend_state)
55{
56 sh7372_enter_core_standby();
57 return 0;
58}
59
60static void sh7372_suspend_init(void)
61{
62 shmobile_suspend_ops.enter = sh7372_enter_suspend;
63}
64#else
65static void sh7372_suspend_init(void) {}
66#endif
67
68#define DBGREG1 0xe6100020
69#define DBGREG9 0xe6100040
70
71void __init sh7372_pm_init(void)
72{
73 /* enable DBG hardware block to kick SYSC */
74 __raw_writel(0x0000a500, DBGREG9);
75 __raw_writel(0x0000a501, DBGREG9);
76 __raw_writel(0x00000000, DBGREG1);
77
78 sh7372_suspend_init();
79}