blob: 9d356fc96a57896705a0495a430eb55994d60b18 [file] [log] [blame]
Bryan Wu194de562007-05-06 14:50:30 -07001/*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
Bryan Wu194de562007-05-06 14:50:30 -07009 * Modified:
10 * Copyright 2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39#include <linux/platform_device.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43
44#include <asm/gpio.h>
45#include <asm/mach/bfin_serial_5xx.h>
46
47#ifdef CONFIG_SERIAL_BFIN_DMA
48#include <linux/dma-mapping.h>
49#include <asm/io.h>
50#include <asm/irq.h>
51#include <asm/cacheflush.h>
52#endif
53
54/* UART name and device definitions */
55#define BFIN_SERIAL_NAME "ttyBF"
56#define BFIN_SERIAL_MAJOR 204
57#define BFIN_SERIAL_MINOR 64
58
59/*
60 * Setup for console. Argument comes from the menuconfig
61 */
62#define DMA_RX_XCOUNT 512
63#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
64
65#define DMA_RX_FLUSH_JIFFIES 5
66
67#ifdef CONFIG_SERIAL_BFIN_DMA
68static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
69#else
70static void bfin_serial_do_work(struct work_struct *work);
71static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
72static void local_put_char(struct bfin_serial_port *uart, char ch);
73#endif
74
75static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
76
77/*
78 * interrupts are disabled on entry
79 */
80static void bfin_serial_stop_tx(struct uart_port *port)
81{
82 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
83
84#ifdef CONFIG_SERIAL_BFIN_DMA
85 disable_dma(uart->tx_dma_channel);
86#else
87 unsigned short ier;
88
89 ier = UART_GET_IER(uart);
90 ier &= ~ETBEI;
91 UART_PUT_IER(uart, ier);
92#endif
93}
94
95/*
96 * port is locked and interrupts are disabled
97 */
98static void bfin_serial_start_tx(struct uart_port *port)
99{
100 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
101
102#ifdef CONFIG_SERIAL_BFIN_DMA
103 bfin_serial_dma_tx_chars(uart);
104#else
105 unsigned short ier;
106 ier = UART_GET_IER(uart);
107 ier |= ETBEI;
108 UART_PUT_IER(uart, ier);
109 bfin_serial_tx_chars(uart);
110#endif
111}
112
113/*
114 * Interrupts are enabled
115 */
116static void bfin_serial_stop_rx(struct uart_port *port)
117{
118 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
119 unsigned short ier;
120
121 ier = UART_GET_IER(uart);
122 ier &= ~ERBFI;
123 UART_PUT_IER(uart, ier);
124}
125
126/*
127 * Set the modem control timer to fire immediately.
128 */
129static void bfin_serial_enable_ms(struct uart_port *port)
130{
131}
132
133#ifdef CONFIG_SERIAL_BFIN_PIO
134static void local_put_char(struct bfin_serial_port *uart, char ch)
135{
136 unsigned short status;
137 int flags = 0;
138
139 spin_lock_irqsave(&uart->port.lock, flags);
140
141 do {
142 status = UART_GET_LSR(uart);
143 } while (!(status & THRE));
144
145 UART_PUT_CHAR(uart, ch);
146 SSYNC();
147
148 spin_unlock_irqrestore(&uart->port.lock, flags);
149}
150
151static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
152{
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800153 struct tty_struct *tty = uart->port.info->tty;
Bryan Wu194de562007-05-06 14:50:30 -0700154 unsigned int status, ch, flg;
155#ifdef BF533_FAMILY
156 static int in_break = 0;
157#endif
158
159 status = UART_GET_LSR(uart);
160 ch = UART_GET_CHAR(uart);
161 uart->port.icount.rx++;
162
163#ifdef BF533_FAMILY
164 /* The BF533 family of processors have a nice misbehavior where
165 * they continuously generate characters for a "single" break.
166 * We have to basically ignore this flood until the "next" valid
167 * character comes across. All other Blackfin families operate
168 * properly though.
169 */
170 if (in_break) {
171 if (ch != 0) {
172 in_break = 0;
173 ch = UART_GET_CHAR(uart);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800174 if (bfin_revid() < 5)
175 return;
176 } else
177 return;
Bryan Wu194de562007-05-06 14:50:30 -0700178 }
179#endif
180
181 if (status & BI) {
182#ifdef BF533_FAMILY
183 in_break = 1;
184#endif
185 uart->port.icount.brk++;
186 if (uart_handle_break(&uart->port))
187 goto ignore_char;
Mike Frysinger98089012007-06-11 15:31:30 +0800188 status &= ~(PE | FE);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800189 }
190 if (status & PE)
Bryan Wu194de562007-05-06 14:50:30 -0700191 uart->port.icount.parity++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800192 if (status & OE)
Bryan Wu194de562007-05-06 14:50:30 -0700193 uart->port.icount.overrun++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800194 if (status & FE)
Bryan Wu194de562007-05-06 14:50:30 -0700195 uart->port.icount.frame++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800196
197 status &= uart->port.read_status_mask;
198
199 if (status & BI)
200 flg = TTY_BREAK;
201 else if (status & PE)
202 flg = TTY_PARITY;
203 else if (status & FE)
204 flg = TTY_FRAME;
205 else
Bryan Wu194de562007-05-06 14:50:30 -0700206 flg = TTY_NORMAL;
207
208 if (uart_handle_sysrq_char(&uart->port, ch))
209 goto ignore_char;
Bryan Wu194de562007-05-06 14:50:30 -0700210
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800211 uart_insert_char(&uart->port, status, OE, ch, flg);
212
213 ignore_char:
214 tty_flip_buffer_push(tty);
Bryan Wu194de562007-05-06 14:50:30 -0700215}
216
217static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
218{
219 struct circ_buf *xmit = &uart->port.info->xmit;
220
221 if (uart->port.x_char) {
222 UART_PUT_CHAR(uart, uart->port.x_char);
223 uart->port.icount.tx++;
224 uart->port.x_char = 0;
225 return;
226 }
227 /*
228 * Check the modem control lines before
229 * transmitting anything.
230 */
231 bfin_serial_mctrl_check(uart);
232
233 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
234 bfin_serial_stop_tx(&uart->port);
235 return;
236 }
237
238 local_put_char(uart, xmit->buf[xmit->tail]);
239 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
240 uart->port.icount.tx++;
241
242 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
243 uart_write_wakeup(&uart->port);
244
245 if (uart_circ_empty(xmit))
246 bfin_serial_stop_tx(&uart->port);
247}
248
Aubrey Li5c4e4722007-05-21 18:09:38 +0800249static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
250{
251 struct bfin_serial_port *uart = dev_id;
252
253 spin_lock(&uart->port.lock);
254 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
255 bfin_serial_rx_chars(uart);
256 spin_unlock(&uart->port.lock);
257 return IRQ_HANDLED;
258}
259
260static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
Bryan Wu194de562007-05-06 14:50:30 -0700261{
262 struct bfin_serial_port *uart = dev_id;
Bryan Wu194de562007-05-06 14:50:30 -0700263
264 spin_lock(&uart->port.lock);
Aubrey Li5c4e4722007-05-21 18:09:38 +0800265 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
266 bfin_serial_tx_chars(uart);
Bryan Wu194de562007-05-06 14:50:30 -0700267 spin_unlock(&uart->port.lock);
268 return IRQ_HANDLED;
269}
270
Aubrey Li5c4e4722007-05-21 18:09:38 +0800271
Bryan Wu194de562007-05-06 14:50:30 -0700272static void bfin_serial_do_work(struct work_struct *work)
273{
274 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
275
276 bfin_serial_mctrl_check(uart);
277}
278
279#endif
280
281#ifdef CONFIG_SERIAL_BFIN_DMA
282static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
283{
284 struct circ_buf *xmit = &uart->port.info->xmit;
285 unsigned short ier;
286 int flags = 0;
287
288 if (!uart->tx_done)
289 return;
290
291 uart->tx_done = 0;
292
293 if (uart->port.x_char) {
294 UART_PUT_CHAR(uart, uart->port.x_char);
295 uart->port.icount.tx++;
296 uart->port.x_char = 0;
297 uart->tx_done = 1;
298 return;
299 }
300 /*
301 * Check the modem control lines before
302 * transmitting anything.
303 */
304 bfin_serial_mctrl_check(uart);
305
306 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
307 bfin_serial_stop_tx(&uart->port);
308 uart->tx_done = 1;
309 return;
310 }
311
312 spin_lock_irqsave(&uart->port.lock, flags);
313 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
314 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
315 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
316 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
317 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
318 set_dma_config(uart->tx_dma_channel,
319 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
320 INTR_ON_BUF,
321 DIMENSION_LINEAR,
322 DATA_SIZE_8));
323 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
324 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
325 set_dma_x_modify(uart->tx_dma_channel, 1);
326 enable_dma(uart->tx_dma_channel);
327 ier = UART_GET_IER(uart);
328 ier |= ETBEI;
329 UART_PUT_IER(uart, ier);
330 spin_unlock_irqrestore(&uart->port.lock, flags);
331}
332
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800333static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
Bryan Wu194de562007-05-06 14:50:30 -0700334{
335 struct tty_struct *tty = uart->port.info->tty;
336 int i, flg, status;
337
338 status = UART_GET_LSR(uart);
339 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
340
341 if (status & BI) {
342 uart->port.icount.brk++;
343 if (uart_handle_break(&uart->port))
344 goto dma_ignore_char;
Mike Frysinger98089012007-06-11 15:31:30 +0800345 status &= ~(PE | FE);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800346 }
347 if (status & PE)
Bryan Wu194de562007-05-06 14:50:30 -0700348 uart->port.icount.parity++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800349 if (status & OE)
Bryan Wu194de562007-05-06 14:50:30 -0700350 uart->port.icount.overrun++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800351 if (status & FE)
Bryan Wu194de562007-05-06 14:50:30 -0700352 uart->port.icount.frame++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800353
354 status &= uart->port.read_status_mask;
355
356 if (status & BI)
357 flg = TTY_BREAK;
358 else if (status & PE)
359 flg = TTY_PARITY;
360 else if (status & FE)
361 flg = TTY_FRAME;
362 else
Bryan Wu194de562007-05-06 14:50:30 -0700363 flg = TTY_NORMAL;
364
365 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
366 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
367 goto dma_ignore_char;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800368 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
Bryan Wu194de562007-05-06 14:50:30 -0700369 }
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800370
371 dma_ignore_char:
Bryan Wu194de562007-05-06 14:50:30 -0700372 tty_flip_buffer_push(tty);
373}
374
375void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
376{
377 int x_pos, pos;
378 int flags = 0;
379
380 bfin_serial_dma_tx_chars(uart);
381
382 spin_lock_irqsave(&uart->port.lock, flags);
383 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
384 if (x_pos == DMA_RX_XCOUNT)
385 x_pos = 0;
386
387 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
388
389 if (pos>uart->rx_dma_buf.tail) {
390 uart->rx_dma_buf.tail = pos;
391 bfin_serial_dma_rx_chars(uart);
392 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
393 }
394 spin_unlock_irqrestore(&uart->port.lock, flags);
395 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
396 add_timer(&(uart->rx_dma_timer));
397}
398
399static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
400{
401 struct bfin_serial_port *uart = dev_id;
402 struct circ_buf *xmit = &uart->port.info->xmit;
403 unsigned short ier;
404
405 spin_lock(&uart->port.lock);
406 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
407 clear_dma_irqstat(uart->tx_dma_channel);
408 disable_dma(uart->tx_dma_channel);
409 ier = UART_GET_IER(uart);
410 ier &= ~ETBEI;
411 UART_PUT_IER(uart, ier);
412 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
413 uart->port.icount.tx+=uart->tx_count;
414
415 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
416 uart_write_wakeup(&uart->port);
417
418 if (uart_circ_empty(xmit))
419 bfin_serial_stop_tx(&uart->port);
420 uart->tx_done = 1;
421 }
422
423 spin_unlock(&uart->port.lock);
424 return IRQ_HANDLED;
425}
426
427static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
428{
429 struct bfin_serial_port *uart = dev_id;
430 unsigned short irqstat;
431
432 uart->rx_dma_nrows++;
433 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
434 uart->rx_dma_nrows = 0;
435 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
436 bfin_serial_dma_rx_chars(uart);
437 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
438 }
439 spin_lock(&uart->port.lock);
440 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
441 clear_dma_irqstat(uart->rx_dma_channel);
442
443 spin_unlock(&uart->port.lock);
444 return IRQ_HANDLED;
445}
446#endif
447
448/*
449 * Return TIOCSER_TEMT when transmitter is not busy.
450 */
451static unsigned int bfin_serial_tx_empty(struct uart_port *port)
452{
453 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
454 unsigned short lsr;
455
456 lsr = UART_GET_LSR(uart);
457 if (lsr & TEMT)
458 return TIOCSER_TEMT;
459 else
460 return 0;
461}
462
463static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
464{
465#ifdef CONFIG_SERIAL_BFIN_CTSRTS
466 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
467 if (uart->cts_pin < 0)
468 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
469
470 if (gpio_get_value(uart->cts_pin))
471 return TIOCM_DSR | TIOCM_CAR;
472 else
473#endif
474 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
475}
476
477static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
478{
479#ifdef CONFIG_SERIAL_BFIN_CTSRTS
480 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
481 if (uart->rts_pin < 0)
482 return;
483
484 if (mctrl & TIOCM_RTS)
485 gpio_set_value(uart->rts_pin, 0);
486 else
487 gpio_set_value(uart->rts_pin, 1);
488#endif
489}
490
491/*
492 * Handle any change of modem status signal since we were last called.
493 */
494static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
495{
496#ifdef CONFIG_SERIAL_BFIN_CTSRTS
497 unsigned int status;
498# ifdef CONFIG_SERIAL_BFIN_DMA
499 struct uart_info *info = uart->port.info;
500 struct tty_struct *tty = info->tty;
501
502 status = bfin_serial_get_mctrl(&uart->port);
503 if (!(status & TIOCM_CTS)) {
504 tty->hw_stopped = 1;
505 } else {
506 tty->hw_stopped = 0;
507 }
508# else
509 status = bfin_serial_get_mctrl(&uart->port);
510 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
511 if (!(status & TIOCM_CTS))
512 schedule_work(&uart->cts_workqueue);
513# endif
514#endif
515}
516
517/*
518 * Interrupts are always disabled.
519 */
520static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
521{
522}
523
524static int bfin_serial_startup(struct uart_port *port)
525{
526 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
527
528#ifdef CONFIG_SERIAL_BFIN_DMA
529 dma_addr_t dma_handle;
530
531 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
532 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
533 return -EBUSY;
534 }
535
536 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
537 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
538 free_dma(uart->rx_dma_channel);
539 return -EBUSY;
540 }
541
542 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
543 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
544
545 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
546 uart->rx_dma_buf.head = 0;
547 uart->rx_dma_buf.tail = 0;
548 uart->rx_dma_nrows = 0;
549
550 set_dma_config(uart->rx_dma_channel,
551 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
552 INTR_ON_ROW, DIMENSION_2D,
553 DATA_SIZE_8));
554 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
555 set_dma_x_modify(uart->rx_dma_channel, 1);
556 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
557 set_dma_y_modify(uart->rx_dma_channel, 1);
558 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
559 enable_dma(uart->rx_dma_channel);
560
561 uart->rx_dma_timer.data = (unsigned long)(uart);
562 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
563 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
564 add_timer(&(uart->rx_dma_timer));
565#else
566 if (request_irq
Aubrey Li5c4e4722007-05-21 18:09:38 +0800567 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
Bryan Wu194de562007-05-06 14:50:30 -0700568 "BFIN_UART_RX", uart)) {
569 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
570 return -EBUSY;
571 }
572
573 if (request_irq
Aubrey Li5c4e4722007-05-21 18:09:38 +0800574 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
Bryan Wu194de562007-05-06 14:50:30 -0700575 "BFIN_UART_TX", uart)) {
576 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
577 free_irq(uart->port.irq, uart);
578 return -EBUSY;
579 }
580#endif
581 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
582 return 0;
583}
584
585static void bfin_serial_shutdown(struct uart_port *port)
586{
587 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
588
589#ifdef CONFIG_SERIAL_BFIN_DMA
590 disable_dma(uart->tx_dma_channel);
591 free_dma(uart->tx_dma_channel);
592 disable_dma(uart->rx_dma_channel);
593 free_dma(uart->rx_dma_channel);
594 del_timer(&(uart->rx_dma_timer));
595#else
596 free_irq(uart->port.irq, uart);
597 free_irq(uart->port.irq+1, uart);
598#endif
599}
600
601static void
602bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
603 struct ktermios *old)
604{
605 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
606 unsigned long flags;
607 unsigned int baud, quot;
608 unsigned short val, ier, lsr, lcr = 0;
609
610 switch (termios->c_cflag & CSIZE) {
611 case CS8:
612 lcr = WLS(8);
613 break;
614 case CS7:
615 lcr = WLS(7);
616 break;
617 case CS6:
618 lcr = WLS(6);
619 break;
620 case CS5:
621 lcr = WLS(5);
622 break;
623 default:
624 printk(KERN_ERR "%s: word lengh not supported\n",
625 __FUNCTION__);
626 }
627
628 if (termios->c_cflag & CSTOPB)
629 lcr |= STB;
630 if (termios->c_cflag & PARENB) {
631 lcr |= PEN;
632 if (!(termios->c_cflag & PARODD))
633 lcr |= EPS;
Mike Frysingerc16c3ca2007-06-11 15:31:30 +0800634 if (termios->c_cflag & CMSPAR)
635 lcr |= STP;
Bryan Wu194de562007-05-06 14:50:30 -0700636 }
637
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800638 port->read_status_mask = OE;
639 if (termios->c_iflag & INPCK)
640 port->read_status_mask |= (FE | PE);
641 if (termios->c_iflag & (BRKINT | PARMRK))
642 port->read_status_mask |= BI;
Bryan Wu194de562007-05-06 14:50:30 -0700643
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800644 /*
645 * Characters to ignore
646 */
647 port->ignore_status_mask = 0;
648 if (termios->c_iflag & IGNPAR)
649 port->ignore_status_mask |= FE | PE;
650 if (termios->c_iflag & IGNBRK) {
651 port->ignore_status_mask |= BI;
652 /*
653 * If we're ignoring parity and break indicators,
654 * ignore overruns too (for real raw support).
655 */
656 if (termios->c_iflag & IGNPAR)
657 port->ignore_status_mask |= OE;
658 }
Bryan Wu194de562007-05-06 14:50:30 -0700659
660 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
661 quot = uart_get_divisor(port, baud);
662 spin_lock_irqsave(&uart->port.lock, flags);
663
664 do {
665 lsr = UART_GET_LSR(uart);
666 } while (!(lsr & TEMT));
667
668 /* Disable UART */
669 ier = UART_GET_IER(uart);
670 UART_PUT_IER(uart, 0);
671
672 /* Set DLAB in LCR to Access DLL and DLH */
673 val = UART_GET_LCR(uart);
674 val |= DLAB;
675 UART_PUT_LCR(uart, val);
676 SSYNC();
677
678 UART_PUT_DLL(uart, quot & 0xFF);
679 SSYNC();
680 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
681 SSYNC();
682
683 /* Clear DLAB in LCR to Access THR RBR IER */
684 val = UART_GET_LCR(uart);
685 val &= ~DLAB;
686 UART_PUT_LCR(uart, val);
687 SSYNC();
688
689 UART_PUT_LCR(uart, lcr);
690
691 /* Enable UART */
692 UART_PUT_IER(uart, ier);
693
694 val = UART_GET_GCTL(uart);
695 val |= UCEN;
696 UART_PUT_GCTL(uart, val);
697
698 spin_unlock_irqrestore(&uart->port.lock, flags);
699}
700
701static const char *bfin_serial_type(struct uart_port *port)
702{
703 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
704
705 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
706}
707
708/*
709 * Release the memory region(s) being used by 'port'.
710 */
711static void bfin_serial_release_port(struct uart_port *port)
712{
713}
714
715/*
716 * Request the memory region(s) being used by 'port'.
717 */
718static int bfin_serial_request_port(struct uart_port *port)
719{
720 return 0;
721}
722
723/*
724 * Configure/autoconfigure the port.
725 */
726static void bfin_serial_config_port(struct uart_port *port, int flags)
727{
728 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
729
730 if (flags & UART_CONFIG_TYPE &&
731 bfin_serial_request_port(&uart->port) == 0)
732 uart->port.type = PORT_BFIN;
733}
734
735/*
736 * Verify the new serial_struct (for TIOCSSERIAL).
737 * The only change we allow are to the flags and type, and
738 * even then only between PORT_BFIN and PORT_UNKNOWN
739 */
740static int
741bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
742{
743 return 0;
744}
745
746static struct uart_ops bfin_serial_pops = {
747 .tx_empty = bfin_serial_tx_empty,
748 .set_mctrl = bfin_serial_set_mctrl,
749 .get_mctrl = bfin_serial_get_mctrl,
750 .stop_tx = bfin_serial_stop_tx,
751 .start_tx = bfin_serial_start_tx,
752 .stop_rx = bfin_serial_stop_rx,
753 .enable_ms = bfin_serial_enable_ms,
754 .break_ctl = bfin_serial_break_ctl,
755 .startup = bfin_serial_startup,
756 .shutdown = bfin_serial_shutdown,
757 .set_termios = bfin_serial_set_termios,
758 .type = bfin_serial_type,
759 .release_port = bfin_serial_release_port,
760 .request_port = bfin_serial_request_port,
761 .config_port = bfin_serial_config_port,
762 .verify_port = bfin_serial_verify_port,
763};
764
765static void __init bfin_serial_init_ports(void)
766{
767 static int first = 1;
768 int i;
769
770 if (!first)
771 return;
772 first = 0;
773
774 for (i = 0; i < nr_ports; i++) {
775 bfin_serial_ports[i].port.uartclk = get_sclk();
776 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
777 bfin_serial_ports[i].port.line = i;
778 bfin_serial_ports[i].port.iotype = UPIO_MEM;
779 bfin_serial_ports[i].port.membase =
780 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
781 bfin_serial_ports[i].port.mapbase =
782 bfin_serial_resource[i].uart_base_addr;
783 bfin_serial_ports[i].port.irq =
784 bfin_serial_resource[i].uart_irq;
785 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
786#ifdef CONFIG_SERIAL_BFIN_DMA
787 bfin_serial_ports[i].tx_done = 1;
788 bfin_serial_ports[i].tx_count = 0;
789 bfin_serial_ports[i].tx_dma_channel =
790 bfin_serial_resource[i].uart_tx_dma_channel;
791 bfin_serial_ports[i].rx_dma_channel =
792 bfin_serial_resource[i].uart_rx_dma_channel;
793 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
794#else
795 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
796#endif
797#ifdef CONFIG_SERIAL_BFIN_CTSRTS
798 bfin_serial_ports[i].cts_pin =
799 bfin_serial_resource[i].uart_cts_pin;
800 bfin_serial_ports[i].rts_pin =
801 bfin_serial_resource[i].uart_rts_pin;
802#endif
803 bfin_serial_hw_init(&bfin_serial_ports[i]);
804
805 }
806}
807
808#ifdef CONFIG_SERIAL_BFIN_CONSOLE
809static void bfin_serial_console_putchar(struct uart_port *port, int ch)
810{
811 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
812 while (!(UART_GET_LSR(uart)))
813 barrier();
814 UART_PUT_CHAR(uart, ch);
815 SSYNC();
816}
817
818/*
819 * Interrupts are disabled on entering
820 */
821static void
822bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
823{
824 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
825 int flags = 0;
826
827 spin_lock_irqsave(&uart->port.lock, flags);
828 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
829 spin_unlock_irqrestore(&uart->port.lock, flags);
830
831}
832
833/*
834 * If the port was already initialised (eg, by a boot loader),
835 * try to determine the current setup.
836 */
837static void __init
838bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
839 int *parity, int *bits)
840{
841 unsigned short status;
842
843 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
844 if (status == (ERBFI | ETBEI)) {
845 /* ok, the port was enabled */
846 unsigned short lcr, val;
847 unsigned short dlh, dll;
848
849 lcr = UART_GET_LCR(uart);
850
851 *parity = 'n';
852 if (lcr & PEN) {
853 if (lcr & EPS)
854 *parity = 'e';
855 else
856 *parity = 'o';
857 }
858 switch (lcr & 0x03) {
859 case 0: *bits = 5; break;
860 case 1: *bits = 6; break;
861 case 2: *bits = 7; break;
862 case 3: *bits = 8; break;
863 }
864 /* Set DLAB in LCR to Access DLL and DLH */
865 val = UART_GET_LCR(uart);
866 val |= DLAB;
867 UART_PUT_LCR(uart, val);
868
869 dll = UART_GET_DLL(uart);
870 dlh = UART_GET_DLH(uart);
871
872 /* Clear DLAB in LCR to Access THR RBR IER */
873 val = UART_GET_LCR(uart);
874 val &= ~DLAB;
875 UART_PUT_LCR(uart, val);
876
877 *baud = get_sclk() / (16*(dll | dlh << 8));
878 }
879 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
880}
881
882static int __init
883bfin_serial_console_setup(struct console *co, char *options)
884{
885 struct bfin_serial_port *uart;
886 int baud = 57600;
887 int bits = 8;
888 int parity = 'n';
889#ifdef CONFIG_SERIAL_BFIN_CTSRTS
890 int flow = 'r';
891#else
892 int flow = 'n';
893#endif
894
895 /*
896 * Check whether an invalid uart number has been specified, and
897 * if so, search for the first available port that does have
898 * console support.
899 */
900 if (co->index == -1 || co->index >= nr_ports)
901 co->index = 0;
902 uart = &bfin_serial_ports[co->index];
903
904 if (options)
905 uart_parse_options(options, &baud, &parity, &bits, &flow);
906 else
907 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
908
909 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
910}
911
912static struct uart_driver bfin_serial_reg;
913static struct console bfin_serial_console = {
914 .name = BFIN_SERIAL_NAME,
915 .write = bfin_serial_console_write,
916 .device = uart_console_device,
917 .setup = bfin_serial_console_setup,
918 .flags = CON_PRINTBUFFER,
919 .index = -1,
920 .data = &bfin_serial_reg,
921};
922
923static int __init bfin_serial_rs_console_init(void)
924{
925 bfin_serial_init_ports();
926 register_console(&bfin_serial_console);
927 return 0;
928}
929console_initcall(bfin_serial_rs_console_init);
930
931#define BFIN_SERIAL_CONSOLE &bfin_serial_console
932#else
933#define BFIN_SERIAL_CONSOLE NULL
934#endif
935
936static struct uart_driver bfin_serial_reg = {
937 .owner = THIS_MODULE,
938 .driver_name = "bfin-uart",
939 .dev_name = BFIN_SERIAL_NAME,
940 .major = BFIN_SERIAL_MAJOR,
941 .minor = BFIN_SERIAL_MINOR,
942 .nr = NR_PORTS,
943 .cons = BFIN_SERIAL_CONSOLE,
944};
945
946static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
947{
948 struct bfin_serial_port *uart = platform_get_drvdata(dev);
949
950 if (uart)
951 uart_suspend_port(&bfin_serial_reg, &uart->port);
952
953 return 0;
954}
955
956static int bfin_serial_resume(struct platform_device *dev)
957{
958 struct bfin_serial_port *uart = platform_get_drvdata(dev);
959
960 if (uart)
961 uart_resume_port(&bfin_serial_reg, &uart->port);
962
963 return 0;
964}
965
966static int bfin_serial_probe(struct platform_device *dev)
967{
968 struct resource *res = dev->resource;
969 int i;
970
971 for (i = 0; i < dev->num_resources; i++, res++)
972 if (res->flags & IORESOURCE_MEM)
973 break;
974
975 if (i < dev->num_resources) {
976 for (i = 0; i < nr_ports; i++, res++) {
977 if (bfin_serial_ports[i].port.mapbase != res->start)
978 continue;
979 bfin_serial_ports[i].port.dev = &dev->dev;
980 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
981 platform_set_drvdata(dev, &bfin_serial_ports[i]);
982 }
983 }
984
985 return 0;
986}
987
988static int bfin_serial_remove(struct platform_device *pdev)
989{
990 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
991
992
993#ifdef CONFIG_SERIAL_BFIN_CTSRTS
994 gpio_free(uart->cts_pin);
995 gpio_free(uart->rts_pin);
996#endif
997
998 platform_set_drvdata(pdev, NULL);
999
1000 if (uart)
1001 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1002
1003 return 0;
1004}
1005
1006static struct platform_driver bfin_serial_driver = {
1007 .probe = bfin_serial_probe,
1008 .remove = bfin_serial_remove,
1009 .suspend = bfin_serial_suspend,
1010 .resume = bfin_serial_resume,
1011 .driver = {
1012 .name = "bfin-uart",
1013 },
1014};
1015
1016static int __init bfin_serial_init(void)
1017{
1018 int ret;
1019
1020 pr_info("Serial: Blackfin serial driver\n");
1021
1022 bfin_serial_init_ports();
1023
1024 ret = uart_register_driver(&bfin_serial_reg);
1025 if (ret == 0) {
1026 ret = platform_driver_register(&bfin_serial_driver);
1027 if (ret) {
1028 pr_debug("uart register failed\n");
1029 uart_unregister_driver(&bfin_serial_reg);
1030 }
1031 }
1032 return ret;
1033}
1034
1035static void __exit bfin_serial_exit(void)
1036{
1037 platform_driver_unregister(&bfin_serial_driver);
1038 uart_unregister_driver(&bfin_serial_reg);
1039}
1040
1041module_init(bfin_serial_init);
1042module_exit(bfin_serial_exit);
1043
1044MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1045MODULE_DESCRIPTION("Blackfin generic serial port driver");
1046MODULE_LICENSE("GPL");
1047MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);