blob: d886962392efa80945369be3413ebe7c1fae9509 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Zhu Yib481de92007-09-25 17:54:57 -070049#include "iwl-3945.h"
50#include "iwl-helpers.h"
51
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080052#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080053u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070054#endif
55
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080056static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080058
Zhu Yib481de92007-09-25 17:54:57 -070059/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080066static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080069static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080070int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070073
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION \
80"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080082#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070083#define VD "d"
84#else
85#define VD
86#endif
87
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080088#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070089#define VS "s"
90#else
91#define VS
92#endif
93
Zhu Yid1283942007-11-29 11:10:16 +080094#define IWLWIFI_VERSION "1.2.22k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070095#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96#define DRV_VERSION IWLWIFI_VERSION
97
98/* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102#define IWL3945_UCODE_API "-1"
103
104MODULE_DESCRIPTION(DRV_DESCRIPTION);
105MODULE_VERSION(DRV_VERSION);
106MODULE_AUTHOR(DRV_COPYRIGHT);
107MODULE_LICENSE("GPL");
108
Christoph Hellwig416e1432007-10-25 17:15:49 +0800109static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700110{
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117}
118
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800119static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -0700121{
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129}
130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800131static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700132{
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145}
146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800147static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700148{
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800153 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169}
170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800171static void iwl3945_print_hex_dump(int level, void *p, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -0700172{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +0800173#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800174 if (!(iwl3945_debug_level & level))
Zhu Yib481de92007-09-25 17:54:57 -0700175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179#endif
180}
181
182/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700205 ***************************************************/
206
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800207static int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700208{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800209 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700210
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800211 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221}
222
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800223/**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800228static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700229{
230 return ++index & (n_bd - 1);
231}
232
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800233/**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800238static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
Zhu Yib481de92007-09-25 17:54:57 -0700239{
240 return --index & (n_bd - 1);
241}
242
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800243static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700244{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700248}
249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800250static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700251{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800252 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700253 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800254 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700255
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800256 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700257 return index & (q->n_window - 1);
258}
259
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800260/**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800263static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700264 int count, int slots_num, u32 id)
265{
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800286 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700287
288 return 0;
289}
290
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800291/**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800294static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700296{
297 struct pci_dev *dev = priv->pci_dev;
298
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800305 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334}
335
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800336/**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800339int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700341{
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800354 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800361 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800373
374 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800378 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700379
380 return 0;
381}
382
383/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800384 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700390 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800391void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700392{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800393 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800401 for (; q->write_ptr != q->read_ptr;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800405 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800409 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800412 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700413 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800417 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800423 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700424 memset(txq, 0, sizeof(*txq));
425}
426
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800427const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700428
429/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800430 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700431 * the functionality provided here
432 */
433
434/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800435#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800436/**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800441static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700442{
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475}
Zhu Yi556f8db2007-09-27 11:27:33 +0800476#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800477
478/**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800483static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700484{
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493}
494
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800495/**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800498u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700499{
500 int i;
501 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800502 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700503 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700504 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800505 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
Ian Schram01ebd062007-10-25 17:15:22 +0800525 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
Joe Perches0795af52007-10-03 17:59:30 -0700538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800543 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
Tomas Winkler69946332007-10-25 17:15:27 +0800550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
Zhu Yib481de92007-09-25 17:54:57 -0700561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800562
563 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800564 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700565 return index;
566
567}
568
569/*************** DRIVER STATUS FUNCTIONS *****/
570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800571static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700572{
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578}
579
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800580static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700581{
582 return test_bit(STATUS_ALIVE, &priv->status);
583}
584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800585static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700586{
587 return test_bit(STATUS_INIT, &priv->status);
588}
589
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800590static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700591{
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594}
595
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800596static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700597{
598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800599 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700600 return 0;
601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800602 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700603}
604
605/*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607#define IWL_CMD(x) case x : return #x
608
609static const char *get_cmd_string(u8 cmd)
610{
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656}
657
658#define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800661 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800669static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700670{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700674 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800675 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800697 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800714 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700731
732 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800733
734 /* Increment and update queue's write index */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740}
741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800742static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700743{
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700758 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764}
765
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800766static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700767{
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700789 if (cmd_idx < 0) {
790 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800835 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849out:
850 atomic_set(&entry, 0);
851 return ret;
852}
853
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800854int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700855{
Zhu Yib481de92007-09-25 17:54:57 -0700856 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800857 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800859 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700860}
861
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800862int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700863{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800864 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800870 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700871}
872
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800873static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700874{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800875 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800881 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700882}
883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800884int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700885{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700887}
888
889/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Zhu Yib481de92007-09-25 17:54:57 -0700891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800901 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700902 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
903 channel, phymode);
904 return -EINVAL;
905 }
906
907 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
908 (priv->phymode == phymode))
909 return 0;
910
911 priv->staging_rxon.channel = cpu_to_le16(channel);
912 if (phymode == MODE_IEEE80211A)
913 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
914 else
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916
917 priv->phymode = phymode;
918
919 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
920
921 return 0;
922}
923
924/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800925 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700926 *
927 * NOTE: This is really only useful during development and can eventually
928 * be #ifdef'd out once the driver is stable and folks aren't actively
929 * making changes
930 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800931static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700932{
933 int error = 0;
934 int counter = 1;
935
936 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
937 error |= le32_to_cpu(rxon->flags &
938 (RXON_FLG_TGJ_NARROW_BAND_MSK |
939 RXON_FLG_RADAR_DETECT_MSK));
940 if (error)
941 IWL_WARNING("check 24G fields %d | %d\n",
942 counter++, error);
943 } else {
944 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
945 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
946 if (error)
947 IWL_WARNING("check 52 fields %d | %d\n",
948 counter++, error);
949 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
950 if (error)
951 IWL_WARNING("check 52 CCK %d | %d\n",
952 counter++, error);
953 }
954 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
955 if (error)
956 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
957
958 /* make sure basic rates 6Mbps and 1Mbps are supported */
959 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
960 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
961 if (error)
962 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
963
964 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
965 if (error)
966 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
967
968 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
969 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
970 if (error)
971 IWL_WARNING("check CCK and short slot %d | %d\n",
972 counter++, error);
973
974 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
975 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
976 if (error)
977 IWL_WARNING("check CCK & auto detect %d | %d\n",
978 counter++, error);
979
980 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
981 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
982 if (error)
983 IWL_WARNING("check TGG and auto detect %d | %d\n",
984 counter++, error);
985
986 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
987 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
988 RXON_FLG_ANT_A_MSK)) == 0);
989 if (error)
990 IWL_WARNING("check antenna %d %d\n", counter++, error);
991
992 if (error)
993 IWL_WARNING("Tuning to channel %d\n",
994 le16_to_cpu(rxon->channel));
995
996 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800997 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700998 return -1;
999 }
1000 return 0;
1001}
1002
1003/**
Ben Cahill9fbab512007-11-29 11:09:47 +08001004 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +08001005 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -07001006 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001007 * If the RXON structure is changing enough to require a new tune,
1008 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1009 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -07001010 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001011static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001012{
1013
1014 /* These items are only settable from the full RXON command */
1015 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1016 compare_ether_addr(priv->staging_rxon.bssid_addr,
1017 priv->active_rxon.bssid_addr) ||
1018 compare_ether_addr(priv->staging_rxon.node_addr,
1019 priv->active_rxon.node_addr) ||
1020 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1021 priv->active_rxon.wlap_bssid_addr) ||
1022 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1023 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1024 (priv->staging_rxon.air_propagation !=
1025 priv->active_rxon.air_propagation) ||
1026 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1027 return 1;
1028
1029 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1030 * be updated with the RXON_ASSOC command -- however only some
1031 * flag transitions are allowed using RXON_ASSOC */
1032
1033 /* Check if we are not switching bands */
1034 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1035 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1036 return 1;
1037
1038 /* Check if we are switching association toggle */
1039 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1040 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1041 return 1;
1042
1043 return 0;
1044}
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001047{
1048 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001049 struct iwl3945_rx_packet *res = NULL;
1050 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1051 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001052 .id = REPLY_RXON_ASSOC,
1053 .len = sizeof(rxon_assoc),
1054 .meta.flags = CMD_WANT_SKB,
1055 .data = &rxon_assoc,
1056 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001057 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1058 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001059
1060 if ((rxon1->flags == rxon2->flags) &&
1061 (rxon1->filter_flags == rxon2->filter_flags) &&
1062 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1063 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1064 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1065 return 0;
1066 }
1067
1068 rxon_assoc.flags = priv->staging_rxon.flags;
1069 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1070 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1071 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1072 rxon_assoc.reserved = 0;
1073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001074 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001075 if (rc)
1076 return rc;
1077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001078 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001079 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1080 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1081 rc = -EIO;
1082 }
1083
1084 priv->alloc_rxb_skb--;
1085 dev_kfree_skb_any(cmd.meta.u.skb);
1086
1087 return rc;
1088}
1089
1090/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001092 *
Ian Schram01ebd062007-10-25 17:15:22 +08001093 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001094 * the active_rxon structure is updated with the new data. This
1095 * function correctly transitions out of the RXON_ASSOC_MSK state if
1096 * a HW tune is required based on the RXON structure changes.
1097 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001098static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001099{
1100 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001101 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001102 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001103 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001105 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001106 return -1;
1107
1108 /* always get timestamp with Rx frame */
1109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1110
1111 /* select antenna */
1112 priv->staging_rxon.flags &=
1113 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1114 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1115
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001116 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001117 if (rc) {
1118 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1119 return -EINVAL;
1120 }
1121
1122 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001123 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001124 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001125 if (!iwl3945_full_rxon_required(priv)) {
1126 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001127 if (rc) {
1128 IWL_ERROR("Error setting RXON_ASSOC "
1129 "configuration (%d).\n", rc);
1130 return rc;
1131 }
1132
1133 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1134
1135 return 0;
1136 }
1137
1138 /* If we are currently associated and the new config requires
1139 * an RXON_ASSOC and the new config wants the associated mask enabled,
1140 * we must clear the associated from the active configuration
1141 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001142 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001143 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1144 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1145 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1148 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001149 &priv->active_rxon);
1150
1151 /* If the mask clearing failed then we set
1152 * active_rxon back to what it was previously */
1153 if (rc) {
1154 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1155 IWL_ERROR("Error clearing ASSOC_MSK on current "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
Zhu Yib481de92007-09-25 17:54:57 -07001159 }
1160
1161 IWL_DEBUG_INFO("Sending RXON\n"
1162 "* with%s RXON_FILTER_ASSOC_MSK\n"
1163 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001164 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001165 ((priv->staging_rxon.filter_flags &
1166 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1167 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001168 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001169
1170 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001171 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1172 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001173 if (rc) {
1174 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1175 return rc;
1176 }
1177
1178 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001180 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001181
Zhu Yib481de92007-09-25 17:54:57 -07001182 /* If we issue a new RXON command which required a tune then we must
1183 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001184 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001185 if (rc) {
1186 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1187 return rc;
1188 }
1189
1190 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001191 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001192 IWL_INVALID_STATION) {
1193 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1194 return -EIO;
1195 }
1196
1197 /* If we have set the ASSOC_MSK and we are in BSS mode then
1198 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001200 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001201 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001202 == IWL_INVALID_STATION) {
1203 IWL_ERROR("Error adding AP address for transmit.\n");
1204 return -EIO;
1205 }
1206
1207 /* Init the hardware's rate fallback order based on the
1208 * phymode */
1209 rc = iwl3945_init_hw_rate_table(priv);
1210 if (rc) {
1211 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1212 return -EIO;
1213 }
1214
1215 return 0;
1216}
1217
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001218static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001220 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001221 .flags = 3,
1222 .lead_time = 0xAA,
1223 .max_kill = 1,
1224 .kill_ack_mask = 0,
1225 .kill_cts_mask = 0,
1226 };
1227
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001228 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1229 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001230}
1231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001232static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001233{
1234 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001235 struct iwl3945_rx_packet *res;
1236 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001237 .id = REPLY_SCAN_ABORT_CMD,
1238 .meta.flags = CMD_WANT_SKB,
1239 };
1240
1241 /* If there isn't a scan actively going on in the hardware
1242 * then we are in between scan bands and not actually
1243 * actively scanning, so don't send the abort command */
1244 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1245 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1246 return 0;
1247 }
1248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001249 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001250 if (rc) {
1251 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1252 return rc;
1253 }
1254
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001255 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001256 if (res->u.status != CAN_ABORT_STATUS) {
1257 /* The scan abort will return 1 for success or
1258 * 2 for "failure". A failure condition can be
1259 * due to simply not being in an active scan which
1260 * can occur if we send the scan abort before we
1261 * the microcode has notified us that a scan is
1262 * completed. */
1263 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1264 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1265 clear_bit(STATUS_SCAN_HW, &priv->status);
1266 }
1267
1268 dev_kfree_skb_any(cmd.meta.u.skb);
1269
1270 return rc;
1271}
1272
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001273static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1274 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001275 struct sk_buff *skb)
1276{
1277 return 1;
1278}
1279
1280/*
1281 * CARD_STATE_CMD
1282 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001283 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001284 *
1285 * When in the 'enable' state the card operates as normal.
1286 * When in the 'disable' state, the card enters into a low power mode.
1287 * When in the 'halt' state, the card is shut down and must be fully
1288 * restarted to come back on.
1289 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001290static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001291{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001292 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001293 .id = REPLY_CARD_STATE_CMD,
1294 .len = sizeof(u32),
1295 .data = &flags,
1296 .meta.flags = meta_flag,
1297 };
1298
1299 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001302 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001303}
1304
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1306 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001307{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001308 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001309
1310 if (!skb) {
1311 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1312 return 1;
1313 }
1314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001315 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001316 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1317 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1318 res->hdr.flags);
1319 return 1;
1320 }
1321
1322 switch (res->u.add_sta.status) {
1323 case ADD_STA_SUCCESS_MSK:
1324 break;
1325 default:
1326 break;
1327 }
1328
1329 /* We didn't cache the SKB; let the caller free it */
1330 return 1;
1331}
1332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001333int iwl3945_send_add_station(struct iwl3945_priv *priv,
1334 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001335{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001336 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001337 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001338 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001339 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001340 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001341 .meta.flags = flags,
1342 .data = sta,
1343 };
1344
1345 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001346 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001347 else
1348 cmd.meta.flags |= CMD_WANT_SKB;
1349
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001350 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001351
1352 if (rc || (flags & CMD_ASYNC))
1353 return rc;
1354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001355 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 rc = -EIO;
1360 }
1361
1362 if (rc == 0) {
1363 switch (res->u.add_sta.status) {
1364 case ADD_STA_SUCCESS_MSK:
1365 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1366 break;
1367 default:
1368 rc = -EIO;
1369 IWL_WARNING("REPLY_ADD_STA failed\n");
1370 break;
1371 }
1372 }
1373
1374 priv->alloc_rxb_skb--;
1375 dev_kfree_skb_any(cmd.meta.u.skb);
1376
1377 return rc;
1378}
1379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001380static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001381 struct ieee80211_key_conf *keyconf,
1382 u8 sta_id)
1383{
1384 unsigned long flags;
1385 __le16 key_flags = 0;
1386
1387 switch (keyconf->alg) {
1388 case ALG_CCMP:
1389 key_flags |= STA_KEY_FLG_CCMP;
1390 key_flags |= cpu_to_le16(
1391 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1392 key_flags &= ~STA_KEY_FLG_INVALID;
1393 break;
1394 case ALG_TKIP:
1395 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001396 default:
1397 return -EINVAL;
1398 }
1399 spin_lock_irqsave(&priv->sta_lock, flags);
1400 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1401 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1402 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1403 keyconf->keylen);
1404
1405 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1406 keyconf->keylen);
1407 priv->stations[sta_id].sta.key.key_flags = key_flags;
1408 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1409 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1410
1411 spin_unlock_irqrestore(&priv->sta_lock, flags);
1412
1413 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001414 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001415 return 0;
1416}
1417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001418static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001419{
1420 unsigned long flags;
1421
1422 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1424 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001425 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1426 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1427 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1428 spin_unlock_irqrestore(&priv->sta_lock, flags);
1429
1430 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001431 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001432 return 0;
1433}
1434
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001435static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001436{
1437 struct list_head *element;
1438
1439 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1440 priv->frames_count);
1441
1442 while (!list_empty(&priv->free_frames)) {
1443 element = priv->free_frames.next;
1444 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001445 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001446 priv->frames_count--;
1447 }
1448
1449 if (priv->frames_count) {
1450 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1451 priv->frames_count);
1452 priv->frames_count = 0;
1453 }
1454}
1455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001456static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001457{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001458 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001459 struct list_head *element;
1460 if (list_empty(&priv->free_frames)) {
1461 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1462 if (!frame) {
1463 IWL_ERROR("Could not allocate frame!\n");
1464 return NULL;
1465 }
1466
1467 priv->frames_count++;
1468 return frame;
1469 }
1470
1471 element = priv->free_frames.next;
1472 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001473 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001474}
1475
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001476static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001477{
1478 memset(frame, 0, sizeof(*frame));
1479 list_add(&frame->list, &priv->free_frames);
1480}
1481
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001483 struct ieee80211_hdr *hdr,
1484 const u8 *dest, int left)
1485{
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001488 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1489 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1490 return 0;
1491
1492 if (priv->ibss_beacon->len > left)
1493 return 0;
1494
1495 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1496
1497 return priv->ibss_beacon->len;
1498}
1499
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001500static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001501{
1502 u8 i;
1503
1504 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001505 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001506 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001507 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001508 }
1509
1510 return IWL_RATE_INVALID;
1511}
1512
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001513static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001514{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001515 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001516 unsigned int frame_size;
1517 int rc;
1518 u8 rate;
1519
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001520 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001521
1522 if (!frame) {
1523 IWL_ERROR("Could not obtain free frame buffer for beacon "
1524 "command.\n");
1525 return -ENOMEM;
1526 }
1527
1528 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001529 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001530 0xFF0);
1531 if (rate == IWL_INVALID_RATE)
1532 rate = IWL_RATE_6M_PLCP;
1533 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001534 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001535 if (rate == IWL_INVALID_RATE)
1536 rate = IWL_RATE_1M_PLCP;
1537 }
1538
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001539 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001540
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001541 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001542 &frame->u.cmd[0]);
1543
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001544 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001545
1546 return rc;
1547}
1548
1549/******************************************************************************
1550 *
1551 * EEPROM related functions
1552 *
1553 ******************************************************************************/
1554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001555static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001556{
1557 memcpy(mac, priv->eeprom.mac_address, 6);
1558}
1559
1560/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001561 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001562 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001563 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001564 *
1565 * NOTE: This routine uses the non-debug IO access functions.
1566 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001567int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001568{
Al Viro0e5ce1f2007-12-22 13:45:50 -05001569 __le16 *e = (__le16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001570 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001571 u32 r;
1572 int sz = sizeof(priv->eeprom);
1573 int rc;
1574 int i;
1575 u16 addr;
1576
1577 /* The EEPROM structure has several padding buffers within it
1578 * and when adding new EEPROM maps is subject to programmer errors
1579 * which may be very difficult to identify without explicitly
1580 * checking the resulting size of the eeprom map. */
1581 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1582
1583 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1584 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1585 return -ENOENT;
1586 }
1587
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001588 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001589 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001590 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001591 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001592 return -ENOENT;
1593 }
1594
1595 /* eeprom is an array of 16bit values */
1596 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001597 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1598 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001599
1600 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1601 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001602 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001603 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1604 break;
1605 udelay(IWL_EEPROM_ACCESS_DELAY);
1606 }
1607
1608 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1609 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1610 return -ETIMEDOUT;
1611 }
Al Viro0e5ce1f2007-12-22 13:45:50 -05001612 e[addr / 2] = cpu_to_le16(r >> 16);
Zhu Yib481de92007-09-25 17:54:57 -07001613 }
1614
1615 return 0;
1616}
1617
1618/******************************************************************************
1619 *
1620 * Misc. internal state and helper functions
1621 *
1622 ******************************************************************************/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001623#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07001624
1625/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001626 * iwl3945_report_frame - dump frame to syslog during debug sessions
Zhu Yib481de92007-09-25 17:54:57 -07001627 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001628 * You may hack this function to show different aspects of received frames,
Zhu Yib481de92007-09-25 17:54:57 -07001629 * including selective frame dumps.
1630 * group100 parameter selects whether to show 1 out of 100 good frames.
Zhu Yib481de92007-09-25 17:54:57 -07001631 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001632void iwl3945_report_frame(struct iwl3945_priv *priv,
1633 struct iwl3945_rx_packet *pkt,
Zhu Yib481de92007-09-25 17:54:57 -07001634 struct ieee80211_hdr *header, int group100)
1635{
1636 u32 to_us;
1637 u32 print_summary = 0;
1638 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1639 u32 hundred = 0;
1640 u32 dataframe = 0;
1641 u16 fc;
1642 u16 seq_ctl;
1643 u16 channel;
1644 u16 phy_flags;
1645 int rate_sym;
1646 u16 length;
1647 u16 status;
1648 u16 bcn_tmr;
1649 u32 tsf_low;
1650 u64 tsf;
1651 u8 rssi;
1652 u8 agc;
1653 u16 sig_avg;
1654 u16 noise_diff;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001655 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1656 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1657 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
Zhu Yib481de92007-09-25 17:54:57 -07001658 u8 *data = IWL_RX_DATA(pkt);
1659
1660 /* MAC header */
1661 fc = le16_to_cpu(header->frame_control);
1662 seq_ctl = le16_to_cpu(header->seq_ctrl);
1663
1664 /* metadata */
1665 channel = le16_to_cpu(rx_hdr->channel);
1666 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1667 rate_sym = rx_hdr->rate;
1668 length = le16_to_cpu(rx_hdr->len);
1669
1670 /* end-of-frame status and timestamp */
1671 status = le32_to_cpu(rx_end->status);
1672 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1673 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1674 tsf = le64_to_cpu(rx_end->timestamp);
1675
1676 /* signal statistics */
1677 rssi = rx_stats->rssi;
1678 agc = rx_stats->agc;
1679 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1680 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1681
1682 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1683
1684 /* if data frame is to us and all is good,
1685 * (optionally) print summary for only 1 out of every 100 */
1686 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1687 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1688 dataframe = 1;
1689 if (!group100)
1690 print_summary = 1; /* print each frame */
1691 else if (priv->framecnt_to_us < 100) {
1692 priv->framecnt_to_us++;
1693 print_summary = 0;
1694 } else {
1695 priv->framecnt_to_us = 0;
1696 print_summary = 1;
1697 hundred = 1;
1698 }
1699 } else {
1700 /* print summary for all other frames */
1701 print_summary = 1;
1702 }
1703
1704 if (print_summary) {
1705 char *title;
1706 u32 rate;
1707
1708 if (hundred)
1709 title = "100Frames";
1710 else if (fc & IEEE80211_FCTL_RETRY)
1711 title = "Retry";
1712 else if (ieee80211_is_assoc_response(fc))
1713 title = "AscRsp";
1714 else if (ieee80211_is_reassoc_response(fc))
1715 title = "RasRsp";
1716 else if (ieee80211_is_probe_response(fc)) {
1717 title = "PrbRsp";
1718 print_dump = 1; /* dump frame contents */
1719 } else if (ieee80211_is_beacon(fc)) {
1720 title = "Beacon";
1721 print_dump = 1; /* dump frame contents */
1722 } else if (ieee80211_is_atim(fc))
1723 title = "ATIM";
1724 else if (ieee80211_is_auth(fc))
1725 title = "Auth";
1726 else if (ieee80211_is_deauth(fc))
1727 title = "DeAuth";
1728 else if (ieee80211_is_disassoc(fc))
1729 title = "DisAssoc";
1730 else
1731 title = "Frame";
1732
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001733 rate = iwl3945_rate_index_from_plcp(rate_sym);
Zhu Yib481de92007-09-25 17:54:57 -07001734 if (rate == -1)
1735 rate = 0;
1736 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001737 rate = iwl3945_rates[rate].ieee / 2;
Zhu Yib481de92007-09-25 17:54:57 -07001738
1739 /* print frame summary.
1740 * MAC addresses show just the last byte (for brevity),
1741 * but you can hack it to show more, if you'd like to. */
1742 if (dataframe)
1743 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1744 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1745 title, fc, header->addr1[5],
1746 length, rssi, channel, rate);
1747 else {
1748 /* src/dst addresses assume managed mode */
1749 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1750 "src=0x%02x, rssi=%u, tim=%lu usec, "
1751 "phy=0x%02x, chnl=%d\n",
1752 title, fc, header->addr1[5],
1753 header->addr3[5], rssi,
1754 tsf_low - priv->scan_start_tsf,
1755 phy_flags, channel);
1756 }
1757 }
1758 if (print_dump)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001759 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
Zhu Yib481de92007-09-25 17:54:57 -07001760}
1761#endif
1762
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001763static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001764{
1765 if (priv->hw_setting.shared_virt)
1766 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001767 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001768 priv->hw_setting.shared_virt,
1769 priv->hw_setting.shared_phys);
1770}
1771
1772/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001773 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001774 *
1775 * return : set the bit for each supported rate insert in ie
1776 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001777static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001778 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001779{
1780 u16 ret_rates = 0, bit;
1781 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001782 u8 *cnt = ie;
1783 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001784
1785 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1786 if (bit & supported_rate) {
1787 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001788 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001789 ((bit & basic_rate) ? 0x80 : 0x00);
1790 (*cnt)++;
1791 (*left)--;
1792 if ((*left <= 0) ||
1793 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001794 break;
1795 }
1796 }
1797
1798 return ret_rates;
1799}
1800
1801/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001802 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001803 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001804static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001805 struct ieee80211_mgmt *frame,
1806 int left, int is_direct)
1807{
1808 int len = 0;
1809 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001810 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001811
1812 /* Make sure there is enough space for the probe request,
1813 * two mandatory IEs and the data */
1814 left -= 24;
1815 if (left < 0)
1816 return 0;
1817 len += 24;
1818
1819 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001820 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001821 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001822 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001823 frame->seq_ctrl = 0;
1824
1825 /* fill in our indirect SSID IE */
1826 /* ...next IE... */
1827
1828 left -= 2;
1829 if (left < 0)
1830 return 0;
1831 len += 2;
1832 pos = &(frame->u.probe_req.variable[0]);
1833 *pos++ = WLAN_EID_SSID;
1834 *pos++ = 0;
1835
1836 /* fill in our direct SSID IE... */
1837 if (is_direct) {
1838 /* ...next IE... */
1839 left -= 2 + priv->essid_len;
1840 if (left < 0)
1841 return 0;
1842 /* ... fill it in... */
1843 *pos++ = WLAN_EID_SSID;
1844 *pos++ = priv->essid_len;
1845 memcpy(pos, priv->essid, priv->essid_len);
1846 pos += priv->essid_len;
1847 len += 2 + priv->essid_len;
1848 }
1849
1850 /* fill in supported rate */
1851 /* ...next IE... */
1852 left -= 2;
1853 if (left < 0)
1854 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001855
Zhu Yib481de92007-09-25 17:54:57 -07001856 /* ... fill it in... */
1857 *pos++ = WLAN_EID_SUPP_RATES;
1858 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001859
1860 priv->active_rate = priv->rates_mask;
1861 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001862 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1863
Tomas Winklerc7c46672007-10-18 02:04:15 +02001864 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001865 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001866 priv->active_rate_basic, &left);
1867 active_rates &= ~ret_rates;
1868
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001869 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001870 priv->active_rate_basic, &left);
1871 active_rates &= ~ret_rates;
1872
Zhu Yib481de92007-09-25 17:54:57 -07001873 len += 2 + *pos;
1874 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001875 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001876 goto fill_end;
1877
1878 /* fill in supported extended rate */
1879 /* ...next IE... */
1880 left -= 2;
1881 if (left < 0)
1882 return 0;
1883 /* ... fill it in... */
1884 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1885 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001886 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001887 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001888 if (*pos > 0)
1889 len += 2 + *pos;
1890
1891 fill_end:
1892 return (u16)len;
1893}
1894
1895/*
1896 * QoS support
1897*/
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08001898#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001899static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1900 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001901{
1902
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001903 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1904 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001905}
1906
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001907static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001908{
1909 u16 cw_min = 15;
1910 u16 cw_max = 1023;
1911 u8 aifs = 2;
1912 u8 is_legacy = 0;
1913 unsigned long flags;
1914 int i;
1915
1916 spin_lock_irqsave(&priv->lock, flags);
1917 priv->qos_data.qos_active = 0;
1918
1919 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1920 if (priv->qos_data.qos_enable)
1921 priv->qos_data.qos_active = 1;
1922 if (!(priv->active_rate & 0xfff0)) {
1923 cw_min = 31;
1924 is_legacy = 1;
1925 }
1926 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1927 if (priv->qos_data.qos_enable)
1928 priv->qos_data.qos_active = 1;
1929 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1930 cw_min = 31;
1931 is_legacy = 1;
1932 }
1933
1934 if (priv->qos_data.qos_active)
1935 aifs = 3;
1936
1937 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1938 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1939 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1940 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1941 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1942
1943 if (priv->qos_data.qos_active) {
1944 i = 1;
1945 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1946 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1947 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1948 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1949 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1950
1951 i = 2;
1952 priv->qos_data.def_qos_parm.ac[i].cw_min =
1953 cpu_to_le16((cw_min + 1) / 2 - 1);
1954 priv->qos_data.def_qos_parm.ac[i].cw_max =
1955 cpu_to_le16(cw_max);
1956 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1957 if (is_legacy)
1958 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1959 cpu_to_le16(6016);
1960 else
1961 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1962 cpu_to_le16(3008);
1963 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1964
1965 i = 3;
1966 priv->qos_data.def_qos_parm.ac[i].cw_min =
1967 cpu_to_le16((cw_min + 1) / 4 - 1);
1968 priv->qos_data.def_qos_parm.ac[i].cw_max =
1969 cpu_to_le16((cw_max + 1) / 2 - 1);
1970 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1971 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1972 if (is_legacy)
1973 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1974 cpu_to_le16(3264);
1975 else
1976 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1977 cpu_to_le16(1504);
1978 } else {
1979 for (i = 1; i < 4; i++) {
1980 priv->qos_data.def_qos_parm.ac[i].cw_min =
1981 cpu_to_le16(cw_min);
1982 priv->qos_data.def_qos_parm.ac[i].cw_max =
1983 cpu_to_le16(cw_max);
1984 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1985 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1986 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1987 }
1988 }
1989 IWL_DEBUG_QOS("set QoS to default \n");
1990
1991 spin_unlock_irqrestore(&priv->lock, flags);
1992}
1993
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001994static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001995{
1996 unsigned long flags;
1997
Zhu Yib481de92007-09-25 17:54:57 -07001998 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1999 return;
2000
2001 if (!priv->qos_data.qos_enable)
2002 return;
2003
2004 spin_lock_irqsave(&priv->lock, flags);
2005 priv->qos_data.def_qos_parm.qos_flags = 0;
2006
2007 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2008 !priv->qos_data.qos_cap.q_AP.txop_request)
2009 priv->qos_data.def_qos_parm.qos_flags |=
2010 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2011
2012 if (priv->qos_data.qos_active)
2013 priv->qos_data.def_qos_parm.qos_flags |=
2014 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2015
2016 spin_unlock_irqrestore(&priv->lock, flags);
2017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002018 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002019 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2020 priv->qos_data.qos_active);
2021
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002022 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002023 &(priv->qos_data.def_qos_parm));
2024 }
2025}
2026
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002027#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07002028/*
2029 * Power management (not Tx power!) functions
2030 */
2031#define MSEC_TO_USEC 1024
2032
2033#define NOSLP __constant_cpu_to_le32(0)
2034#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2035#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2036#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2037 __constant_cpu_to_le32(X1), \
2038 __constant_cpu_to_le32(X2), \
2039 __constant_cpu_to_le32(X3), \
2040 __constant_cpu_to_le32(X4)}
2041
2042
2043/* default power management (not Tx power) table values */
2044/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002045static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002046 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2047 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2048 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2049 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2050 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2051 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2052};
2053
2054/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002055static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07002056 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2057 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2058 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2059 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2060 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2061 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2062 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2063 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2064 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2065 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2066};
2067
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002068int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002069{
2070 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002071 struct iwl3945_power_mgr *pow_data;
2072 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07002073 u16 pci_pm;
2074
2075 IWL_DEBUG_POWER("Initialize power \n");
2076
2077 pow_data = &(priv->power_data);
2078
2079 memset(pow_data, 0, sizeof(*pow_data));
2080
2081 pow_data->active_index = IWL_POWER_RANGE_0;
2082 pow_data->dtim_val = 0xffff;
2083
2084 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2085 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2086
2087 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2088 if (rc != 0)
2089 return 0;
2090 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002091 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002092
2093 IWL_DEBUG_POWER("adjust power command flags\n");
2094
2095 for (i = 0; i < IWL_POWER_AC; i++) {
2096 cmd = &pow_data->pwr_range_0[i].cmd;
2097
2098 if (pci_pm & 0x1)
2099 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2100 else
2101 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2102 }
2103 }
2104 return rc;
2105}
2106
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002107static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2108 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002109{
2110 int rc = 0, i;
2111 u8 skip;
2112 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002113 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07002114 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002115 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07002116
2117 if (mode > IWL_POWER_INDEX_5) {
2118 IWL_DEBUG_POWER("Error invalid power mode \n");
2119 return -1;
2120 }
2121 pow_data = &(priv->power_data);
2122
2123 if (pow_data->active_index == IWL_POWER_RANGE_0)
2124 range = &pow_data->pwr_range_0[0];
2125 else
2126 range = &pow_data->pwr_range_1[1];
2127
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002128 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07002129
2130#ifdef IWL_MAC80211_DISABLE
2131 if (priv->assoc_network != NULL) {
2132 unsigned long flags;
2133
2134 period = priv->assoc_network->tim.tim_period;
2135 }
2136#endif /*IWL_MAC80211_DISABLE */
2137 skip = range[mode].no_dtim;
2138
2139 if (period == 0) {
2140 period = 1;
2141 skip = 0;
2142 }
2143
2144 if (skip == 0) {
2145 max_sleep = period;
2146 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2147 } else {
2148 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2149 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2150 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2151 }
2152
2153 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2154 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2155 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2156 }
2157
2158 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2159 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2160 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2161 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2162 le32_to_cpu(cmd->sleep_interval[0]),
2163 le32_to_cpu(cmd->sleep_interval[1]),
2164 le32_to_cpu(cmd->sleep_interval[2]),
2165 le32_to_cpu(cmd->sleep_interval[3]),
2166 le32_to_cpu(cmd->sleep_interval[4]));
2167
2168 return rc;
2169}
2170
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002171static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002172{
John W. Linville9a62f732007-11-15 16:27:36 -05002173 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002174 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002175 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002176
2177 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002178 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002179 * else user level */
2180 switch (mode) {
2181 case IWL_POWER_BATTERY:
2182 final_mode = IWL_POWER_INDEX_3;
2183 break;
2184 case IWL_POWER_AC:
2185 final_mode = IWL_POWER_MODE_CAM;
2186 break;
2187 default:
2188 final_mode = mode;
2189 break;
2190 }
2191
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002192 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002194 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002195
2196 if (final_mode == IWL_POWER_MODE_CAM)
2197 clear_bit(STATUS_POWER_PMI, &priv->status);
2198 else
2199 set_bit(STATUS_POWER_PMI, &priv->status);
2200
2201 return rc;
2202}
2203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002204int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002205{
2206 /* Filter incoming packets to determine if they are targeted toward
2207 * this network, discarding packets coming from ourselves */
2208 switch (priv->iw_mode) {
2209 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2210 /* packets from our adapter are dropped (echo) */
2211 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2212 return 0;
2213 /* {broad,multi}cast packets to our IBSS go through */
2214 if (is_multicast_ether_addr(header->addr1))
2215 return !compare_ether_addr(header->addr3, priv->bssid);
2216 /* packets to our adapter go through */
2217 return !compare_ether_addr(header->addr1, priv->mac_addr);
2218 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2219 /* packets from our adapter are dropped (echo) */
2220 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2221 return 0;
2222 /* {broad,multi}cast packets to our BSS go through */
2223 if (is_multicast_ether_addr(header->addr1))
2224 return !compare_ether_addr(header->addr2, priv->bssid);
2225 /* packets to our adapter go through */
2226 return !compare_ether_addr(header->addr1, priv->mac_addr);
2227 }
2228
2229 return 1;
2230}
2231
2232#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2233
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002234static const char *iwl3945_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002235{
2236 switch (status & TX_STATUS_MSK) {
2237 case TX_STATUS_SUCCESS:
2238 return "SUCCESS";
2239 TX_STATUS_ENTRY(SHORT_LIMIT);
2240 TX_STATUS_ENTRY(LONG_LIMIT);
2241 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2242 TX_STATUS_ENTRY(MGMNT_ABORT);
2243 TX_STATUS_ENTRY(NEXT_FRAG);
2244 TX_STATUS_ENTRY(LIFE_EXPIRE);
2245 TX_STATUS_ENTRY(DEST_PS);
2246 TX_STATUS_ENTRY(ABORTED);
2247 TX_STATUS_ENTRY(BT_RETRY);
2248 TX_STATUS_ENTRY(STA_INVALID);
2249 TX_STATUS_ENTRY(FRAG_DROPPED);
2250 TX_STATUS_ENTRY(TID_DISABLE);
2251 TX_STATUS_ENTRY(FRAME_FLUSHED);
2252 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2253 TX_STATUS_ENTRY(TX_LOCKED);
2254 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2255 }
2256
2257 return "UNKNOWN";
2258}
2259
2260/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002261 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002262 *
2263 * NOTE: priv->mutex is not required before calling this function
2264 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002265static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002266{
2267 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2268 clear_bit(STATUS_SCANNING, &priv->status);
2269 return 0;
2270 }
2271
2272 if (test_bit(STATUS_SCANNING, &priv->status)) {
2273 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2274 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2275 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2276 queue_work(priv->workqueue, &priv->abort_scan);
2277
2278 } else
2279 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2280
2281 return test_bit(STATUS_SCANNING, &priv->status);
2282 }
2283
2284 return 0;
2285}
2286
2287/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002288 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002289 * @ms: amount of time to wait (in milliseconds) for scan to abort
2290 *
2291 * NOTE: priv->mutex must be held before calling this function
2292 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002293static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002294{
2295 unsigned long now = jiffies;
2296 int ret;
2297
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002298 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002299 if (ret && ms) {
2300 mutex_unlock(&priv->mutex);
2301 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2302 test_bit(STATUS_SCANNING, &priv->status))
2303 msleep(1);
2304 mutex_lock(&priv->mutex);
2305
2306 return test_bit(STATUS_SCANNING, &priv->status);
2307 }
2308
2309 return ret;
2310}
2311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002312static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002313{
2314 /* Reset ieee stats */
2315
2316 /* We don't reset the net_device_stats (ieee->stats) on
2317 * re-association */
2318
2319 priv->last_seq_num = -1;
2320 priv->last_frag_num = -1;
2321 priv->last_packet_time = 0;
2322
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002323 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002324}
2325
2326#define MAX_UCODE_BEACON_INTERVAL 1024
2327#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2328
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002329static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002330{
2331 u16 new_val = 0;
2332 u16 beacon_factor = 0;
2333
2334 beacon_factor =
2335 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2336 / MAX_UCODE_BEACON_INTERVAL;
2337 new_val = beacon_val / beacon_factor;
2338
2339 return cpu_to_le16(new_val);
2340}
2341
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002342static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002343{
2344 u64 interval_tm_unit;
2345 u64 tsf, result;
2346 unsigned long flags;
2347 struct ieee80211_conf *conf = NULL;
2348 u16 beacon_int = 0;
2349
2350 conf = ieee80211_get_hw_conf(priv->hw);
2351
2352 spin_lock_irqsave(&priv->lock, flags);
2353 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2354 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2355
2356 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2357
2358 tsf = priv->timestamp1;
2359 tsf = ((tsf << 32) | priv->timestamp0);
2360
2361 beacon_int = priv->beacon_int;
2362 spin_unlock_irqrestore(&priv->lock, flags);
2363
2364 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2365 if (beacon_int == 0) {
2366 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2367 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2368 } else {
2369 priv->rxon_timing.beacon_interval =
2370 cpu_to_le16(beacon_int);
2371 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002372 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002373 le16_to_cpu(priv->rxon_timing.beacon_interval));
2374 }
2375
2376 priv->rxon_timing.atim_window = 0;
2377 } else {
2378 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002379 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002380 /* TODO: we need to get atim_window from upper stack
2381 * for now we set to 0 */
2382 priv->rxon_timing.atim_window = 0;
2383 }
2384
2385 interval_tm_unit =
2386 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2387 result = do_div(tsf, interval_tm_unit);
2388 priv->rxon_timing.beacon_init_val =
2389 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2390
2391 IWL_DEBUG_ASSOC
2392 ("beacon interval %d beacon timer %d beacon tim %d\n",
2393 le16_to_cpu(priv->rxon_timing.beacon_interval),
2394 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2395 le16_to_cpu(priv->rxon_timing.atim_window));
2396}
2397
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002398static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002399{
2400 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2401 IWL_ERROR("APs don't scan.\n");
2402 return 0;
2403 }
2404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002405 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002406 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2407 return -EIO;
2408 }
2409
2410 if (test_bit(STATUS_SCANNING, &priv->status)) {
2411 IWL_DEBUG_SCAN("Scan already in progress.\n");
2412 return -EAGAIN;
2413 }
2414
2415 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2416 IWL_DEBUG_SCAN("Scan request while abort pending. "
2417 "Queuing.\n");
2418 return -EAGAIN;
2419 }
2420
2421 IWL_DEBUG_INFO("Starting scan...\n");
2422 priv->scan_bands = 2;
2423 set_bit(STATUS_SCANNING, &priv->status);
2424 priv->scan_start = jiffies;
2425 priv->scan_pass_start = priv->scan_start;
2426
2427 queue_work(priv->workqueue, &priv->request_scan);
2428
2429 return 0;
2430}
2431
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002432static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002433{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002434 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002435
2436 if (hw_decrypt)
2437 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2438 else
2439 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2440
2441 return 0;
2442}
2443
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002444static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
Zhu Yib481de92007-09-25 17:54:57 -07002445{
2446 if (phymode == MODE_IEEE80211A) {
2447 priv->staging_rxon.flags &=
2448 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2449 | RXON_FLG_CCK_MSK);
2450 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2451 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002452 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002453 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2454 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2455 else
2456 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2457
2458 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2459 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2460
2461 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2462 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2463 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2464 }
2465}
2466
2467/*
Ian Schram01ebd062007-10-25 17:15:22 +08002468 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002469 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002470static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002471{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002472 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002473
2474 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2475
2476 switch (priv->iw_mode) {
2477 case IEEE80211_IF_TYPE_AP:
2478 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2479 break;
2480
2481 case IEEE80211_IF_TYPE_STA:
2482 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2483 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2484 break;
2485
2486 case IEEE80211_IF_TYPE_IBSS:
2487 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2488 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2489 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2490 RXON_FILTER_ACCEPT_GRP_MSK;
2491 break;
2492
2493 case IEEE80211_IF_TYPE_MNTR:
2494 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2495 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2496 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2497 break;
2498 }
2499
2500#if 0
2501 /* TODO: Figure out when short_preamble would be set and cache from
2502 * that */
2503 if (!hw_to_local(priv->hw)->short_preamble)
2504 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2505 else
2506 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2507#endif
2508
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002509 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
Zhu Yib481de92007-09-25 17:54:57 -07002510 le16_to_cpu(priv->staging_rxon.channel));
2511
2512 if (!ch_info)
2513 ch_info = &priv->channel_info[0];
2514
2515 /*
2516 * in some case A channels are all non IBSS
2517 * in this case force B/G channel
2518 */
2519 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2520 !(is_channel_ibss(ch_info)))
2521 ch_info = &priv->channel_info[0];
2522
2523 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2524 if (is_channel_a_band(ch_info))
2525 priv->phymode = MODE_IEEE80211A;
2526 else
2527 priv->phymode = MODE_IEEE80211G;
2528
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002529 iwl3945_set_flags_for_phymode(priv, priv->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07002530
2531 priv->staging_rxon.ofdm_basic_rates =
2532 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2533 priv->staging_rxon.cck_basic_rates =
2534 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2535}
2536
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002537static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002538{
Zhu Yib481de92007-09-25 17:54:57 -07002539 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002540 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002541
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002542 ch_info = iwl3945_get_channel_info(priv,
Zhu Yib481de92007-09-25 17:54:57 -07002543 priv->phymode,
2544 le16_to_cpu(priv->staging_rxon.channel));
2545
2546 if (!ch_info || !is_channel_ibss(ch_info)) {
2547 IWL_ERROR("channel %d not IBSS channel\n",
2548 le16_to_cpu(priv->staging_rxon.channel));
2549 return -EINVAL;
2550 }
2551 }
2552
Zhu Yib481de92007-09-25 17:54:57 -07002553 priv->iw_mode = mode;
2554
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002555 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002556 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2557
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002558 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002559
Mohamed Abbasfde35712007-11-29 11:10:15 +08002560 /* dont commit rxon if rf-kill is on*/
2561 if (!iwl3945_is_ready_rf(priv))
2562 return -EAGAIN;
2563
2564 cancel_delayed_work(&priv->scan_check);
2565 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2566 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2567 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2568 return -EAGAIN;
2569 }
2570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002571 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002572
2573 return 0;
2574}
2575
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002576static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002577 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002578 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002579 struct sk_buff *skb_frag,
2580 int last_frag)
2581{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002582 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002583
2584 switch (keyinfo->alg) {
2585 case ALG_CCMP:
2586 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2587 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2588 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2589 break;
2590
2591 case ALG_TKIP:
2592#if 0
2593 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2594
2595 if (last_frag)
2596 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2597 8);
2598 else
2599 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2600#endif
2601 break;
2602
2603 case ALG_WEP:
2604 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2605 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2606
2607 if (keyinfo->keylen == 13)
2608 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2609
2610 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2611
2612 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2613 "with key %d\n", ctl->key_idx);
2614 break;
2615
Zhu Yib481de92007-09-25 17:54:57 -07002616 default:
2617 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2618 break;
2619 }
2620}
2621
2622/*
2623 * handle build REPLY_TX command notification.
2624 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002625static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2626 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002627 struct ieee80211_tx_control *ctrl,
2628 struct ieee80211_hdr *hdr,
2629 int is_unicast, u8 std_id)
2630{
2631 __le16 *qc;
2632 u16 fc = le16_to_cpu(hdr->frame_control);
2633 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2634
2635 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2636 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2637 tx_flags |= TX_CMD_FLG_ACK_MSK;
2638 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2639 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2640 if (ieee80211_is_probe_response(fc) &&
2641 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2642 tx_flags |= TX_CMD_FLG_TSF_MSK;
2643 } else {
2644 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2645 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2646 }
2647
2648 cmd->cmd.tx.sta_id = std_id;
2649 if (ieee80211_get_morefrag(hdr))
2650 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2651
2652 qc = ieee80211_get_qos_ctrl(hdr);
2653 if (qc) {
2654 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2655 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2656 } else
2657 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2658
2659 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2660 tx_flags |= TX_CMD_FLG_RTS_MSK;
2661 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2662 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2663 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2664 tx_flags |= TX_CMD_FLG_CTS_MSK;
2665 }
2666
2667 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2668 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2669
2670 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2671 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2672 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2673 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002674 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002675 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002676 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002677 } else
2678 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2679
2680 cmd->cmd.tx.driver_txop = 0;
2681 cmd->cmd.tx.tx_flags = tx_flags;
2682 cmd->cmd.tx.next_frame_len = 0;
2683}
2684
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002685/**
2686 * iwl3945_get_sta_id - Find station's index within station table
2687 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002688static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002689{
2690 int sta_id;
2691 u16 fc = le16_to_cpu(hdr->frame_control);
2692
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002693 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002694 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2695 is_multicast_ether_addr(hdr->addr1))
2696 return priv->hw_setting.bcast_sta_id;
2697
2698 switch (priv->iw_mode) {
2699
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002700 /* If we are a client station in a BSS network, use the special
2701 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002702 case IEEE80211_IF_TYPE_STA:
2703 return IWL_AP_ID;
2704
2705 /* If we are an AP, then find the station, or use BCAST */
2706 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002707 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002708 if (sta_id != IWL_INVALID_STATION)
2709 return sta_id;
2710 return priv->hw_setting.bcast_sta_id;
2711
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002712 /* If this frame is going out to an IBSS network, find the station,
2713 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002714 case IEEE80211_IF_TYPE_IBSS: {
2715 DECLARE_MAC_BUF(mac);
2716
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002717 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002718 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002719 if (sta_id != IWL_INVALID_STATION)
2720 return sta_id;
2721
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002722 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002723
2724 if (sta_id != IWL_INVALID_STATION)
2725 return sta_id;
2726
Joe Perches0795af52007-10-03 17:59:30 -07002727 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002728 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002729 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002730 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002731 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002732 }
Zhu Yib481de92007-09-25 17:54:57 -07002733 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002734 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002735 return priv->hw_setting.bcast_sta_id;
2736 }
2737}
2738
2739/*
2740 * start REPLY_TX command process
2741 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002742static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002743 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2744{
2745 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002746 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002747 u32 *control_flags;
2748 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002749 struct iwl3945_tx_queue *txq = NULL;
2750 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002751 dma_addr_t phys_addr;
2752 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002753 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002754 u16 len, idx, len_org;
2755 u8 id, hdr_len, unicast;
2756 u8 sta_id;
2757 u16 seq_number = 0;
2758 u16 fc;
2759 __le16 *qc;
2760 u8 wait_write_ptr = 0;
2761 unsigned long flags;
2762 int rc;
2763
2764 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002765 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002766 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2767 goto drop_unlock;
2768 }
2769
Johannes Berg32bfd352007-12-19 01:31:26 +01002770 if (!priv->vif) {
2771 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002772 goto drop_unlock;
2773 }
2774
2775 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2776 IWL_ERROR("ERROR: No TX rate available.\n");
2777 goto drop_unlock;
2778 }
2779
2780 unicast = !is_multicast_ether_addr(hdr->addr1);
2781 id = 0;
2782
2783 fc = le16_to_cpu(hdr->frame_control);
2784
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002785#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002786 if (ieee80211_is_auth(fc))
2787 IWL_DEBUG_TX("Sending AUTH frame\n");
2788 else if (ieee80211_is_assoc_request(fc))
2789 IWL_DEBUG_TX("Sending ASSOC frame\n");
2790 else if (ieee80211_is_reassoc_request(fc))
2791 IWL_DEBUG_TX("Sending REASSOC frame\n");
2792#endif
2793
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002794 /* drop all data frame if we are not associated */
2795 if (!iwl3945_is_associated(priv) && !priv->assoc_id &&
Zhu Yib481de92007-09-25 17:54:57 -07002796 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002797 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002798 goto drop_unlock;
2799 }
2800
2801 spin_unlock_irqrestore(&priv->lock, flags);
2802
2803 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002804
2805 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002806 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002807 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002808 DECLARE_MAC_BUF(mac);
2809
2810 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2811 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002812 goto drop;
2813 }
2814
2815 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2816
2817 qc = ieee80211_get_qos_ctrl(hdr);
2818 if (qc) {
2819 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2820 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2821 IEEE80211_SCTL_SEQ;
2822 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2823 (hdr->seq_ctrl &
2824 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2825 seq_number += 0x10;
2826 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002827
2828 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002829 txq = &priv->txq[txq_id];
2830 q = &txq->q;
2831
2832 spin_lock_irqsave(&priv->lock, flags);
2833
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002834 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002835 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002836 memset(tfd, 0, sizeof(*tfd));
2837 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002838 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002839
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002840 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002841 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002842 txq->txb[q->write_ptr].skb[0] = skb;
2843 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002844 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002845
2846 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002847 out_cmd = &txq->cmd[idx];
2848 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2849 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002850
2851 /*
2852 * Set up the Tx-command (not MAC!) header.
2853 * Store the chosen Tx queue and TFD index within the sequence field;
2854 * after Tx, uCode's Tx response will return this value so driver can
2855 * locate the frame within the tx queue and do post-tx processing.
2856 */
Zhu Yib481de92007-09-25 17:54:57 -07002857 out_cmd->hdr.cmd = REPLY_TX;
2858 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002859 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002860
2861 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002862 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2863
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002864 /*
2865 * Use the first empty entry in this queue's command buffer array
2866 * to contain the Tx command and MAC header concatenated together
2867 * (payload data will be in another buffer).
2868 * Size of this varies, due to varying MAC header length.
2869 * If end is not dword aligned, we'll have 2 extra bytes at the end
2870 * of the MAC header (device reads on dword boundaries).
2871 * We'll tell device about this padding later.
2872 */
Zhu Yib481de92007-09-25 17:54:57 -07002873 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002874 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002875
2876 len_org = len;
2877 len = (len + 3) & ~3;
2878
2879 if (len_org != len)
2880 len_org = 1;
2881 else
2882 len_org = 0;
2883
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002884 /* Physical address of this Tx command's header (not MAC header!),
2885 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002886 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2887 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002888
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002889 /* Add buffer containing Tx command and MAC(!) header to TFD's
2890 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002891 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002892
2893 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002894 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002895
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002896 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2897 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002898 len = skb->len - hdr_len;
2899 if (len) {
2900 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2901 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002902 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002903 }
2904
Zhu Yib481de92007-09-25 17:54:57 -07002905 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002906 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002907 *control_flags = TFD_CTL_COUNT_SET(1);
2908 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002909 /* Else use 2 buffers.
2910 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002911 *control_flags = TFD_CTL_COUNT_SET(2) |
2912 TFD_CTL_PAD_SET(U32_PAD(len));
2913
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002914 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002915 len = (u16)skb->len;
2916 out_cmd->cmd.tx.len = cpu_to_le16(len);
2917
2918 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002919 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002920
2921 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002922 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002923
2924 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2925 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2926
2927 if (!ieee80211_get_morefrag(hdr)) {
2928 txq->need_update = 1;
2929 if (qc) {
2930 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2931 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2932 }
2933 } else {
2934 wait_write_ptr = 1;
2935 txq->need_update = 0;
2936 }
2937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002938 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002939 sizeof(out_cmd->cmd.tx));
2940
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002941 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002942 ieee80211_get_hdrlen(fc));
2943
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002944 /* Tell device the write index *just past* this latest filled TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002945 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2946 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002947 spin_unlock_irqrestore(&priv->lock, flags);
2948
2949 if (rc)
2950 return rc;
2951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002952 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002953 && priv->mac80211_registered) {
2954 if (wait_write_ptr) {
2955 spin_lock_irqsave(&priv->lock, flags);
2956 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002957 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002958 spin_unlock_irqrestore(&priv->lock, flags);
2959 }
2960
2961 ieee80211_stop_queue(priv->hw, ctl->queue);
2962 }
2963
2964 return 0;
2965
2966drop_unlock:
2967 spin_unlock_irqrestore(&priv->lock, flags);
2968drop:
2969 return -1;
2970}
2971
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002972static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002973{
2974 const struct ieee80211_hw_mode *hw = NULL;
2975 struct ieee80211_rate *rate;
2976 int i;
2977
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002978 hw = iwl3945_get_hw_mode(priv, priv->phymode);
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002979 if (!hw) {
2980 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2981 return;
2982 }
Zhu Yib481de92007-09-25 17:54:57 -07002983
2984 priv->active_rate = 0;
2985 priv->active_rate_basic = 0;
2986
2987 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
2988 hw->mode == MODE_IEEE80211A ?
2989 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
2990
2991 for (i = 0; i < hw->num_rates; i++) {
2992 rate = &(hw->rates[i]);
2993 if ((rate->val < IWL_RATE_COUNT) &&
2994 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
2995 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002996 rate->val, iwl3945_rates[rate->val].plcp,
Zhu Yib481de92007-09-25 17:54:57 -07002997 (rate->flags & IEEE80211_RATE_BASIC) ?
2998 "*" : "");
2999 priv->active_rate |= (1 << rate->val);
3000 if (rate->flags & IEEE80211_RATE_BASIC)
3001 priv->active_rate_basic |= (1 << rate->val);
3002 } else
3003 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003004 rate->val, iwl3945_rates[rate->val].plcp);
Zhu Yib481de92007-09-25 17:54:57 -07003005 }
3006
3007 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3008 priv->active_rate, priv->active_rate_basic);
3009
3010 /*
3011 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3012 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3013 * OFDM
3014 */
3015 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3016 priv->staging_rxon.cck_basic_rates =
3017 ((priv->active_rate_basic &
3018 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3019 else
3020 priv->staging_rxon.cck_basic_rates =
3021 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3022
3023 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3024 priv->staging_rxon.ofdm_basic_rates =
3025 ((priv->active_rate_basic &
3026 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3027 IWL_FIRST_OFDM_RATE) & 0xFF;
3028 else
3029 priv->staging_rxon.ofdm_basic_rates =
3030 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3031}
3032
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003033static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07003034{
3035 unsigned long flags;
3036
3037 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3038 return;
3039
3040 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3041 disable_radio ? "OFF" : "ON");
3042
3043 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003044 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003045 /* FIXME: This is a workaround for AP */
3046 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3047 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003048 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003049 CSR_UCODE_SW_BIT_RFKILL);
3050 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003051 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07003052 set_bit(STATUS_RF_KILL_SW, &priv->status);
3053 }
3054 return;
3055 }
3056
3057 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003058 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07003059
3060 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3061 spin_unlock_irqrestore(&priv->lock, flags);
3062
3063 /* wake up ucode */
3064 msleep(10);
3065
3066 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003067 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3068 if (!iwl3945_grab_nic_access(priv))
3069 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003070 spin_unlock_irqrestore(&priv->lock, flags);
3071
3072 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3073 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3074 "disabled by HW switch\n");
3075 return;
3076 }
3077
3078 queue_work(priv->workqueue, &priv->restart);
3079 return;
3080}
3081
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003082void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07003083 u32 decrypt_res, struct ieee80211_rx_status *stats)
3084{
3085 u16 fc =
3086 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3087
3088 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3089 return;
3090
3091 if (!(fc & IEEE80211_FCTL_PROTECTED))
3092 return;
3093
3094 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3095 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3096 case RX_RES_STATUS_SEC_TYPE_TKIP:
3097 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3098 RX_RES_STATUS_BAD_ICV_MIC)
3099 stats->flag |= RX_FLAG_MMIC_ERROR;
3100 case RX_RES_STATUS_SEC_TYPE_WEP:
3101 case RX_RES_STATUS_SEC_TYPE_CCMP:
3102 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3103 RX_RES_STATUS_DECRYPT_OK) {
3104 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3105 stats->flag |= RX_FLAG_DECRYPTED;
3106 }
3107 break;
3108
3109 default:
3110 break;
3111 }
3112}
3113
Zhu Yib481de92007-09-25 17:54:57 -07003114#define IWL_PACKET_RETRY_TIME HZ
3115
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003116int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07003117{
3118 u16 sc = le16_to_cpu(header->seq_ctrl);
3119 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3120 u16 frag = sc & IEEE80211_SCTL_FRAG;
3121 u16 *last_seq, *last_frag;
3122 unsigned long *last_time;
3123
3124 switch (priv->iw_mode) {
3125 case IEEE80211_IF_TYPE_IBSS:{
3126 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003127 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07003128 u8 *mac = header->addr2;
3129 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3130
3131 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003132 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07003133 if (!compare_ether_addr(entry->mac, mac))
3134 break;
3135 }
3136 if (p == &priv->ibss_mac_hash[index]) {
3137 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3138 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003139 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07003140 return 0;
3141 }
3142 memcpy(entry->mac, mac, ETH_ALEN);
3143 entry->seq_num = seq;
3144 entry->frag_num = frag;
3145 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08003146 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07003147 return 0;
3148 }
3149 last_seq = &entry->seq_num;
3150 last_frag = &entry->frag_num;
3151 last_time = &entry->packet_time;
3152 break;
3153 }
3154 case IEEE80211_IF_TYPE_STA:
3155 last_seq = &priv->last_seq_num;
3156 last_frag = &priv->last_frag_num;
3157 last_time = &priv->last_packet_time;
3158 break;
3159 default:
3160 return 0;
3161 }
3162 if ((*last_seq == seq) &&
3163 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3164 if (*last_frag == frag)
3165 goto drop;
3166 if (*last_frag + 1 != frag)
3167 /* out-of-order fragment */
3168 goto drop;
3169 } else
3170 *last_seq = seq;
3171
3172 *last_frag = frag;
3173 *last_time = jiffies;
3174 return 0;
3175
3176 drop:
3177 return 1;
3178}
3179
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003180#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003181
3182#include "iwl-spectrum.h"
3183
3184#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3185#define BEACON_TIME_MASK_HIGH 0xFF000000
3186#define TIME_UNIT 1024
3187
3188/*
3189 * extended beacon time format
3190 * time in usec will be changed into a 32-bit value in 8:24 format
3191 * the high 1 byte is the beacon counts
3192 * the lower 3 bytes is the time in usec within one beacon interval
3193 */
3194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003195static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003196{
3197 u32 quot;
3198 u32 rem;
3199 u32 interval = beacon_interval * 1024;
3200
3201 if (!interval || !usec)
3202 return 0;
3203
3204 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3205 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3206
3207 return (quot << 24) + rem;
3208}
3209
3210/* base is usually what we get from ucode with each received frame,
3211 * the same as HW timer counter counting down
3212 */
3213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003214static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003215{
3216 u32 base_low = base & BEACON_TIME_MASK_LOW;
3217 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3218 u32 interval = beacon_interval * TIME_UNIT;
3219 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3220 (addon & BEACON_TIME_MASK_HIGH);
3221
3222 if (base_low > addon_low)
3223 res += base_low - addon_low;
3224 else if (base_low < addon_low) {
3225 res += interval + base_low - addon_low;
3226 res += (1 << 24);
3227 } else
3228 res += (1 << 24);
3229
3230 return cpu_to_le32(res);
3231}
3232
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003233static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003234 struct ieee80211_measurement_params *params,
3235 u8 type)
3236{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003237 struct iwl3945_spectrum_cmd spectrum;
3238 struct iwl3945_rx_packet *res;
3239 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003240 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3241 .data = (void *)&spectrum,
3242 .meta.flags = CMD_WANT_SKB,
3243 };
3244 u32 add_time = le64_to_cpu(params->start_time);
3245 int rc;
3246 int spectrum_resp_status;
3247 int duration = le16_to_cpu(params->duration);
3248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003249 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003250 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003251 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003252 le64_to_cpu(params->start_time) - priv->last_tsf,
3253 le16_to_cpu(priv->rxon_timing.beacon_interval));
3254
3255 memset(&spectrum, 0, sizeof(spectrum));
3256
3257 spectrum.channel_count = cpu_to_le16(1);
3258 spectrum.flags =
3259 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3260 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3261 cmd.len = sizeof(spectrum);
3262 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3263
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003264 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003265 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003266 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003267 add_time,
3268 le16_to_cpu(priv->rxon_timing.beacon_interval));
3269 else
3270 spectrum.start_time = 0;
3271
3272 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3273 spectrum.channels[0].channel = params->channel;
3274 spectrum.channels[0].type = type;
3275 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3276 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3277 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3278
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003279 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003280 if (rc)
3281 return rc;
3282
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003283 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003284 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3285 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3286 rc = -EIO;
3287 }
3288
3289 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3290 switch (spectrum_resp_status) {
3291 case 0: /* Command will be handled */
3292 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003293 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3294 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003295 priv->measurement_status &= ~MEASUREMENT_READY;
3296 }
3297 priv->measurement_status |= MEASUREMENT_ACTIVE;
3298 rc = 0;
3299 break;
3300
3301 case 1: /* Command will not be handled */
3302 rc = -EAGAIN;
3303 break;
3304 }
3305
3306 dev_kfree_skb_any(cmd.meta.u.skb);
3307
3308 return rc;
3309}
3310#endif
3311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003312static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3313 struct iwl3945_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003314{
3315
3316 tx_sta->status.ack_signal = 0;
3317 tx_sta->status.excessive_retries = 0;
3318 tx_sta->status.queue_length = 0;
3319 tx_sta->status.queue_number = 0;
3320
3321 if (in_interrupt())
3322 ieee80211_tx_status_irqsafe(priv->hw,
3323 tx_sta->skb[0], &(tx_sta->status));
3324 else
3325 ieee80211_tx_status(priv->hw,
3326 tx_sta->skb[0], &(tx_sta->status));
3327
3328 tx_sta->skb[0] = NULL;
3329}
3330
3331/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003332 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003333 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003334 * When FW advances 'R' index, all entries between old and new 'R' index
3335 * need to be reclaimed. As result, some free space forms. If there is
3336 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003337 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003338static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003339{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003340 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3341 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003342 int nfreed = 0;
3343
3344 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3345 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3346 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003347 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003348 return 0;
3349 }
3350
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003351 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003352 q->read_ptr != index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003353 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003354 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003355 iwl3945_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003356 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003357 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003358 } else if (nfreed > 1) {
3359 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003360 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003361 queue_work(priv->workqueue, &priv->restart);
3362 }
3363 nfreed++;
3364 }
3365
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003366 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003367 (txq_id != IWL_CMD_QUEUE_NUM) &&
3368 priv->mac80211_registered)
3369 ieee80211_wake_queue(priv->hw, txq_id);
3370
3371
3372 return nfreed;
3373}
3374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003375static int iwl3945_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003376{
3377 return (status & 0xFF) == 0x1;
3378}
3379
3380/******************************************************************************
3381 *
3382 * Generic RX handler implementations
3383 *
3384 ******************************************************************************/
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003385/**
3386 * iwl3945_rx_reply_tx - Handle Tx response
3387 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003388static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3389 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003390{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003391 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003392 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3393 int txq_id = SEQ_TO_QUEUE(sequence);
3394 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003395 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003396 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003397 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003398 u32 status = le32_to_cpu(tx_resp->status);
3399
3400 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3401 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3402 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003403 index, txq->q.n_bd, txq->q.write_ptr,
3404 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003405 return;
3406 }
3407
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003408 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003409
3410 tx_status->retry_count = tx_resp->failure_frame;
3411 tx_status->queue_number = status;
3412 tx_status->queue_length = tx_resp->bt_kill_count;
3413 tx_status->queue_length |= tx_resp->failure_rts;
3414
3415 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003416 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003418 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
Zhu Yib481de92007-09-25 17:54:57 -07003419
3420 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003421 txq_id, iwl3945_get_tx_fail_reason(status), status,
Zhu Yib481de92007-09-25 17:54:57 -07003422 tx_resp->rate, tx_resp->failure_frame);
3423
3424 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3425 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003426 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003427
3428 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3429 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3430}
3431
3432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003433static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3434 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003435{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003436 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3437 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003438 struct delayed_work *pwork;
3439
3440 palive = &pkt->u.alive_frame;
3441
3442 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3443 "0x%01X 0x%01X\n",
3444 palive->is_valid, palive->ver_type,
3445 palive->ver_subtype);
3446
3447 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3448 IWL_DEBUG_INFO("Initialization Alive received.\n");
3449 memcpy(&priv->card_alive_init,
3450 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003451 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003452 pwork = &priv->init_alive_start;
3453 } else {
3454 IWL_DEBUG_INFO("Runtime Alive received.\n");
3455 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003456 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003457 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003458 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003459 }
3460
3461 /* We delay the ALIVE response by 5ms to
3462 * give the HW RF Kill time to activate... */
3463 if (palive->is_valid == UCODE_VALID_OK)
3464 queue_delayed_work(priv->workqueue, pwork,
3465 msecs_to_jiffies(5));
3466 else
3467 IWL_WARNING("uCode did not respond OK.\n");
3468}
3469
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003470static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3471 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003472{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003473 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003474
3475 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3476 return;
3477}
3478
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003479static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3480 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003482 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003483
3484 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3485 "seq 0x%04X ser 0x%08X\n",
3486 le32_to_cpu(pkt->u.err_resp.error_type),
3487 get_cmd_string(pkt->u.err_resp.cmd_id),
3488 pkt->u.err_resp.cmd_id,
3489 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3490 le32_to_cpu(pkt->u.err_resp.error_info));
3491}
3492
3493#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3494
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003495static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003496{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003497 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3498 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3499 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003500 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3501 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3502 rxon->channel = csa->channel;
3503 priv->staging_rxon.channel = csa->channel;
3504}
3505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003506static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3507 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003508{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003509#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003510 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3511 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003512
3513 if (!report->state) {
3514 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3515 "Spectrum Measure Notification: Start\n");
3516 return;
3517 }
3518
3519 memcpy(&priv->measure_report, report, sizeof(*report));
3520 priv->measurement_status |= MEASUREMENT_READY;
3521#endif
3522}
3523
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003524static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3525 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003526{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003527#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003528 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3529 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003530 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3531 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3532#endif
3533}
3534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003535static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3536 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003537{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003538 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003539 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3540 "notification for %s:\n",
3541 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003542 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003543}
3544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003545static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003546{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003547 struct iwl3945_priv *priv =
3548 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003549 struct sk_buff *beacon;
3550
3551 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003552 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003553
3554 if (!beacon) {
3555 IWL_ERROR("update beacon failed\n");
3556 return;
3557 }
3558
3559 mutex_lock(&priv->mutex);
3560 /* new beacon skb is allocated every time; dispose previous.*/
3561 if (priv->ibss_beacon)
3562 dev_kfree_skb(priv->ibss_beacon);
3563
3564 priv->ibss_beacon = beacon;
3565 mutex_unlock(&priv->mutex);
3566
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003567 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003568}
3569
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003570static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3571 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003572{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003573#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003574 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3575 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003576 u8 rate = beacon->beacon_notify_hdr.rate;
3577
3578 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3579 "tsf %d %d rate %d\n",
3580 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3581 beacon->beacon_notify_hdr.failure_frame,
3582 le32_to_cpu(beacon->ibss_mgr_status),
3583 le32_to_cpu(beacon->high_tsf),
3584 le32_to_cpu(beacon->low_tsf), rate);
3585#endif
3586
3587 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3588 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3589 queue_work(priv->workqueue, &priv->beacon_update);
3590}
3591
3592/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003593static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3594 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003595{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003596#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003597 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3598 struct iwl3945_scanreq_notification *notif =
3599 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003600
3601 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3602#endif
3603}
3604
3605/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003606static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3607 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003608{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003609 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3610 struct iwl3945_scanstart_notification *notif =
3611 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003612 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3613 IWL_DEBUG_SCAN("Scan start: "
3614 "%d [802.11%s] "
3615 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3616 notif->channel,
3617 notif->band ? "bg" : "a",
3618 notif->tsf_high,
3619 notif->tsf_low, notif->status, notif->beacon_timer);
3620}
3621
3622/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003623static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3624 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003625{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003626 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3627 struct iwl3945_scanresults_notification *notif =
3628 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003629
3630 IWL_DEBUG_SCAN("Scan ch.res: "
3631 "%d [802.11%s] "
3632 "(TSF: 0x%08X:%08X) - %d "
3633 "elapsed=%lu usec (%dms since last)\n",
3634 notif->channel,
3635 notif->band ? "bg" : "a",
3636 le32_to_cpu(notif->tsf_high),
3637 le32_to_cpu(notif->tsf_low),
3638 le32_to_cpu(notif->statistics[0]),
3639 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3640 jiffies_to_msecs(elapsed_jiffies
3641 (priv->last_scan_jiffies, jiffies)));
3642
3643 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003644 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003645}
3646
3647/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003648static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3649 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003650{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003651 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3652 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003653
3654 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3655 scan_notif->scanned_channels,
3656 scan_notif->tsf_low,
3657 scan_notif->tsf_high, scan_notif->status);
3658
3659 /* The HW is no longer scanning */
3660 clear_bit(STATUS_SCAN_HW, &priv->status);
3661
3662 /* The scan completion notification came in, so kill that timer... */
3663 cancel_delayed_work(&priv->scan_check);
3664
3665 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3666 (priv->scan_bands == 2) ? "2.4" : "5.2",
3667 jiffies_to_msecs(elapsed_jiffies
3668 (priv->scan_pass_start, jiffies)));
3669
3670 /* Remove this scanned band from the list
3671 * of pending bands to scan */
3672 priv->scan_bands--;
3673
3674 /* If a request to abort was given, or the scan did not succeed
3675 * then we reset the scan state machine and terminate,
3676 * re-queuing another scan if one has been requested */
3677 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3678 IWL_DEBUG_INFO("Aborted scan completed.\n");
3679 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3680 } else {
3681 /* If there are more bands on this scan pass reschedule */
3682 if (priv->scan_bands > 0)
3683 goto reschedule;
3684 }
3685
3686 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003687 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003688 IWL_DEBUG_INFO("Setting scan to off\n");
3689
3690 clear_bit(STATUS_SCANNING, &priv->status);
3691
3692 IWL_DEBUG_INFO("Scan took %dms\n",
3693 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3694
3695 queue_work(priv->workqueue, &priv->scan_completed);
3696
3697 return;
3698
3699reschedule:
3700 priv->scan_pass_start = jiffies;
3701 queue_work(priv->workqueue, &priv->request_scan);
3702}
3703
3704/* Handle notification from uCode that card's power state is changing
3705 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003706static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3707 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003708{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003709 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003710 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3711 unsigned long status = priv->status;
3712
3713 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3714 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3715 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3716
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003717 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003718 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3719
3720 if (flags & HW_CARD_DISABLED)
3721 set_bit(STATUS_RF_KILL_HW, &priv->status);
3722 else
3723 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3724
3725
3726 if (flags & SW_CARD_DISABLED)
3727 set_bit(STATUS_RF_KILL_SW, &priv->status);
3728 else
3729 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3730
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003731 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003732
3733 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3734 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3735 (test_bit(STATUS_RF_KILL_SW, &status) !=
3736 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3737 queue_work(priv->workqueue, &priv->rf_kill);
3738 else
3739 wake_up_interruptible(&priv->wait_command_queue);
3740}
3741
3742/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003743 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003744 *
3745 * Setup the RX handlers for each of the reply types sent from the uCode
3746 * to the host.
3747 *
3748 * This function chains into the hardware specific files for them to setup
3749 * any hardware specific handlers as well.
3750 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003751static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003752{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003753 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3754 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3755 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3756 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003757 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003758 iwl3945_rx_spectrum_measure_notif;
3759 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003760 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003761 iwl3945_rx_pm_debug_statistics_notif;
3762 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003763
Ben Cahill9fbab512007-11-29 11:09:47 +08003764 /*
3765 * The same handler is used for both the REPLY to a discrete
3766 * statistics request from the host as well as for the periodic
3767 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003768 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003769 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3770 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003771
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003772 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3773 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003774 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003775 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003776 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003777 iwl3945_rx_scan_complete_notif;
3778 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3779 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07003780
Ben Cahill9fbab512007-11-29 11:09:47 +08003781 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003782 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003783}
3784
3785/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003786 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003787 * @rxb: Rx buffer to reclaim
3788 *
3789 * If an Rx buffer has an async callback associated with it the callback
3790 * will be executed. The attached skb (if present) will only be freed
3791 * if the callback returns 1
3792 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003793static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3794 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003795{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003796 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003797 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3798 int txq_id = SEQ_TO_QUEUE(sequence);
3799 int index = SEQ_TO_INDEX(sequence);
3800 int huge = sequence & SEQ_HUGE_FRAME;
3801 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003802 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003803
3804 /* If a Tx command is being handled and it isn't in the actual
3805 * command queue then there a command routing bug has been introduced
3806 * in the queue management code. */
3807 if (txq_id != IWL_CMD_QUEUE_NUM)
3808 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3809 txq_id, pkt->hdr.cmd);
3810 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3811
3812 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3813 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3814
3815 /* Input error checking is done when commands are added to queue. */
3816 if (cmd->meta.flags & CMD_WANT_SKB) {
3817 cmd->meta.source->u.skb = rxb->skb;
3818 rxb->skb = NULL;
3819 } else if (cmd->meta.u.callback &&
3820 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3821 rxb->skb = NULL;
3822
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003823 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003824
3825 if (!(cmd->meta.flags & CMD_ASYNC)) {
3826 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3827 wake_up_interruptible(&priv->wait_command_queue);
3828 }
3829}
3830
3831/************************** RX-FUNCTIONS ****************************/
3832/*
3833 * Rx theory of operation
3834 *
3835 * The host allocates 32 DMA target addresses and passes the host address
3836 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3837 * 0 to 31
3838 *
3839 * Rx Queue Indexes
3840 * The host/firmware share two index registers for managing the Rx buffers.
3841 *
3842 * The READ index maps to the first position that the firmware may be writing
3843 * to -- the driver can read up to (but not including) this position and get
3844 * good data.
3845 * The READ index is managed by the firmware once the card is enabled.
3846 *
3847 * The WRITE index maps to the last position the driver has read from -- the
3848 * position preceding WRITE is the last slot the firmware can place a packet.
3849 *
3850 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3851 * WRITE = READ.
3852 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003853 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003854 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3855 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003856 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003857 * and fire the RX interrupt. The driver can then query the READ index and
3858 * process as many packets as possible, moving the WRITE index forward as it
3859 * resets the Rx queue buffers with new memory.
3860 *
3861 * The management in the driver is as follows:
3862 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3863 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003864 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003865 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003866 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3867 * 'processed' and 'read' driver indexes as well)
3868 * + A received packet is processed and handed to the kernel network stack,
3869 * detached from the iwl->rxq. The driver 'processed' index is updated.
3870 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3871 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3872 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3873 * were enough free buffers and RX_STALLED is set it is cleared.
3874 *
3875 *
3876 * Driver sequence:
3877 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003878 * iwl3945_rx_queue_alloc() Allocates rx_free
3879 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003880 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003881 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003882 * queue, updates firmware pointers, and updates
3883 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003884 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003885 *
3886 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003887 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003888 * READ INDEX, detaching the SKB from the pool.
3889 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003890 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003891 * slots.
3892 * ...
3893 *
3894 */
3895
3896/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003897 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003899static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003900{
3901 int s = q->read - q->write;
3902 if (s <= 0)
3903 s += RX_QUEUE_SIZE;
3904 /* keep some buffer to not confuse full and empty queue */
3905 s -= 2;
3906 if (s < 0)
3907 s = 0;
3908 return s;
3909}
3910
3911/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003912 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003913 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003914int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003915{
3916 u32 reg = 0;
3917 int rc = 0;
3918 unsigned long flags;
3919
3920 spin_lock_irqsave(&q->lock, flags);
3921
3922 if (q->need_update == 0)
3923 goto exit_unlock;
3924
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003925 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003926 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003927 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003928
3929 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003930 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003931 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3932 goto exit_unlock;
3933 }
3934
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003935 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003936 if (rc)
3937 goto exit_unlock;
3938
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003939 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003940 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003941 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003942 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003943
3944 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003945 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003946 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003947 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003948
3949
3950 q->need_update = 0;
3951
3952 exit_unlock:
3953 spin_unlock_irqrestore(&q->lock, flags);
3954 return rc;
3955}
3956
3957/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003958 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003959 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003960static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003961 dma_addr_t dma_addr)
3962{
3963 return cpu_to_le32((u32)dma_addr);
3964}
3965
3966/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003967 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003968 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003969 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003970 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003971 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003972 *
3973 * This moves the 'write' index forward to catch up with 'processed', and
3974 * also updates the memory address in the firmware to reference the new
3975 * target buffer.
3976 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003977static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003978{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003979 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003980 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003981 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003982 unsigned long flags;
3983 int write, rc;
3984
3985 spin_lock_irqsave(&rxq->lock, flags);
3986 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003987 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003988 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003989 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003990 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003991 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003992
3993 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003994 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003995 rxq->queue[rxq->write] = rxb;
3996 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3997 rxq->free_count--;
3998 }
3999 spin_unlock_irqrestore(&rxq->lock, flags);
4000 /* If the pre-allocated buffer pool is dropping low, schedule to
4001 * refill it */
4002 if (rxq->free_count <= RX_LOW_WATERMARK)
4003 queue_work(priv->workqueue, &priv->rx_replenish);
4004
4005
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004006 /* If we've added more space for the firmware to place data, tell it.
4007 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07004008 if ((write != (rxq->write & ~0x7))
4009 || (abs(rxq->write - rxq->read) > 7)) {
4010 spin_lock_irqsave(&rxq->lock, flags);
4011 rxq->need_update = 1;
4012 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004013 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07004014 if (rc)
4015 return rc;
4016 }
4017
4018 return 0;
4019}
4020
4021/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004022 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07004023 *
4024 * When moving to rx_free an SKB is allocated for the slot.
4025 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004026 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08004027 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07004028 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004029static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004030{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004031 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004032 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004033 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07004034 unsigned long flags;
4035 spin_lock_irqsave(&rxq->lock, flags);
4036 while (!list_empty(&rxq->rx_used)) {
4037 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004038 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004039
4040 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07004041 rxb->skb =
4042 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4043 if (!rxb->skb) {
4044 if (net_ratelimit())
4045 printk(KERN_CRIT DRV_NAME
4046 ": Can not allocate SKB buffers\n");
4047 /* We don't reschedule replenish work here -- we will
4048 * call the restock method and if it still needs
4049 * more buffers it will schedule replenish */
4050 break;
4051 }
Zhu Yi12342c42007-12-20 11:27:32 +08004052
4053 /* If radiotap head is required, reserve some headroom here.
4054 * The physical head count is a variable rx_stats->phy_count.
4055 * We reserve 4 bytes here. Plus these extra bytes, the
4056 * headroom of the physical head should be enough for the
4057 * radiotap head that iwl3945 supported. See iwl3945_rt.
4058 */
4059 skb_reserve(rxb->skb, 4);
4060
Zhu Yib481de92007-09-25 17:54:57 -07004061 priv->alloc_rxb_skb++;
4062 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004063
4064 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07004065 rxb->dma_addr =
4066 pci_map_single(priv->pci_dev, rxb->skb->data,
4067 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4068 list_add_tail(&rxb->list, &rxq->rx_free);
4069 rxq->free_count++;
4070 }
4071 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004072}
4073
4074/*
4075 * this should be called while priv->lock is locked
4076 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02004077static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004078{
4079 struct iwl3945_priv *priv = data;
4080
4081 iwl3945_rx_allocate(priv);
4082 iwl3945_rx_queue_restock(priv);
4083}
4084
4085
4086void iwl3945_rx_replenish(void *data)
4087{
4088 struct iwl3945_priv *priv = data;
4089 unsigned long flags;
4090
4091 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004092
4093 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004094 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004095 spin_unlock_irqrestore(&priv->lock, flags);
4096}
4097
4098/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08004099 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07004100 * This free routine walks the list of POOL entries and if SKB is set to
4101 * non NULL it is unmapped and freed
4102 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004103static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004104{
4105 int i;
4106 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4107 if (rxq->pool[i].skb != NULL) {
4108 pci_unmap_single(priv->pci_dev,
4109 rxq->pool[i].dma_addr,
4110 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4111 dev_kfree_skb(rxq->pool[i].skb);
4112 }
4113 }
4114
4115 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4116 rxq->dma_addr);
4117 rxq->bd = NULL;
4118}
4119
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004120int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004121{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004122 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004123 struct pci_dev *dev = priv->pci_dev;
4124 int i;
4125
4126 spin_lock_init(&rxq->lock);
4127 INIT_LIST_HEAD(&rxq->rx_free);
4128 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004129
4130 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07004131 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4132 if (!rxq->bd)
4133 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004134
Zhu Yib481de92007-09-25 17:54:57 -07004135 /* Fill the rx_used queue with _all_ of the Rx buffers */
4136 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4137 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004138
Zhu Yib481de92007-09-25 17:54:57 -07004139 /* Set us so that we have processed and used all buffers, but have
4140 * not restocked the Rx queue with fresh buffers */
4141 rxq->read = rxq->write = 0;
4142 rxq->free_count = 0;
4143 rxq->need_update = 0;
4144 return 0;
4145}
4146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004147void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07004148{
4149 unsigned long flags;
4150 int i;
4151 spin_lock_irqsave(&rxq->lock, flags);
4152 INIT_LIST_HEAD(&rxq->rx_free);
4153 INIT_LIST_HEAD(&rxq->rx_used);
4154 /* Fill the rx_used queue with _all_ of the Rx buffers */
4155 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4156 /* In the reset function, these buffers may have been allocated
4157 * to an SKB, so we need to unmap and free potential storage */
4158 if (rxq->pool[i].skb != NULL) {
4159 pci_unmap_single(priv->pci_dev,
4160 rxq->pool[i].dma_addr,
4161 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4162 priv->alloc_rxb_skb--;
4163 dev_kfree_skb(rxq->pool[i].skb);
4164 rxq->pool[i].skb = NULL;
4165 }
4166 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4167 }
4168
4169 /* Set us so that we have processed and used all buffers, but have
4170 * not restocked the Rx queue with fresh buffers */
4171 rxq->read = rxq->write = 0;
4172 rxq->free_count = 0;
4173 spin_unlock_irqrestore(&rxq->lock, flags);
4174}
4175
4176/* Convert linear signal-to-noise ratio into dB */
4177static u8 ratio2dB[100] = {
4178/* 0 1 2 3 4 5 6 7 8 9 */
4179 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4180 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4181 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4182 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4183 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4184 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4185 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4186 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4187 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4188 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4189};
4190
4191/* Calculates a relative dB value from a ratio of linear
4192 * (i.e. not dB) signal levels.
4193 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004194int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004195{
4196 /* Anything above 1000:1 just report as 60 dB */
4197 if (sig_ratio > 1000)
4198 return 60;
4199
4200 /* Above 100:1, divide by 10 and use table,
4201 * add 20 dB to make up for divide by 10 */
4202 if (sig_ratio > 100)
4203 return (20 + (int)ratio2dB[sig_ratio/10]);
4204
4205 /* We shouldn't see this */
4206 if (sig_ratio < 1)
4207 return 0;
4208
4209 /* Use table for ratios 1:1 - 99:1 */
4210 return (int)ratio2dB[sig_ratio];
4211}
4212
4213#define PERFECT_RSSI (-20) /* dBm */
4214#define WORST_RSSI (-95) /* dBm */
4215#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4216
4217/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4218 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4219 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004220int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004221{
4222 int sig_qual;
4223 int degradation = PERFECT_RSSI - rssi_dbm;
4224
4225 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4226 * as indicator; formula is (signal dbm - noise dbm).
4227 * SNR at or above 40 is a great signal (100%).
4228 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4229 * Weakest usable signal is usually 10 - 15 dB SNR. */
4230 if (noise_dbm) {
4231 if (rssi_dbm - noise_dbm >= 40)
4232 return 100;
4233 else if (rssi_dbm < noise_dbm)
4234 return 0;
4235 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4236
4237 /* Else use just the signal level.
4238 * This formula is a least squares fit of data points collected and
4239 * compared with a reference system that had a percentage (%) display
4240 * for signal quality. */
4241 } else
4242 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4243 (15 * RSSI_RANGE + 62 * degradation)) /
4244 (RSSI_RANGE * RSSI_RANGE);
4245
4246 if (sig_qual > 100)
4247 sig_qual = 100;
4248 else if (sig_qual < 1)
4249 sig_qual = 0;
4250
4251 return sig_qual;
4252}
4253
4254/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004255 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004256 *
4257 * Uses the priv->rx_handlers callback function array to invoke
4258 * the appropriate handlers, including command responses,
4259 * frame-received notifications, and other notifications.
4260 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004261static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004262{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004263 struct iwl3945_rx_mem_buffer *rxb;
4264 struct iwl3945_rx_packet *pkt;
4265 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004266 u32 r, i;
4267 int reclaim;
4268 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004269 u8 fill_rx = 0;
4270 u32 count = 0;
Zhu Yib481de92007-09-25 17:54:57 -07004271
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004272 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4273 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004274 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004275 i = rxq->read;
4276
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004277 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4278 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07004279 /* Rx interrupt, but nothing sent from uCode */
4280 if (i == r)
4281 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4282
4283 while (i != r) {
4284 rxb = rxq->queue[i];
4285
Ben Cahill9fbab512007-11-29 11:09:47 +08004286 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004287 * then a bug has been introduced in the queue refilling
4288 * routines -- catch it here */
4289 BUG_ON(rxb == NULL);
4290
4291 rxq->queue[i] = NULL;
4292
4293 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4294 IWL_RX_BUF_SIZE,
4295 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004296 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004297
4298 /* Reclaim a command buffer only if this packet is a response
4299 * to a (driver-originated) command.
4300 * If the packet (e.g. Rx frame) originated from uCode,
4301 * there is no command buffer to reclaim.
4302 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4303 * but apparently a few don't get set; catch them here. */
4304 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4305 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4306 (pkt->hdr.cmd != REPLY_TX);
4307
4308 /* Based on type of command response or notification,
4309 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004310 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004311 if (priv->rx_handlers[pkt->hdr.cmd]) {
4312 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4313 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4314 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4315 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4316 } else {
4317 /* No handling needed */
4318 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4319 "r %d i %d No handler needed for %s, 0x%02x\n",
4320 r, i, get_cmd_string(pkt->hdr.cmd),
4321 pkt->hdr.cmd);
4322 }
4323
4324 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004325 /* Invoke any callbacks, transfer the skb to caller, and
4326 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004327 * as we reclaim the driver command queue */
4328 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004329 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004330 else
4331 IWL_WARNING("Claim null rxb?\n");
4332 }
4333
4334 /* For now we just don't re-use anything. We can tweak this
4335 * later to try and re-use notification packets and SKBs that
4336 * fail to Rx correctly */
4337 if (rxb->skb != NULL) {
4338 priv->alloc_rxb_skb--;
4339 dev_kfree_skb_any(rxb->skb);
4340 rxb->skb = NULL;
4341 }
4342
4343 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4344 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4345 spin_lock_irqsave(&rxq->lock, flags);
4346 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4347 spin_unlock_irqrestore(&rxq->lock, flags);
4348 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004349 /* If there are a lot of unused frames,
4350 * restock the Rx queue so ucode won't assert. */
4351 if (fill_rx) {
4352 count++;
4353 if (count >= 8) {
4354 priv->rxq.read = i;
4355 __iwl3945_rx_replenish(priv);
4356 count = 0;
4357 }
4358 }
Zhu Yib481de92007-09-25 17:54:57 -07004359 }
4360
4361 /* Backtrack one entry */
4362 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004363 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004364}
4365
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004366/**
4367 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4368 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004369static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4370 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004371{
4372 u32 reg = 0;
4373 int rc = 0;
4374 int txq_id = txq->q.id;
4375
4376 if (txq->need_update == 0)
4377 return rc;
4378
4379 /* if we're trying to save power */
4380 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4381 /* wake up nic if it's powered down ...
4382 * uCode will wake up, and interrupt us again, so next
4383 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004384 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004385
4386 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4387 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004388 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004389 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4390 return rc;
4391 }
4392
4393 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004394 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004395 if (rc)
4396 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004397 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004398 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004399 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004400
4401 /* else not in power-save mode, uCode will never sleep when we're
4402 * trying to tx (during RFKILL, we're not trying to tx). */
4403 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004404 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004405 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004406
4407 txq->need_update = 0;
4408
4409 return rc;
4410}
4411
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004412#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004413static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004414{
Joe Perches0795af52007-10-03 17:59:30 -07004415 DECLARE_MAC_BUF(mac);
4416
Zhu Yib481de92007-09-25 17:54:57 -07004417 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004418 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004419 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4420 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4421 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4422 le32_to_cpu(rxon->filter_flags));
4423 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4424 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4425 rxon->ofdm_basic_rates);
4426 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004427 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4428 print_mac(mac, rxon->node_addr));
4429 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4430 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004431 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4432}
4433#endif
4434
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004435static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004436{
4437 IWL_DEBUG_ISR("Enabling interrupts\n");
4438 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004439 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004440}
4441
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004442static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004443{
4444 clear_bit(STATUS_INT_ENABLED, &priv->status);
4445
4446 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004447 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004448
4449 /* acknowledge/clear/reset any interrupts still pending
4450 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004451 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4452 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004453 IWL_DEBUG_ISR("Disabled interrupts\n");
4454}
4455
4456static const char *desc_lookup(int i)
4457{
4458 switch (i) {
4459 case 1:
4460 return "FAIL";
4461 case 2:
4462 return "BAD_PARAM";
4463 case 3:
4464 return "BAD_CHECKSUM";
4465 case 4:
4466 return "NMI_INTERRUPT";
4467 case 5:
4468 return "SYSASSERT";
4469 case 6:
4470 return "FATAL_ERROR";
4471 }
4472
4473 return "UNKNOWN";
4474}
4475
4476#define ERROR_START_OFFSET (1 * sizeof(u32))
4477#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4478
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004479static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004480{
4481 u32 i;
4482 u32 desc, time, count, base, data1;
4483 u32 blink1, blink2, ilink1, ilink2;
4484 int rc;
4485
4486 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4487
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004488 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004489 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4490 return;
4491 }
4492
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004493 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004494 if (rc) {
4495 IWL_WARNING("Can not read from adapter at this time.\n");
4496 return;
4497 }
4498
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004499 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004500
4501 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4502 IWL_ERROR("Start IWL Error Log Dump:\n");
4503 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4504 priv->status, priv->config, count);
4505 }
4506
4507 IWL_ERROR("Desc Time asrtPC blink2 "
4508 "ilink1 nmiPC Line\n");
4509 for (i = ERROR_START_OFFSET;
4510 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4511 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004512 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004513 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004514 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004515 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004516 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004517 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004518 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004519 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004520 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004521 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004522 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004523 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004524 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004525
4526 IWL_ERROR
4527 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4528 desc_lookup(desc), desc, time, blink1, blink2,
4529 ilink1, ilink2, data1);
4530 }
4531
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004532 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004533
4534}
4535
Ben Cahillf58177b2007-11-29 11:09:43 +08004536#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004537
4538/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004539 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004540 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004541 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004542 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004543static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004544 u32 num_events, u32 mode)
4545{
4546 u32 i;
4547 u32 base; /* SRAM byte address of event log header */
4548 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4549 u32 ptr; /* SRAM byte address of log data */
4550 u32 ev, time, data; /* event log data */
4551
4552 if (num_events == 0)
4553 return;
4554
4555 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4556
4557 if (mode == 0)
4558 event_size = 2 * sizeof(u32);
4559 else
4560 event_size = 3 * sizeof(u32);
4561
4562 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4563
4564 /* "time" is actually "data" for mode 0 (no timestamp).
4565 * place event id # at far right for easier visual parsing. */
4566 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004567 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004568 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004569 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004570 ptr += sizeof(u32);
4571 if (mode == 0)
4572 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4573 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004574 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004575 ptr += sizeof(u32);
4576 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4577 }
4578 }
4579}
4580
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004581static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004582{
4583 int rc;
4584 u32 base; /* SRAM byte address of event log header */
4585 u32 capacity; /* event log capacity in # entries */
4586 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4587 u32 num_wraps; /* # times uCode wrapped to top of log */
4588 u32 next_entry; /* index of next entry to be written by uCode */
4589 u32 size; /* # entries that we'll print */
4590
4591 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004592 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004593 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4594 return;
4595 }
4596
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004597 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004598 if (rc) {
4599 IWL_WARNING("Can not read from adapter at this time.\n");
4600 return;
4601 }
4602
4603 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004604 capacity = iwl3945_read_targ_mem(priv, base);
4605 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4606 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4607 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004608
4609 size = num_wraps ? capacity : next_entry;
4610
4611 /* bail out if nothing in log */
4612 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004613 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004614 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004615 return;
4616 }
4617
Zhu Yi583fab32007-09-27 11:27:30 +08004618 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004619 size, num_wraps);
4620
4621 /* if uCode has wrapped back to top of log, start at the oldest entry,
4622 * i.e the next one that uCode would fill. */
4623 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004624 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004625 capacity - next_entry, mode);
4626
4627 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004628 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004629
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004630 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004631}
4632
4633/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004634 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004635 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004636static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004637{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004638 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004639 set_bit(STATUS_FW_ERROR, &priv->status);
4640
4641 /* Cancel currently queued command. */
4642 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4643
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004644#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004645 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4646 iwl3945_dump_nic_error_log(priv);
4647 iwl3945_dump_nic_event_log(priv);
4648 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004649 }
4650#endif
4651
4652 wake_up_interruptible(&priv->wait_command_queue);
4653
4654 /* Keep the restart process from trying to send host
4655 * commands by clearing the INIT status bit */
4656 clear_bit(STATUS_READY, &priv->status);
4657
4658 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4659 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4660 "Restarting adapter due to uCode error.\n");
4661
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004662 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004663 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4664 sizeof(priv->recovery_rxon));
4665 priv->error_recovering = 1;
4666 }
4667 queue_work(priv->workqueue, &priv->restart);
4668 }
4669}
4670
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004671static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004672{
4673 unsigned long flags;
4674
4675 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4676 sizeof(priv->staging_rxon));
4677 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004678 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004679
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004680 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004681
4682 spin_lock_irqsave(&priv->lock, flags);
4683 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4684 priv->error_recovering = 0;
4685 spin_unlock_irqrestore(&priv->lock, flags);
4686}
4687
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004688static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004689{
4690 u32 inta, handled = 0;
4691 u32 inta_fh;
4692 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004693#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004694 u32 inta_mask;
4695#endif
4696
4697 spin_lock_irqsave(&priv->lock, flags);
4698
4699 /* Ack/clear/reset pending uCode interrupts.
4700 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4701 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004702 inta = iwl3945_read32(priv, CSR_INT);
4703 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004704
4705 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4706 * Any new interrupts that happen after this, either while we're
4707 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004708 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4709 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004710
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004711#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004712 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004713 /* just for debug */
4714 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004715 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4716 inta, inta_mask, inta_fh);
4717 }
4718#endif
4719
4720 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4721 * atomic, make sure that inta covers all the interrupts that
4722 * we've discovered, even if FH interrupt came in just after
4723 * reading CSR_INT. */
4724 if (inta_fh & CSR_FH_INT_RX_MASK)
4725 inta |= CSR_INT_BIT_FH_RX;
4726 if (inta_fh & CSR_FH_INT_TX_MASK)
4727 inta |= CSR_INT_BIT_FH_TX;
4728
4729 /* Now service all interrupt bits discovered above. */
4730 if (inta & CSR_INT_BIT_HW_ERR) {
4731 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4732
4733 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004734 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004735
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004736 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004737
4738 handled |= CSR_INT_BIT_HW_ERR;
4739
4740 spin_unlock_irqrestore(&priv->lock, flags);
4741
4742 return;
4743 }
4744
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004745#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004746 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004747 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4748 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
4749 IWL_DEBUG_ISR("Microcode started or stopped.\n");
4750
4751 /* Alive notification via Rx interrupt will do the real work */
4752 if (inta & CSR_INT_BIT_ALIVE)
4753 IWL_DEBUG_ISR("Alive interrupt\n");
4754 }
4755#endif
4756 /* Safely ignore these bits for debug checks below */
4757 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
4758
4759 /* HW RF KILL switch toggled (4965 only) */
4760 if (inta & CSR_INT_BIT_RF_KILL) {
4761 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004762 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004763 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4764 hw_rf_kill = 1;
4765
4766 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4767 "RF_KILL bit toggled to %s.\n",
4768 hw_rf_kill ? "disable radio":"enable radio");
4769
4770 /* Queue restart only if RF_KILL switch was set to "kill"
4771 * when we loaded driver, and is now set to "enable".
4772 * After we're Alive, RF_KILL gets handled by
4773 * iwl_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004774 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4775 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004776 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004777 }
Zhu Yib481de92007-09-25 17:54:57 -07004778
4779 handled |= CSR_INT_BIT_RF_KILL;
4780 }
4781
4782 /* Chip got too hot and stopped itself (4965 only) */
4783 if (inta & CSR_INT_BIT_CT_KILL) {
4784 IWL_ERROR("Microcode CT kill error detected.\n");
4785 handled |= CSR_INT_BIT_CT_KILL;
4786 }
4787
4788 /* Error detected by uCode */
4789 if (inta & CSR_INT_BIT_SW_ERR) {
4790 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4791 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004792 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004793 handled |= CSR_INT_BIT_SW_ERR;
4794 }
4795
4796 /* uCode wakes up after power-down sleep */
4797 if (inta & CSR_INT_BIT_WAKEUP) {
4798 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004799 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4800 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4801 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4802 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4803 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4804 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4805 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004806
4807 handled |= CSR_INT_BIT_WAKEUP;
4808 }
4809
4810 /* All uCode command responses, including Tx command responses,
4811 * Rx "responses" (frame-received notification), and other
4812 * notifications from uCode come through here*/
4813 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004814 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004815 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4816 }
4817
4818 if (inta & CSR_INT_BIT_FH_TX) {
4819 IWL_DEBUG_ISR("Tx interrupt\n");
4820
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004821 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4822 if (!iwl3945_grab_nic_access(priv)) {
4823 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004824 FH_TCSR_CREDIT
4825 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004826 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004827 }
4828 handled |= CSR_INT_BIT_FH_TX;
4829 }
4830
4831 if (inta & ~handled)
4832 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4833
4834 if (inta & ~CSR_INI_SET_MASK) {
4835 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4836 inta & ~CSR_INI_SET_MASK);
4837 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4838 }
4839
4840 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004841 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004842
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004843#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004844 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4845 inta = iwl3945_read32(priv, CSR_INT);
4846 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4847 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004848 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4849 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4850 }
4851#endif
4852 spin_unlock_irqrestore(&priv->lock, flags);
4853}
4854
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004855static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004856{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004857 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004858 u32 inta, inta_mask;
4859 u32 inta_fh;
4860 if (!priv)
4861 return IRQ_NONE;
4862
4863 spin_lock(&priv->lock);
4864
4865 /* Disable (but don't clear!) interrupts here to avoid
4866 * back-to-back ISRs and sporadic interrupts from our NIC.
4867 * If we have something to service, the tasklet will re-enable ints.
4868 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004869 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4870 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004871
4872 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004873 inta = iwl3945_read32(priv, CSR_INT);
4874 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004875
4876 /* Ignore interrupt if there's nothing in NIC to service.
4877 * This may be due to IRQ shared with another device,
4878 * or due to sporadic interrupts thrown from our NIC. */
4879 if (!inta && !inta_fh) {
4880 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4881 goto none;
4882 }
4883
4884 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4885 /* Hardware disappeared */
4886 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004887 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004888 }
4889
4890 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4891 inta, inta_mask, inta_fh);
4892
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004893 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Zhu Yib481de92007-09-25 17:54:57 -07004894 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004895unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004896 spin_unlock(&priv->lock);
4897
4898 return IRQ_HANDLED;
4899
4900 none:
4901 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004902 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004903 spin_unlock(&priv->lock);
4904 return IRQ_NONE;
4905}
4906
4907/************************** EEPROM BANDS ****************************
4908 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004909 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004910 * EEPROM contents to the specific channel number supported for each
4911 * band.
4912 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004913 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004914 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4915 * The specific geography and calibration information for that channel
4916 * is contained in the eeprom map itself.
4917 *
4918 * During init, we copy the eeprom information and channel map
4919 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4920 *
4921 * channel_map_24/52 provides the index in the channel_info array for a
4922 * given channel. We have to have two separate maps as there is channel
4923 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4924 * band_2
4925 *
4926 * A value of 0xff stored in the channel_map indicates that the channel
4927 * is not supported by the hardware at all.
4928 *
4929 * A value of 0xfe in the channel_map indicates that the channel is not
4930 * valid for Tx with the current hardware. This means that
4931 * while the system can tune and receive on a given channel, it may not
4932 * be able to associate or transmit any frames on that
4933 * channel. There is no corresponding channel information for that
4934 * entry.
4935 *
4936 *********************************************************************/
4937
4938/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004939static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004940 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4941};
4942
4943/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004944static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004945 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4946};
4947
Ben Cahill9fbab512007-11-29 11:09:47 +08004948static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004949 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4950};
4951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004952static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004953 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4954};
4955
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004956static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004957 145, 149, 153, 157, 161, 165
4958};
4959
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004960static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004961 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004962 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004963 **eeprom_ch_info,
4964 const u8 **eeprom_ch_index)
4965{
4966 switch (band) {
4967 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004968 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004969 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004970 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004971 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004972 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004973 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004974 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004975 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004976 break;
4977 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004978 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004979 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004980 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004981 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004982 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004983 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004984 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004985 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004986 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004987 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004988 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004989 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004990 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004991 break;
4992 default:
4993 BUG();
4994 return;
4995 }
4996}
4997
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004998/**
4999 * iwl3945_get_channel_info - Find driver's private channel info
5000 *
5001 * Based on band and channel number.
5002 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005003const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005004 int phymode, u16 channel)
5005{
5006 int i;
5007
5008 switch (phymode) {
5009 case MODE_IEEE80211A:
5010 for (i = 14; i < priv->channel_count; i++) {
5011 if (priv->channel_info[i].channel == channel)
5012 return &priv->channel_info[i];
5013 }
5014 break;
5015
5016 case MODE_IEEE80211B:
5017 case MODE_IEEE80211G:
5018 if (channel >= 1 && channel <= 14)
5019 return &priv->channel_info[channel - 1];
5020 break;
5021
5022 }
5023
5024 return NULL;
5025}
5026
5027#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5028 ? # x " " : "")
5029
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005030/**
5031 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5032 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005033static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005034{
5035 int eeprom_ch_count = 0;
5036 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005037 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07005038 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005039 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005040
5041 if (priv->channel_count) {
5042 IWL_DEBUG_INFO("Channel map already initialized.\n");
5043 return 0;
5044 }
5045
5046 if (priv->eeprom.version < 0x2f) {
5047 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5048 priv->eeprom.version);
5049 return -EINVAL;
5050 }
5051
5052 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5053
5054 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005055 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5056 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5057 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5058 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5059 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07005060
5061 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5062
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005063 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07005064 priv->channel_count, GFP_KERNEL);
5065 if (!priv->channel_info) {
5066 IWL_ERROR("Could not allocate channel_info\n");
5067 priv->channel_count = 0;
5068 return -ENOMEM;
5069 }
5070
5071 ch_info = priv->channel_info;
5072
5073 /* Loop through the 5 EEPROM bands adding them in order to the
5074 * channel map we maintain (that contains additional information than
5075 * what just in the EEPROM) */
5076 for (band = 1; band <= 5; band++) {
5077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005078 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07005079 &eeprom_ch_info, &eeprom_ch_index);
5080
5081 /* Loop through each band adding each of the channels */
5082 for (ch = 0; ch < eeprom_ch_count; ch++) {
5083 ch_info->channel = eeprom_ch_index[ch];
5084 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5085 MODE_IEEE80211A;
5086
5087 /* permanently store EEPROM's channel regulatory flags
5088 * and max power in channel info database. */
5089 ch_info->eeprom = eeprom_ch_info[ch];
5090
5091 /* Copy the run-time flags so they are there even on
5092 * invalid channels */
5093 ch_info->flags = eeprom_ch_info[ch].flags;
5094
5095 if (!(is_channel_valid(ch_info))) {
5096 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5097 "No traffic\n",
5098 ch_info->channel,
5099 ch_info->flags,
5100 is_channel_a_band(ch_info) ?
5101 "5.2" : "2.4");
5102 ch_info++;
5103 continue;
5104 }
5105
5106 /* Initialize regulatory-based run-time data */
5107 ch_info->max_power_avg = ch_info->curr_txpow =
5108 eeprom_ch_info[ch].max_power_avg;
5109 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5110 ch_info->min_power = 0;
5111
5112 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5113 " %ddBm): Ad-Hoc %ssupported\n",
5114 ch_info->channel,
5115 is_channel_a_band(ch_info) ?
5116 "5.2" : "2.4",
5117 CHECK_AND_PRINT(IBSS),
5118 CHECK_AND_PRINT(ACTIVE),
5119 CHECK_AND_PRINT(RADAR),
5120 CHECK_AND_PRINT(WIDE),
5121 CHECK_AND_PRINT(NARROW),
5122 CHECK_AND_PRINT(DFS),
5123 eeprom_ch_info[ch].flags,
5124 eeprom_ch_info[ch].max_power_avg,
5125 ((eeprom_ch_info[ch].
5126 flags & EEPROM_CHANNEL_IBSS)
5127 && !(eeprom_ch_info[ch].
5128 flags & EEPROM_CHANNEL_RADAR))
5129 ? "" : "not ");
5130
5131 /* Set the user_txpower_limit to the highest power
5132 * supported by any channel */
5133 if (eeprom_ch_info[ch].max_power_avg >
5134 priv->user_txpower_limit)
5135 priv->user_txpower_limit =
5136 eeprom_ch_info[ch].max_power_avg;
5137
5138 ch_info++;
5139 }
5140 }
5141
Cahill, Ben M6440adb2007-11-29 11:09:55 +08005142 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07005143 if (iwl3945_txpower_set_from_eeprom(priv))
5144 return -EIO;
5145
5146 return 0;
5147}
5148
5149/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5150 * sending probe req. This should be set long enough to hear probe responses
5151 * from more than one AP. */
5152#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5153#define IWL_ACTIVE_DWELL_TIME_52 (10)
5154
5155/* For faster active scanning, scan will move to the next channel if fewer than
5156 * PLCP_QUIET_THRESH packets are heard on this channel within
5157 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5158 * time if it's a quiet channel (nothing responded to our probe, and there's
5159 * no other traffic).
5160 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5161#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5162#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5163
5164/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5165 * Must be set longer than active dwell time.
5166 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5167#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5168#define IWL_PASSIVE_DWELL_TIME_52 (10)
5169#define IWL_PASSIVE_DWELL_BASE (100)
5170#define IWL_CHANNEL_TUNE_TIME 5
5171
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005172static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005173{
5174 if (phymode == MODE_IEEE80211A)
5175 return IWL_ACTIVE_DWELL_TIME_52;
5176 else
5177 return IWL_ACTIVE_DWELL_TIME_24;
5178}
5179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005180static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
Zhu Yib481de92007-09-25 17:54:57 -07005181{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005182 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005183 u16 passive = (phymode != MODE_IEEE80211A) ?
5184 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5185 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5186
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005187 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005188 /* If we're associated, we clamp the maximum passive
5189 * dwell time to be 98% of the beacon interval (minus
5190 * 2 * channel tune time) */
5191 passive = priv->beacon_int;
5192 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5193 passive = IWL_PASSIVE_DWELL_BASE;
5194 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5195 }
5196
5197 if (passive <= active)
5198 passive = active + 1;
5199
5200 return passive;
5201}
5202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005203static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
Zhu Yib481de92007-09-25 17:54:57 -07005204 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005205 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005206{
5207 const struct ieee80211_channel *channels = NULL;
5208 const struct ieee80211_hw_mode *hw_mode;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005209 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005210 u16 passive_dwell = 0;
5211 u16 active_dwell = 0;
5212 int added, i;
5213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005214 hw_mode = iwl3945_get_hw_mode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005215 if (!hw_mode)
5216 return 0;
5217
5218 channels = hw_mode->channels;
5219
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005220 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5221 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07005222
5223 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5224 if (channels[i].chan ==
5225 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005226 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005227 IWL_DEBUG_SCAN
5228 ("Skipping current channel %d\n",
5229 le16_to_cpu(priv->active_rxon.channel));
5230 continue;
5231 }
5232 } else if (priv->only_active_channel)
5233 continue;
5234
5235 scan_ch->channel = channels[i].chan;
5236
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005237 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005238 if (!is_channel_valid(ch_info)) {
5239 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5240 scan_ch->channel);
5241 continue;
5242 }
5243
5244 if (!is_active || is_channel_passive(ch_info) ||
5245 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5246 scan_ch->type = 0; /* passive */
5247 else
5248 scan_ch->type = 1; /* active */
5249
5250 if (scan_ch->type & 1)
5251 scan_ch->type |= (direct_mask << 1);
5252
5253 if (is_channel_narrow(ch_info))
5254 scan_ch->type |= (1 << 7);
5255
5256 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5257 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5258
Ben Cahill9fbab512007-11-29 11:09:47 +08005259 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005260 scan_ch->tpc.dsp_atten = 110;
5261 /* scan_pwr_info->tpc.dsp_atten; */
5262
5263 /*scan_pwr_info->tpc.tx_gain; */
5264 if (phymode == MODE_IEEE80211A)
5265 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5266 else {
5267 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5268 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005269 * power level:
5270 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005271 */
5272 }
5273
5274 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5275 scan_ch->channel,
5276 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5277 (scan_ch->type & 1) ?
5278 active_dwell : passive_dwell);
5279
5280 scan_ch++;
5281 added++;
5282 }
5283
5284 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5285 return added;
5286}
5287
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005288static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005289{
5290 int i, j;
5291 for (i = 0; i < 3; i++) {
5292 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5293 for (j = 0; j < hw_mode->num_channels; j++)
5294 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5295 }
5296}
5297
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005298static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005299 struct ieee80211_rate *rates)
5300{
5301 int i;
5302
5303 for (i = 0; i < IWL_RATE_COUNT; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005304 rates[i].rate = iwl3945_rates[i].ieee * 5;
Zhu Yib481de92007-09-25 17:54:57 -07005305 rates[i].val = i; /* Rate scaling will work on indexes */
5306 rates[i].val2 = i;
5307 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5308 /* Only OFDM have the bits-per-symbol set */
5309 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5310 rates[i].flags |= IEEE80211_RATE_OFDM;
5311 else {
5312 /*
5313 * If CCK 1M then set rate flag to CCK else CCK_2
5314 * which is CCK | PREAMBLE2
5315 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005316 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Zhu Yib481de92007-09-25 17:54:57 -07005317 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5318 }
5319
5320 /* Set up which ones are basic rates... */
5321 if (IWL_BASIC_RATES_MASK & (1 << i))
5322 rates[i].flags |= IEEE80211_RATE_BASIC;
5323 }
5324}
5325
5326/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005327 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005328 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005329static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005330{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005331 struct iwl3945_channel_info *ch;
Zhu Yib481de92007-09-25 17:54:57 -07005332 struct ieee80211_hw_mode *modes;
5333 struct ieee80211_channel *channels;
5334 struct ieee80211_channel *geo_ch;
5335 struct ieee80211_rate *rates;
5336 int i = 0;
5337 enum {
5338 A = 0,
5339 B = 1,
5340 G = 2,
5341 };
5342 int mode_count = 3;
5343
5344 if (priv->modes) {
5345 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5346 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5347 return 0;
5348 }
5349
5350 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5351 GFP_KERNEL);
5352 if (!modes)
5353 return -ENOMEM;
5354
5355 channels = kzalloc(sizeof(struct ieee80211_channel) *
5356 priv->channel_count, GFP_KERNEL);
5357 if (!channels) {
5358 kfree(modes);
5359 return -ENOMEM;
5360 }
5361
5362 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5363 GFP_KERNEL);
5364 if (!rates) {
5365 kfree(modes);
5366 kfree(channels);
5367 return -ENOMEM;
5368 }
5369
5370 /* 0 = 802.11a
5371 * 1 = 802.11b
5372 * 2 = 802.11g
5373 */
5374
5375 /* 5.2GHz channels start after the 2.4GHz channels */
5376 modes[A].mode = MODE_IEEE80211A;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005377 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
Mohamed Abbas14577f22007-11-12 11:37:42 +08005378 modes[A].rates = &rates[4];
Zhu Yib481de92007-09-25 17:54:57 -07005379 modes[A].num_rates = 8; /* just OFDM */
5380 modes[A].num_channels = 0;
5381
5382 modes[B].mode = MODE_IEEE80211B;
5383 modes[B].channels = channels;
Mohamed Abbas14577f22007-11-12 11:37:42 +08005384 modes[B].rates = rates;
Zhu Yib481de92007-09-25 17:54:57 -07005385 modes[B].num_rates = 4; /* just CCK */
5386 modes[B].num_channels = 0;
5387
5388 modes[G].mode = MODE_IEEE80211G;
5389 modes[G].channels = channels;
5390 modes[G].rates = rates;
5391 modes[G].num_rates = 12; /* OFDM & CCK */
5392 modes[G].num_channels = 0;
5393
5394 priv->ieee_channels = channels;
5395 priv->ieee_rates = rates;
5396
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005397 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005398
5399 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5400 ch = &priv->channel_info[i];
5401
5402 if (!is_channel_valid(ch)) {
5403 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5404 "skipping.\n",
5405 ch->channel, is_channel_a_band(ch) ?
5406 "5.2" : "2.4");
5407 continue;
5408 }
5409
5410 if (is_channel_a_band(ch))
5411 geo_ch = &modes[A].channels[modes[A].num_channels++];
5412 else {
5413 geo_ch = &modes[B].channels[modes[B].num_channels++];
5414 modes[G].num_channels++;
5415 }
5416
5417 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5418 geo_ch->chan = ch->channel;
5419 geo_ch->power_level = ch->max_power_avg;
5420 geo_ch->antenna_max = 0xff;
5421
5422 if (is_channel_valid(ch)) {
5423 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5424 if (ch->flags & EEPROM_CHANNEL_IBSS)
5425 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5426
5427 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5428 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5429
5430 if (ch->flags & EEPROM_CHANNEL_RADAR)
5431 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5432
5433 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5434 priv->max_channel_txpower_limit =
5435 ch->max_power_avg;
5436 }
5437
5438 geo_ch->val = geo_ch->flag;
5439 }
5440
5441 if ((modes[A].num_channels == 0) && priv->is_abg) {
5442 printk(KERN_INFO DRV_NAME
5443 ": Incorrectly detected BG card as ABG. Please send "
5444 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5445 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5446 priv->is_abg = 0;
5447 }
5448
5449 printk(KERN_INFO DRV_NAME
5450 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5451 modes[G].num_channels, modes[A].num_channels);
5452
5453 /*
5454 * NOTE: We register these in preference of order -- the
5455 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5456 * a phymode based on rates or AP capabilities but seems to
5457 * configure it purely on if the channel being configured
5458 * is supported by a mode -- and the first match is taken
5459 */
5460
5461 if (modes[G].num_channels)
5462 ieee80211_register_hwmode(priv->hw, &modes[G]);
5463 if (modes[B].num_channels)
5464 ieee80211_register_hwmode(priv->hw, &modes[B]);
5465 if (modes[A].num_channels)
5466 ieee80211_register_hwmode(priv->hw, &modes[A]);
5467
5468 priv->modes = modes;
5469 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5470
5471 return 0;
5472}
5473
5474/******************************************************************************
5475 *
5476 * uCode download functions
5477 *
5478 ******************************************************************************/
5479
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005480static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005481{
Tomas Winkler98c92212008-01-14 17:46:20 -08005482 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5483 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5484 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5485 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5486 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5487 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005488}
5489
5490/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005491 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005492 * looking at all data.
5493 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005494static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005495{
5496 u32 val;
5497 u32 save_len = len;
5498 int rc = 0;
5499 u32 errcnt;
5500
5501 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5502
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005503 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005504 if (rc)
5505 return rc;
5506
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005507 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005508
5509 errcnt = 0;
5510 for (; len > 0; len -= sizeof(u32), image++) {
5511 /* read data comes through single port, auto-incr addr */
5512 /* NOTE: Use the debugless read so we don't flood kernel log
5513 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005514 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005515 if (val != le32_to_cpu(*image)) {
5516 IWL_ERROR("uCode INST section is invalid at "
5517 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5518 save_len - len, val, le32_to_cpu(*image));
5519 rc = -EIO;
5520 errcnt++;
5521 if (errcnt >= 20)
5522 break;
5523 }
5524 }
5525
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005526 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005527
5528 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005529 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005530
5531 return rc;
5532}
5533
5534
5535/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005536 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005537 * using sample data 100 bytes apart. If these sample points are good,
5538 * it's a pretty good bet that everything between them is good, too.
5539 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005540static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005541{
5542 u32 val;
5543 int rc = 0;
5544 u32 errcnt = 0;
5545 u32 i;
5546
5547 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5548
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005549 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005550 if (rc)
5551 return rc;
5552
5553 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5554 /* read data comes through single port, auto-incr addr */
5555 /* NOTE: Use the debugless read so we don't flood kernel log
5556 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005557 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005558 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005559 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005560 if (val != le32_to_cpu(*image)) {
5561#if 0 /* Enable this if you want to see details */
5562 IWL_ERROR("uCode INST section is invalid at "
5563 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5564 i, val, *image);
5565#endif
5566 rc = -EIO;
5567 errcnt++;
5568 if (errcnt >= 3)
5569 break;
5570 }
5571 }
5572
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005573 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005574
5575 return rc;
5576}
5577
5578
5579/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005580 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005581 * and verify its contents
5582 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005583static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005584{
5585 __le32 *image;
5586 u32 len;
5587 int rc = 0;
5588
5589 /* Try bootstrap */
5590 image = (__le32 *)priv->ucode_boot.v_addr;
5591 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005592 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005593 if (rc == 0) {
5594 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5595 return 0;
5596 }
5597
5598 /* Try initialize */
5599 image = (__le32 *)priv->ucode_init.v_addr;
5600 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005601 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005602 if (rc == 0) {
5603 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5604 return 0;
5605 }
5606
5607 /* Try runtime/protocol */
5608 image = (__le32 *)priv->ucode_code.v_addr;
5609 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005610 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005611 if (rc == 0) {
5612 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5613 return 0;
5614 }
5615
5616 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5617
Ben Cahill9fbab512007-11-29 11:09:47 +08005618 /* Since nothing seems to match, show first several data entries in
5619 * instruction SRAM, so maybe visual inspection will give a clue.
5620 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005621 image = (__le32 *)priv->ucode_boot.v_addr;
5622 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005623 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005624
5625 return rc;
5626}
5627
5628
5629/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005630static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005631{
5632 __le32 *image = priv->ucode_boot.v_addr;
5633 u32 len = priv->ucode_boot.len;
5634 u32 reg;
5635 u32 val;
5636
5637 IWL_DEBUG_INFO("Begin verify bsm\n");
5638
5639 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005640 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005641 for (reg = BSM_SRAM_LOWER_BOUND;
5642 reg < BSM_SRAM_LOWER_BOUND + len;
5643 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005644 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005645 if (val != le32_to_cpu(*image)) {
5646 IWL_ERROR("BSM uCode verification failed at "
5647 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5648 BSM_SRAM_LOWER_BOUND,
5649 reg - BSM_SRAM_LOWER_BOUND, len,
5650 val, le32_to_cpu(*image));
5651 return -EIO;
5652 }
5653 }
5654
5655 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5656
5657 return 0;
5658}
5659
5660/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005661 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005662 *
5663 * BSM operation:
5664 *
5665 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5666 * in special SRAM that does not power down during RFKILL. When powering back
5667 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5668 * the bootstrap program into the on-board processor, and starts it.
5669 *
5670 * The bootstrap program loads (via DMA) instructions and data for a new
5671 * program from host DRAM locations indicated by the host driver in the
5672 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5673 * automatically.
5674 *
5675 * When initializing the NIC, the host driver points the BSM to the
5676 * "initialize" uCode image. This uCode sets up some internal data, then
5677 * notifies host via "initialize alive" that it is complete.
5678 *
5679 * The host then replaces the BSM_DRAM_* pointer values to point to the
5680 * normal runtime uCode instructions and a backup uCode data cache buffer
5681 * (filled initially with starting data values for the on-board processor),
5682 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5683 * which begins normal operation.
5684 *
5685 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5686 * the backup data cache in DRAM before SRAM is powered down.
5687 *
5688 * When powering back up, the BSM loads the bootstrap program. This reloads
5689 * the runtime uCode instructions and the backup data cache into SRAM,
5690 * and re-launches the runtime uCode from where it left off.
5691 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005692static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005693{
5694 __le32 *image = priv->ucode_boot.v_addr;
5695 u32 len = priv->ucode_boot.len;
5696 dma_addr_t pinst;
5697 dma_addr_t pdata;
5698 u32 inst_len;
5699 u32 data_len;
5700 int rc;
5701 int i;
5702 u32 done;
5703 u32 reg_offset;
5704
5705 IWL_DEBUG_INFO("Begin load bsm\n");
5706
5707 /* make sure bootstrap program is no larger than BSM's SRAM size */
5708 if (len > IWL_MAX_BSM_SIZE)
5709 return -EINVAL;
5710
5711 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005712 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005713 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005714 * after the "initialize" uCode has run, to point to
5715 * runtime/protocol instructions and backup data cache. */
5716 pinst = priv->ucode_init.p_addr;
5717 pdata = priv->ucode_init_data.p_addr;
5718 inst_len = priv->ucode_init.len;
5719 data_len = priv->ucode_init_data.len;
5720
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005721 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005722 if (rc)
5723 return rc;
5724
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005725 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5726 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5727 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5728 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005729
5730 /* Fill BSM memory with bootstrap instructions */
5731 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5732 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5733 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005734 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005735 le32_to_cpu(*image));
5736
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005737 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005738 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005739 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005740 return rc;
5741 }
5742
5743 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005744 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5745 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005746 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005747 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005748
5749 /* Load bootstrap code into instruction SRAM now,
5750 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005751 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005752 BSM_WR_CTRL_REG_BIT_START);
5753
5754 /* Wait for load of bootstrap uCode to finish */
5755 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005756 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005757 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5758 break;
5759 udelay(10);
5760 }
5761 if (i < 100)
5762 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5763 else {
5764 IWL_ERROR("BSM write did not complete!\n");
5765 return -EIO;
5766 }
5767
5768 /* Enable future boot loads whenever power management unit triggers it
5769 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005770 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005771 BSM_WR_CTRL_REG_BIT_START_EN);
5772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005773 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005774
5775 return 0;
5776}
5777
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005778static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005779{
5780 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005781 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005782}
5783
5784/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005785 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005786 *
5787 * Copy into buffers for card to fetch via bus-mastering
5788 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005789static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005790{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005791 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005792 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005793 const struct firmware *ucode_raw;
5794 /* firmware file name contains uCode/driver compatibility version */
5795 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5796 u8 *src;
5797 size_t len;
5798 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5799
5800 /* Ask kernel firmware_class module to get the boot firmware off disk.
5801 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005802 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5803 if (ret < 0) {
5804 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5805 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005806 goto error;
5807 }
5808
5809 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5810 name, ucode_raw->size);
5811
5812 /* Make sure that we got at least our header! */
5813 if (ucode_raw->size < sizeof(*ucode)) {
5814 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005815 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005816 goto err_release;
5817 }
5818
5819 /* Data from ucode file: header followed by uCode images */
5820 ucode = (void *)ucode_raw->data;
5821
5822 ver = le32_to_cpu(ucode->ver);
5823 inst_size = le32_to_cpu(ucode->inst_size);
5824 data_size = le32_to_cpu(ucode->data_size);
5825 init_size = le32_to_cpu(ucode->init_size);
5826 init_data_size = le32_to_cpu(ucode->init_data_size);
5827 boot_size = le32_to_cpu(ucode->boot_size);
5828
5829 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005830 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5831 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5832 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5833 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5834 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005835
5836 /* Verify size of file vs. image size info in file's header */
5837 if (ucode_raw->size < sizeof(*ucode) +
5838 inst_size + data_size + init_size +
5839 init_data_size + boot_size) {
5840
5841 IWL_DEBUG_INFO("uCode file size %d too small\n",
5842 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005843 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005844 goto err_release;
5845 }
5846
5847 /* Verify that uCode images will fit in card's SRAM */
5848 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005849 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5850 inst_size);
5851 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005852 goto err_release;
5853 }
5854
5855 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005856 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5857 data_size);
5858 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005859 goto err_release;
5860 }
5861 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005862 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5863 init_size);
5864 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005865 goto err_release;
5866 }
5867 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005868 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5869 init_data_size);
5870 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005871 goto err_release;
5872 }
5873 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005874 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5875 boot_size);
5876 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005877 goto err_release;
5878 }
5879
5880 /* Allocate ucode buffers for card's bus-master loading ... */
5881
5882 /* Runtime instructions and 2 copies of data:
5883 * 1) unmodified from disk
5884 * 2) backup cache for save/restore during power-downs */
5885 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005886 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005887
5888 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005889 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005890
5891 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005892 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005893
5894 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005895 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005896 goto err_pci_alloc;
5897
Tomas Winkler90e759d2007-11-29 11:09:41 +08005898 /* Initialization instructions and data */
5899 if (init_size && init_data_size) {
5900 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005901 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005902
5903 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005904 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005905
5906 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5907 goto err_pci_alloc;
5908 }
5909
5910 /* Bootstrap (instructions only, no data) */
5911 if (boot_size) {
5912 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005913 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005914
5915 if (!priv->ucode_boot.v_addr)
5916 goto err_pci_alloc;
5917 }
5918
Zhu Yib481de92007-09-25 17:54:57 -07005919 /* Copy images into buffers for card's bus-master reads ... */
5920
5921 /* Runtime instructions (first block of data in file) */
5922 src = &ucode->data[0];
5923 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005924 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005925 memcpy(priv->ucode_code.v_addr, src, len);
5926 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5927 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5928
5929 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005930 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005931 src = &ucode->data[inst_size];
5932 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005933 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005934 memcpy(priv->ucode_data.v_addr, src, len);
5935 memcpy(priv->ucode_data_backup.v_addr, src, len);
5936
5937 /* Initialization instructions (3rd block) */
5938 if (init_size) {
5939 src = &ucode->data[inst_size + data_size];
5940 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005941 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5942 len);
Zhu Yib481de92007-09-25 17:54:57 -07005943 memcpy(priv->ucode_init.v_addr, src, len);
5944 }
5945
5946 /* Initialization data (4th block) */
5947 if (init_data_size) {
5948 src = &ucode->data[inst_size + data_size + init_size];
5949 len = priv->ucode_init_data.len;
5950 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5951 (int)len);
5952 memcpy(priv->ucode_init_data.v_addr, src, len);
5953 }
5954
5955 /* Bootstrap instructions (5th block) */
5956 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5957 len = priv->ucode_boot.len;
5958 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5959 (int)len);
5960 memcpy(priv->ucode_boot.v_addr, src, len);
5961
5962 /* We have our copies now, allow OS release its copies */
5963 release_firmware(ucode_raw);
5964 return 0;
5965
5966 err_pci_alloc:
5967 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005968 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005969 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005970
5971 err_release:
5972 release_firmware(ucode_raw);
5973
5974 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005975 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005976}
5977
5978
5979/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005980 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005981 *
5982 * Tell initialization uCode where to find runtime uCode.
5983 *
5984 * BSM registers initially contain pointers to initialization uCode.
5985 * We need to replace them to load runtime uCode inst and data,
5986 * and to save runtime data when powering down.
5987 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005988static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005989{
5990 dma_addr_t pinst;
5991 dma_addr_t pdata;
5992 int rc = 0;
5993 unsigned long flags;
5994
5995 /* bits 31:0 for 3945 */
5996 pinst = priv->ucode_code.p_addr;
5997 pdata = priv->ucode_data_backup.p_addr;
5998
5999 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006000 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006001 if (rc) {
6002 spin_unlock_irqrestore(&priv->lock, flags);
6003 return rc;
6004 }
6005
6006 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006007 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6008 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6009 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006010 priv->ucode_data.len);
6011
6012 /* Inst bytecount must be last to set up, bit 31 signals uCode
6013 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006014 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006015 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6016
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006017 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006018
6019 spin_unlock_irqrestore(&priv->lock, flags);
6020
6021 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6022
6023 return rc;
6024}
6025
6026/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006027 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006028 *
6029 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6030 *
Zhu Yib481de92007-09-25 17:54:57 -07006031 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08006032 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006033static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006034{
6035 /* Check alive response for "valid" sign from uCode */
6036 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6037 /* We had an error bringing up the hardware, so take it
6038 * all the way back down so we can try again */
6039 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6040 goto restart;
6041 }
6042
6043 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6044 * This is a paranoid check, because we would not have gotten the
6045 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006046 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006047 /* Runtime instruction load was bad;
6048 * take it all the way back down so we can try again */
6049 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6050 goto restart;
6051 }
6052
6053 /* Send pointers to protocol/runtime uCode image ... init code will
6054 * load and launch runtime uCode, which will send us another "Alive"
6055 * notification. */
6056 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006057 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006058 /* Runtime instruction load won't happen;
6059 * take it all the way back down so we can try again */
6060 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6061 goto restart;
6062 }
6063 return;
6064
6065 restart:
6066 queue_work(priv->workqueue, &priv->restart);
6067}
6068
6069
6070/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006071 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07006072 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006073 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07006074 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006075static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006076{
6077 int rc = 0;
6078 int thermal_spin = 0;
6079 u32 rfkill;
6080
6081 IWL_DEBUG_INFO("Runtime Alive received.\n");
6082
6083 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6084 /* We had an error bringing up the hardware, so take it
6085 * all the way back down so we can try again */
6086 IWL_DEBUG_INFO("Alive failed.\n");
6087 goto restart;
6088 }
6089
6090 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6091 * This is a paranoid check, because we would not have gotten the
6092 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006093 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006094 /* Runtime instruction load was bad;
6095 * take it all the way back down so we can try again */
6096 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6097 goto restart;
6098 }
6099
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006100 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006101
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006102 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006103 if (rc) {
6104 IWL_WARNING("Can not read rfkill status from adapter\n");
6105 return;
6106 }
6107
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006108 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07006109 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006110 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006111
6112 if (rfkill & 0x1) {
6113 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6114 /* if rfkill is not on, then wait for thermal
6115 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006116 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07006117 thermal_spin++;
6118 udelay(10);
6119 }
6120
6121 if (thermal_spin)
6122 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6123 thermal_spin * 10);
6124 } else
6125 set_bit(STATUS_RF_KILL_HW, &priv->status);
6126
Ben Cahill9fbab512007-11-29 11:09:47 +08006127 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07006128 set_bit(STATUS_ALIVE, &priv->status);
6129
6130 /* Clear out the uCode error bit if it is set */
6131 clear_bit(STATUS_FW_ERROR, &priv->status);
6132
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006133 rc = iwl3945_init_channel_map(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006134 if (rc) {
6135 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6136 return;
6137 }
6138
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006139 iwl3945_init_geos(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006140 iwl3945_reset_channel_flag(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006141
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006142 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006143 return;
6144
Zhu Yi5a66926a2008-01-14 17:46:18 -08006145 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07006146
6147 priv->active_rate = priv->rates_mask;
6148 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006150 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07006151
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006152 if (iwl3945_is_associated(priv)) {
6153 struct iwl3945_rxon_cmd *active_rxon =
6154 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07006155
6156 memcpy(&priv->staging_rxon, &priv->active_rxon,
6157 sizeof(priv->staging_rxon));
6158 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6159 } else {
6160 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006161 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006162 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6163 }
6164
Ben Cahill9fbab512007-11-29 11:09:47 +08006165 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006166 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006167
6168 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006169 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006170
6171 /* At this point, the NIC is initialized and operational */
6172 priv->notif_missed_beacons = 0;
6173 set_bit(STATUS_READY, &priv->status);
6174
6175 iwl3945_reg_txpower_periodic(priv);
6176
6177 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a66926a2008-01-14 17:46:18 -08006178 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07006179
6180 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006181 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006182
6183 return;
6184
6185 restart:
6186 queue_work(priv->workqueue, &priv->restart);
6187}
6188
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006189static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07006190
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006191static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006192{
6193 unsigned long flags;
6194 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6195 struct ieee80211_conf *conf = NULL;
6196
6197 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6198
6199 conf = ieee80211_get_hw_conf(priv->hw);
6200
6201 if (!exit_pending)
6202 set_bit(STATUS_EXIT_PENDING, &priv->status);
6203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006204 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006205
6206 /* Unblock any waiting calls */
6207 wake_up_interruptible_all(&priv->wait_command_queue);
6208
Zhu Yib481de92007-09-25 17:54:57 -07006209 /* Wipe out the EXIT_PENDING status bit if we are not actually
6210 * exiting the module */
6211 if (!exit_pending)
6212 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6213
6214 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006215 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006216
6217 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006218 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006219
6220 if (priv->mac80211_registered)
6221 ieee80211_stop_queues(priv->hw);
6222
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006223 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006224 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006225 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006226 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6227 STATUS_RF_KILL_HW |
6228 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6229 STATUS_RF_KILL_SW |
6230 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6231 STATUS_IN_SUSPEND;
6232 goto exit;
6233 }
6234
6235 /* ...otherwise clear out all the status bits but the RF Kill and
6236 * SUSPEND bits and continue taking the NIC down. */
6237 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6238 STATUS_RF_KILL_HW |
6239 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6240 STATUS_RF_KILL_SW |
6241 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6242 STATUS_IN_SUSPEND |
6243 test_bit(STATUS_FW_ERROR, &priv->status) <<
6244 STATUS_FW_ERROR;
6245
6246 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006247 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006248 spin_unlock_irqrestore(&priv->lock, flags);
6249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006250 iwl3945_hw_txq_ctx_stop(priv);
6251 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006252
6253 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006254 if (!iwl3945_grab_nic_access(priv)) {
6255 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006256 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006257 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006258 }
6259 spin_unlock_irqrestore(&priv->lock, flags);
6260
6261 udelay(5);
6262
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006263 iwl3945_hw_nic_stop_master(priv);
6264 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6265 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006266
6267 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006268 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006269
6270 if (priv->ibss_beacon)
6271 dev_kfree_skb(priv->ibss_beacon);
6272 priv->ibss_beacon = NULL;
6273
6274 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006275 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006276}
6277
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006278static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006279{
6280 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006281 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006282 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006283
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006284 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006285}
6286
6287#define MAX_HW_RESTARTS 5
6288
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006289static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006290{
6291 int rc, i;
6292
6293 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6294 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6295 return -EIO;
6296 }
6297
6298 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6299 IWL_WARNING("Radio disabled by SW RF kill (module "
6300 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08006301 return -ENODEV;
6302 }
6303
6304 /* If platform's RF_KILL switch is NOT set to KILL */
6305 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6306 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6307 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6308 else {
6309 set_bit(STATUS_RF_KILL_HW, &priv->status);
6310 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6311 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6312 return -ENODEV;
6313 }
Zhu Yib481de92007-09-25 17:54:57 -07006314 }
6315
Reinette Chatrea781cf92008-01-21 10:08:31 -08006316 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6317 IWL_ERROR("ucode not available for device bringup\n");
6318 return -EIO;
6319 }
6320
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006321 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006322
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006323 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006324 if (rc) {
6325 IWL_ERROR("Unable to int nic\n");
6326 return rc;
6327 }
6328
6329 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006330 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6331 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006332 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6333
6334 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006335 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6336 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006337
6338 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006339 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6340 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006341
6342 /* Copy original ucode data image from disk into backup cache.
6343 * This will be used to initialize the on-board processor's
6344 * data SRAM for a clean start when the runtime program first loads. */
6345 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a66926a2008-01-14 17:46:18 -08006346 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006347
Zhu Yie655b9f2008-01-24 02:19:38 -08006348 /* We return success when we resume from suspend and rf_kill is on. */
6349 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6350 return 0;
6351
Zhu Yib481de92007-09-25 17:54:57 -07006352 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6353
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006354 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006355
6356 /* load bootstrap state machine,
6357 * load bootstrap program into processor's memory,
6358 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006359 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006360
6361 if (rc) {
6362 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6363 continue;
6364 }
6365
6366 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006367 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006368
Zhu Yib481de92007-09-25 17:54:57 -07006369 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6370
6371 return 0;
6372 }
6373
6374 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006375 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006376
6377 /* tried to restart and config the device for as long as our
6378 * patience could withstand */
6379 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6380 return -EIO;
6381}
6382
6383
6384/*****************************************************************************
6385 *
6386 * Workqueue callbacks
6387 *
6388 *****************************************************************************/
6389
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006390static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006391{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006392 struct iwl3945_priv *priv =
6393 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006394
6395 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6396 return;
6397
6398 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006399 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006400 mutex_unlock(&priv->mutex);
6401}
6402
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006403static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006404{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006405 struct iwl3945_priv *priv =
6406 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006407
6408 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6409 return;
6410
6411 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006412 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006413 mutex_unlock(&priv->mutex);
6414}
6415
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006416static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006417{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006418 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006419
6420 wake_up_interruptible(&priv->wait_command_queue);
6421
6422 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6423 return;
6424
6425 mutex_lock(&priv->mutex);
6426
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006427 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006428 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6429 "HW and/or SW RF Kill no longer active, restarting "
6430 "device\n");
6431 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6432 queue_work(priv->workqueue, &priv->restart);
6433 } else {
6434
6435 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6436 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6437 "disabled by SW switch\n");
6438 else
6439 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6440 "Kill switch must be turned off for "
6441 "wireless networking to work.\n");
6442 }
6443 mutex_unlock(&priv->mutex);
6444}
6445
6446#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6447
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006448static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006449{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006450 struct iwl3945_priv *priv =
6451 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006452
6453 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6454 return;
6455
6456 mutex_lock(&priv->mutex);
6457 if (test_bit(STATUS_SCANNING, &priv->status) ||
6458 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6459 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6460 "Scan completion watchdog resetting adapter (%dms)\n",
6461 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006462
Zhu Yib481de92007-09-25 17:54:57 -07006463 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006464 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006465 }
6466 mutex_unlock(&priv->mutex);
6467}
6468
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006469static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006470{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006471 struct iwl3945_priv *priv =
6472 container_of(data, struct iwl3945_priv, request_scan);
6473 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006474 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006475 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006476 .meta.flags = CMD_SIZE_HUGE,
6477 };
6478 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006479 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006480 struct ieee80211_conf *conf = NULL;
6481 u8 direct_mask;
6482 int phymode;
6483
6484 conf = ieee80211_get_hw_conf(priv->hw);
6485
6486 mutex_lock(&priv->mutex);
6487
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006488 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006489 IWL_WARNING("request scan called when driver not ready.\n");
6490 goto done;
6491 }
6492
6493 /* Make sure the scan wasn't cancelled before this queued work
6494 * was given the chance to run... */
6495 if (!test_bit(STATUS_SCANNING, &priv->status))
6496 goto done;
6497
6498 /* This should never be called or scheduled if there is currently
6499 * a scan active in the hardware. */
6500 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6501 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6502 "Ignoring second request.\n");
6503 rc = -EIO;
6504 goto done;
6505 }
6506
6507 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6508 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6509 goto done;
6510 }
6511
6512 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6513 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6514 goto done;
6515 }
6516
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006517 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006518 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6519 goto done;
6520 }
6521
6522 if (!test_bit(STATUS_READY, &priv->status)) {
6523 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6524 goto done;
6525 }
6526
6527 if (!priv->scan_bands) {
6528 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6529 goto done;
6530 }
6531
6532 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006533 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006534 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6535 if (!priv->scan) {
6536 rc = -ENOMEM;
6537 goto done;
6538 }
6539 }
6540 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006541 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006542
6543 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6544 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6545
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006546 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006547 u16 interval = 0;
6548 u32 extra;
6549 u32 suspend_time = 100;
6550 u32 scan_suspend_time = 100;
6551 unsigned long flags;
6552
6553 IWL_DEBUG_INFO("Scanning while associated...\n");
6554
6555 spin_lock_irqsave(&priv->lock, flags);
6556 interval = priv->beacon_int;
6557 spin_unlock_irqrestore(&priv->lock, flags);
6558
6559 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006560 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006561 if (!interval)
6562 interval = suspend_time;
6563 /*
6564 * suspend time format:
6565 * 0-19: beacon interval in usec (time before exec.)
6566 * 20-23: 0
6567 * 24-31: number of beacons (suspend between channels)
6568 */
6569
6570 extra = (suspend_time / interval) << 24;
6571 scan_suspend_time = 0xFF0FFFFF &
6572 (extra | ((suspend_time % interval) * 1024));
6573
6574 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6575 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6576 scan_suspend_time, interval);
6577 }
6578
6579 /* We should add the ability for user to lock to PASSIVE ONLY */
6580 if (priv->one_direct_scan) {
6581 IWL_DEBUG_SCAN
6582 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006583 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006584 priv->direct_ssid_len));
6585 scan->direct_scan[0].id = WLAN_EID_SSID;
6586 scan->direct_scan[0].len = priv->direct_ssid_len;
6587 memcpy(scan->direct_scan[0].ssid,
6588 priv->direct_ssid, priv->direct_ssid_len);
6589 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006590 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006591 scan->direct_scan[0].id = WLAN_EID_SSID;
6592 scan->direct_scan[0].len = priv->essid_len;
6593 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6594 direct_mask = 1;
6595 } else
6596 direct_mask = 0;
6597
6598 /* We don't build a direct scan probe request; the uCode will do
6599 * that based on the direct_mask added to each channel entry */
6600 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006601 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Zhu Yib481de92007-09-25 17:54:57 -07006602 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
6603 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6604 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6605 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6606
6607 /* flags + rate selection */
6608
6609 switch (priv->scan_bands) {
6610 case 2:
6611 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6612 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6613 scan->good_CRC_th = 0;
6614 phymode = MODE_IEEE80211G;
6615 break;
6616
6617 case 1:
6618 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6619 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6620 phymode = MODE_IEEE80211A;
6621 break;
6622
6623 default:
6624 IWL_WARNING("Invalid scan band count\n");
6625 goto done;
6626 }
6627
6628 /* select Rx antennas */
6629 scan->flags |= iwl3945_get_antenna_flags(priv);
6630
6631 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6632 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6633
6634 if (direct_mask)
6635 IWL_DEBUG_SCAN
6636 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006637 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006638 else
6639 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6640
6641 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006642 iwl3945_get_channels_for_scan(
Zhu Yib481de92007-09-25 17:54:57 -07006643 priv, phymode, 1, /* active */
6644 direct_mask,
6645 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6646
6647 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006648 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006649 cmd.data = scan;
6650 scan->len = cpu_to_le16(cmd.len);
6651
6652 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006653 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006654 if (rc)
6655 goto done;
6656
6657 queue_delayed_work(priv->workqueue, &priv->scan_check,
6658 IWL_SCAN_CHECK_WATCHDOG);
6659
6660 mutex_unlock(&priv->mutex);
6661 return;
6662
6663 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006664 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006665 queue_work(priv->workqueue, &priv->scan_completed);
6666 mutex_unlock(&priv->mutex);
6667}
6668
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006669static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006670{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006671 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006672
6673 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6674 return;
6675
6676 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006677 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006678 mutex_unlock(&priv->mutex);
6679}
6680
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006681static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006682{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006683 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006684
6685 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6686 return;
6687
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006688 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006689 queue_work(priv->workqueue, &priv->up);
6690}
6691
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006692static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006693{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006694 struct iwl3945_priv *priv =
6695 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006696
6697 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6698 return;
6699
6700 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006701 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006702 mutex_unlock(&priv->mutex);
6703}
6704
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006705#define IWL_DELAY_NEXT_SCAN (HZ*2)
6706
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006707static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006708{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006709 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006710 post_associate.work);
6711
6712 int rc = 0;
6713 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006714 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006715
6716 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6717 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6718 return;
6719 }
6720
6721
Joe Perches0795af52007-10-03 17:59:30 -07006722 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6723 priv->assoc_id,
6724 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006725
6726 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6727 return;
6728
6729 mutex_lock(&priv->mutex);
6730
Johannes Berg32bfd352007-12-19 01:31:26 +01006731 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006732 mutex_unlock(&priv->mutex);
6733 return;
6734 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006735 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006736
Zhu Yib481de92007-09-25 17:54:57 -07006737 conf = ieee80211_get_hw_conf(priv->hw);
6738
6739 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006740 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006742 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6743 iwl3945_setup_rxon_timing(priv);
6744 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006745 sizeof(priv->rxon_timing), &priv->rxon_timing);
6746 if (rc)
6747 IWL_WARNING("REPLY_RXON_TIMING failed - "
6748 "Attempting to continue.\n");
6749
6750 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6751
6752 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6753
6754 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6755 priv->assoc_id, priv->beacon_int);
6756
6757 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6758 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6759 else
6760 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6761
6762 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6763 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6764 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6765 else
6766 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6767
6768 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6769 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6770
6771 }
6772
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006773 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006774
6775 switch (priv->iw_mode) {
6776 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006777 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006778 break;
6779
6780 case IEEE80211_IF_TYPE_IBSS:
6781
6782 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006783 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006784
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006785 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6786 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006787 iwl3945_sync_sta(priv, IWL_STA_ID,
6788 (priv->phymode == MODE_IEEE80211A)?
6789 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6790 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006791 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6792 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006793
6794 break;
6795
6796 default:
6797 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006798 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006799 break;
6800 }
6801
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006802 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006803
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006804#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006805 iwl3945_activate_qos(priv, 0);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08006806#endif /* CONFIG_IWL3945_QOS */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006807 /* we have just associated, don't start scan too early */
6808 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006809 mutex_unlock(&priv->mutex);
6810}
6811
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006812static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006813{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006814 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006815
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006816 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006817 return;
6818
6819 mutex_lock(&priv->mutex);
6820
6821 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006822 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006823
6824 mutex_unlock(&priv->mutex);
6825}
6826
Zhu Yi76bb77e2007-11-22 10:53:22 +08006827static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006829static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006830{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006831 struct iwl3945_priv *priv =
6832 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006833
6834 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6835
6836 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6837 return;
6838
Zhu Yia0646472007-12-20 14:10:01 +08006839 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6840 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006841
Zhu Yib481de92007-09-25 17:54:57 -07006842 ieee80211_scan_completed(priv->hw);
6843
6844 /* Since setting the TXPOWER may have been deferred while
6845 * performing the scan, fire one off */
6846 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006847 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006848 mutex_unlock(&priv->mutex);
6849}
6850
6851/*****************************************************************************
6852 *
6853 * mac80211 entry point functions
6854 *
6855 *****************************************************************************/
6856
Zhu Yi5a66926a2008-01-14 17:46:18 -08006857#define UCODE_READY_TIMEOUT (2 * HZ)
6858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006859static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006860{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006861 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006862 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006863
6864 IWL_DEBUG_MAC80211("enter\n");
6865
Zhu Yi5a66926a2008-01-14 17:46:18 -08006866 if (pci_enable_device(priv->pci_dev)) {
6867 IWL_ERROR("Fail to pci_enable_device\n");
6868 return -ENODEV;
6869 }
6870 pci_restore_state(priv->pci_dev);
6871 pci_enable_msi(priv->pci_dev);
6872
6873 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6874 DRV_NAME, priv);
6875 if (ret) {
6876 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6877 goto out_disable_msi;
6878 }
6879
Zhu Yib481de92007-09-25 17:54:57 -07006880 /* we should be verifying the device is ready to be opened */
6881 mutex_lock(&priv->mutex);
6882
Zhu Yi5a66926a2008-01-14 17:46:18 -08006883 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6884 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6885 * ucode filename and max sizes are card-specific. */
6886
6887 if (!priv->ucode_code.len) {
6888 ret = iwl3945_read_ucode(priv);
6889 if (ret) {
6890 IWL_ERROR("Could not read microcode: %d\n", ret);
6891 mutex_unlock(&priv->mutex);
6892 goto out_release_irq;
6893 }
6894 }
6895
Zhu Yie655b9f2008-01-24 02:19:38 -08006896 ret = __iwl3945_up(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006897
Zhu Yib481de92007-09-25 17:54:57 -07006898 mutex_unlock(&priv->mutex);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006899
Zhu Yie655b9f2008-01-24 02:19:38 -08006900 if (ret)
6901 goto out_release_irq;
6902
6903 IWL_DEBUG_INFO("Start UP work.\n");
6904
6905 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6906 return 0;
6907
Zhu Yi5a66926a2008-01-14 17:46:18 -08006908 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6909 * mac80211 will not be run successfully. */
6910 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6911 test_bit(STATUS_READY, &priv->status),
6912 UCODE_READY_TIMEOUT);
6913 if (!ret) {
6914 if (!test_bit(STATUS_READY, &priv->status)) {
6915 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6916 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6917 ret = -ETIMEDOUT;
6918 goto out_release_irq;
6919 }
6920 }
6921
Zhu Yie655b9f2008-01-24 02:19:38 -08006922 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006923 IWL_DEBUG_MAC80211("leave\n");
6924 return 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006925
6926out_release_irq:
6927 free_irq(priv->pci_dev->irq, priv);
6928out_disable_msi:
6929 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006930 pci_disable_device(priv->pci_dev);
6931 priv->is_open = 0;
6932 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a66926a2008-01-14 17:46:18 -08006933 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006934}
6935
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006936static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006937{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006938 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006939
6940 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006941
Zhu Yie655b9f2008-01-24 02:19:38 -08006942 if (!priv->is_open) {
6943 IWL_DEBUG_MAC80211("leave - skip\n");
6944 return;
6945 }
6946
Zhu Yib481de92007-09-25 17:54:57 -07006947 priv->is_open = 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006948
6949 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006950 /* stop mac, cancel any scan request and clear
6951 * RXON_FILTER_ASSOC_MSK BIT
6952 */
Zhu Yi5a66926a2008-01-14 17:46:18 -08006953 mutex_lock(&priv->mutex);
6954 iwl3945_scan_cancel_timeout(priv, 100);
6955 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006956 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006957 }
6958
Zhu Yi5a66926a2008-01-14 17:46:18 -08006959 iwl3945_down(priv);
6960
6961 flush_workqueue(priv->workqueue);
6962 free_irq(priv->pci_dev->irq, priv);
6963 pci_disable_msi(priv->pci_dev);
6964 pci_save_state(priv->pci_dev);
6965 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006966
Zhu Yib481de92007-09-25 17:54:57 -07006967 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006968}
6969
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006970static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006971 struct ieee80211_tx_control *ctl)
6972{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006973 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006974
6975 IWL_DEBUG_MAC80211("enter\n");
6976
6977 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6978 IWL_DEBUG_MAC80211("leave - monitor\n");
6979 return -1;
6980 }
6981
6982 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6983 ctl->tx_rate);
6984
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006985 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07006986 dev_kfree_skb_any(skb);
6987
6988 IWL_DEBUG_MAC80211("leave\n");
6989 return 0;
6990}
6991
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006992static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006993 struct ieee80211_if_init_conf *conf)
6994{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006995 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006996 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006997 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006998
Johannes Berg32bfd352007-12-19 01:31:26 +01006999 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007000
Johannes Berg32bfd352007-12-19 01:31:26 +01007001 if (priv->vif) {
7002 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02007003 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07007004 }
7005
7006 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01007007 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07007008
7009 spin_unlock_irqrestore(&priv->lock, flags);
7010
7011 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02007012
7013 if (conf->mac_addr) {
7014 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7015 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7016 }
7017
Zhu Yi5a66926a2008-01-14 17:46:18 -08007018 if (iwl3945_is_ready(priv))
7019 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07007020
Zhu Yib481de92007-09-25 17:54:57 -07007021 mutex_unlock(&priv->mutex);
7022
Zhu Yi5a66926a2008-01-14 17:46:18 -08007023 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007024 return 0;
7025}
7026
7027/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007028 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07007029 *
7030 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7031 * be set inappropriately and the driver currently sets the hardware up to
7032 * use it whenever needed.
7033 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007034static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07007035{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007036 struct iwl3945_priv *priv = hw->priv;
7037 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007038 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08007039 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007040
7041 mutex_lock(&priv->mutex);
7042 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7043
Zhu Yi12342c42007-12-20 11:27:32 +08007044 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007046 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007047 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007048 ret = -EIO;
7049 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007050 }
7051
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007052 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07007053 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08007054 IWL_DEBUG_MAC80211("leave - scanning\n");
7055 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07007056 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08007057 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007058 }
7059
7060 spin_lock_irqsave(&priv->lock, flags);
7061
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007062 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007063 if (!is_channel_valid(ch_info)) {
7064 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7065 conf->channel, conf->phymode);
7066 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7067 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007068 ret = -EINVAL;
7069 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007070 }
7071
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007072 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
Zhu Yib481de92007-09-25 17:54:57 -07007073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007074 iwl3945_set_flags_for_phymode(priv, conf->phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007075
7076 /* The list of supported rates and rate mask can be different
7077 * for each phymode; since the phymode may have changed, reset
7078 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007079 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007080
7081 spin_unlock_irqrestore(&priv->lock, flags);
7082
7083#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7084 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007085 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007086 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007087 }
7088#endif
7089
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007090 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07007091
7092 if (!conf->radio_enabled) {
7093 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007094 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007095 }
7096
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007097 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007098 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08007099 ret = -EIO;
7100 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07007101 }
7102
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007103 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007104
7105 if (memcmp(&priv->active_rxon,
7106 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007107 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007108 else
7109 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7110
7111 IWL_DEBUG_MAC80211("leave\n");
7112
Zhu Yi76bb77e2007-11-22 10:53:22 +08007113out:
Zhu Yia0646472007-12-20 14:10:01 +08007114 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07007115 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08007116 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07007117}
7118
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007119static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007120{
7121 int rc = 0;
7122
7123 if (priv->status & STATUS_EXIT_PENDING)
7124 return;
7125
7126 /* The following should be done only at AP bring up */
7127 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7128
7129 /* RXON - unassoc (to set timing command) */
7130 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007131 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007132
7133 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007134 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7135 iwl3945_setup_rxon_timing(priv);
7136 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07007137 sizeof(priv->rxon_timing), &priv->rxon_timing);
7138 if (rc)
7139 IWL_WARNING("REPLY_RXON_TIMING failed - "
7140 "Attempting to continue.\n");
7141
7142 /* FIXME: what should be the assoc_id for AP? */
7143 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7144 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7145 priv->staging_rxon.flags |=
7146 RXON_FLG_SHORT_PREAMBLE_MSK;
7147 else
7148 priv->staging_rxon.flags &=
7149 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7150
7151 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7152 if (priv->assoc_capability &
7153 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7154 priv->staging_rxon.flags |=
7155 RXON_FLG_SHORT_SLOT_MSK;
7156 else
7157 priv->staging_rxon.flags &=
7158 ~RXON_FLG_SHORT_SLOT_MSK;
7159
7160 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7161 priv->staging_rxon.flags &=
7162 ~RXON_FLG_SHORT_SLOT_MSK;
7163 }
7164 /* restore RXON assoc */
7165 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007166 iwl3945_commit_rxon(priv);
7167 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08007168 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007169 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007170
7171 /* FIXME - we need to add code here to detect a totally new
7172 * configuration, reset the AP, unassoc, rxon timing, assoc,
7173 * clear sta table, add BCAST sta... */
7174}
7175
Johannes Berg32bfd352007-12-19 01:31:26 +01007176static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7177 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07007178 struct ieee80211_if_conf *conf)
7179{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007180 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07007181 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007182 unsigned long flags;
7183 int rc;
7184
7185 if (conf == NULL)
7186 return -EIO;
7187
Johannes Berg4150c572007-09-17 01:29:23 -04007188 /* XXX: this MUST use conf->mac_addr */
7189
Zhu Yib481de92007-09-25 17:54:57 -07007190 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7191 (!conf->beacon || !conf->ssid_len)) {
7192 IWL_DEBUG_MAC80211
7193 ("Leaving in AP mode because HostAPD is not ready.\n");
7194 return 0;
7195 }
7196
Zhu Yi5a66926a2008-01-14 17:46:18 -08007197 if (!iwl3945_is_alive(priv))
7198 return -EAGAIN;
7199
Zhu Yib481de92007-09-25 17:54:57 -07007200 mutex_lock(&priv->mutex);
7201
Zhu Yib481de92007-09-25 17:54:57 -07007202 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007203 IWL_DEBUG_MAC80211("bssid: %s\n",
7204 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007205
Johannes Berg4150c572007-09-17 01:29:23 -04007206/*
7207 * very dubious code was here; the probe filtering flag is never set:
7208 *
Zhu Yib481de92007-09-25 17:54:57 -07007209 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7210 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007211 */
7212 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yib481de92007-09-25 17:54:57 -07007213 IWL_DEBUG_MAC80211("leave - scanning\n");
7214 mutex_unlock(&priv->mutex);
7215 return 0;
7216 }
7217
Johannes Berg32bfd352007-12-19 01:31:26 +01007218 if (priv->vif != vif) {
7219 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07007220 mutex_unlock(&priv->mutex);
7221 return 0;
7222 }
7223
7224 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7225 if (!conf->bssid) {
7226 conf->bssid = priv->mac_addr;
7227 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007228 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7229 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007230 }
7231 if (priv->ibss_beacon)
7232 dev_kfree_skb(priv->ibss_beacon);
7233
7234 priv->ibss_beacon = conf->beacon;
7235 }
7236
Mohamed Abbasfde35712007-11-29 11:10:15 +08007237 if (iwl3945_is_rfkill(priv))
7238 goto done;
7239
Zhu Yib481de92007-09-25 17:54:57 -07007240 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7241 !is_multicast_ether_addr(conf->bssid)) {
7242 /* If there is currently a HW scan going on in the background
7243 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007244 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007245 IWL_WARNING("Aborted scan still in progress "
7246 "after 100ms\n");
7247 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7248 mutex_unlock(&priv->mutex);
7249 return -EAGAIN;
7250 }
7251 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7252
7253 /* TODO: Audit driver for usage of these members and see
7254 * if mac80211 deprecates them (priv->bssid looks like it
7255 * shouldn't be there, but I haven't scanned the IBSS code
7256 * to verify) - jpk */
7257 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7258
7259 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007260 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007261 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007262 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007263 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007264 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08007265 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007266 }
7267
7268 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007269 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007270 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007271 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007272 }
7273
Mohamed Abbasfde35712007-11-29 11:10:15 +08007274 done:
Zhu Yib481de92007-09-25 17:54:57 -07007275 spin_lock_irqsave(&priv->lock, flags);
7276 if (!conf->ssid_len)
7277 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7278 else
7279 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7280
7281 priv->essid_len = conf->ssid_len;
7282 spin_unlock_irqrestore(&priv->lock, flags);
7283
7284 IWL_DEBUG_MAC80211("leave\n");
7285 mutex_unlock(&priv->mutex);
7286
7287 return 0;
7288}
7289
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007290static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007291 unsigned int changed_flags,
7292 unsigned int *total_flags,
7293 int mc_count, struct dev_addr_list *mc_list)
7294{
7295 /*
7296 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007297 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007298 */
7299 *total_flags = 0;
7300}
7301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007302static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007303 struct ieee80211_if_init_conf *conf)
7304{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007305 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007306
7307 IWL_DEBUG_MAC80211("enter\n");
7308
7309 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007310
Mohamed Abbasfde35712007-11-29 11:10:15 +08007311 if (iwl3945_is_ready_rf(priv)) {
7312 iwl3945_scan_cancel_timeout(priv, 100);
7313 cancel_delayed_work(&priv->post_associate);
7314 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7315 iwl3945_commit_rxon(priv);
7316 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007317 if (priv->vif == conf->vif) {
7318 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007319 memset(priv->bssid, 0, ETH_ALEN);
7320 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7321 priv->essid_len = 0;
7322 }
7323 mutex_unlock(&priv->mutex);
7324
7325 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007326}
7327
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007328static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007329{
7330 int rc = 0;
7331 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007332 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007333
7334 IWL_DEBUG_MAC80211("enter\n");
7335
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007336 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007337 spin_lock_irqsave(&priv->lock, flags);
7338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007339 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007340 rc = -EIO;
7341 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7342 goto out_unlock;
7343 }
7344
7345 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7346 rc = -EIO;
7347 IWL_ERROR("ERROR: APs don't scan\n");
7348 goto out_unlock;
7349 }
7350
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007351 /* we don't schedule scan within next_scan_jiffies period */
7352 if (priv->next_scan_jiffies &&
7353 time_after(priv->next_scan_jiffies, jiffies)) {
7354 rc = -EAGAIN;
7355 goto out_unlock;
7356 }
Zhu Yib481de92007-09-25 17:54:57 -07007357 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007358 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7359 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007360 rc = -EAGAIN;
7361 goto out_unlock;
7362 }
7363 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007364 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007365 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007366
7367 priv->one_direct_scan = 1;
7368 priv->direct_ssid_len = (u8)
7369 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7370 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007371 } else
7372 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007373
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007374 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007375
7376 IWL_DEBUG_MAC80211("leave\n");
7377
7378out_unlock:
7379 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007380 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007381
7382 return rc;
7383}
7384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007385static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007386 const u8 *local_addr, const u8 *addr,
7387 struct ieee80211_key_conf *key)
7388{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007389 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007390 int rc = 0;
7391 u8 sta_id;
7392
7393 IWL_DEBUG_MAC80211("enter\n");
7394
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007395 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007396 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7397 return -EOPNOTSUPP;
7398 }
7399
7400 if (is_zero_ether_addr(addr))
7401 /* only support pairwise keys */
7402 return -EOPNOTSUPP;
7403
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007404 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007405 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007406 DECLARE_MAC_BUF(mac);
7407
7408 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7409 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007410 return -EINVAL;
7411 }
7412
7413 mutex_lock(&priv->mutex);
7414
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007415 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007416
Zhu Yib481de92007-09-25 17:54:57 -07007417 switch (cmd) {
7418 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007419 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007420 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007421 iwl3945_set_rxon_hwcrypto(priv, 1);
7422 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007423 key->hw_key_idx = sta_id;
7424 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7425 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7426 }
7427 break;
7428 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007429 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007430 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007431 iwl3945_set_rxon_hwcrypto(priv, 0);
7432 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007433 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7434 }
7435 break;
7436 default:
7437 rc = -EINVAL;
7438 }
7439
7440 IWL_DEBUG_MAC80211("leave\n");
7441 mutex_unlock(&priv->mutex);
7442
7443 return rc;
7444}
7445
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007446static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007447 const struct ieee80211_tx_queue_params *params)
7448{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007449 struct iwl3945_priv *priv = hw->priv;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007450#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007451 unsigned long flags;
7452 int q;
Reinette Chatre0054b342007-11-29 11:09:42 +08007453#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007454
7455 IWL_DEBUG_MAC80211("enter\n");
7456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007457 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007458 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7459 return -EIO;
7460 }
7461
7462 if (queue >= AC_NUM) {
7463 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7464 return 0;
7465 }
7466
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007467#ifdef CONFIG_IWL3945_QOS
Zhu Yib481de92007-09-25 17:54:57 -07007468 if (!priv->qos_data.qos_enable) {
7469 priv->qos_data.qos_active = 0;
7470 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7471 return 0;
7472 }
7473 q = AC_NUM - 1 - queue;
7474
7475 spin_lock_irqsave(&priv->lock, flags);
7476
7477 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7478 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7479 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7480 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7481 cpu_to_le16((params->burst_time * 100));
7482
7483 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7484 priv->qos_data.qos_active = 1;
7485
7486 spin_unlock_irqrestore(&priv->lock, flags);
7487
7488 mutex_lock(&priv->mutex);
7489 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007490 iwl3945_activate_qos(priv, 1);
7491 else if (priv->assoc_id && iwl3945_is_associated(priv))
7492 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007493
7494 mutex_unlock(&priv->mutex);
7495
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007496#endif /*CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07007497
7498 IWL_DEBUG_MAC80211("leave\n");
7499 return 0;
7500}
7501
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007502static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007503 struct ieee80211_tx_queue_stats *stats)
7504{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007505 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007506 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007507 struct iwl3945_tx_queue *txq;
7508 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007509 unsigned long flags;
7510
7511 IWL_DEBUG_MAC80211("enter\n");
7512
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007513 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007514 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7515 return -EIO;
7516 }
7517
7518 spin_lock_irqsave(&priv->lock, flags);
7519
7520 for (i = 0; i < AC_NUM; i++) {
7521 txq = &priv->txq[i];
7522 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007523 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007524
7525 stats->data[i].len = q->n_window - avail;
7526 stats->data[i].limit = q->n_window - q->high_mark;
7527 stats->data[i].count = q->n_window;
7528
7529 }
7530 spin_unlock_irqrestore(&priv->lock, flags);
7531
7532 IWL_DEBUG_MAC80211("leave\n");
7533
7534 return 0;
7535}
7536
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007537static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007538 struct ieee80211_low_level_stats *stats)
7539{
7540 IWL_DEBUG_MAC80211("enter\n");
7541 IWL_DEBUG_MAC80211("leave\n");
7542
7543 return 0;
7544}
7545
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007546static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007547{
7548 IWL_DEBUG_MAC80211("enter\n");
7549 IWL_DEBUG_MAC80211("leave\n");
7550
7551 return 0;
7552}
7553
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007554static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007555{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007556 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007557 unsigned long flags;
7558
7559 mutex_lock(&priv->mutex);
7560 IWL_DEBUG_MAC80211("enter\n");
7561
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007562#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007563 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007564#endif
7565 cancel_delayed_work(&priv->post_associate);
7566
7567 spin_lock_irqsave(&priv->lock, flags);
7568 priv->assoc_id = 0;
7569 priv->assoc_capability = 0;
7570 priv->call_post_assoc_from_beacon = 0;
7571
7572 /* new association get rid of ibss beacon skb */
7573 if (priv->ibss_beacon)
7574 dev_kfree_skb(priv->ibss_beacon);
7575
7576 priv->ibss_beacon = NULL;
7577
7578 priv->beacon_int = priv->hw->conf.beacon_int;
7579 priv->timestamp1 = 0;
7580 priv->timestamp0 = 0;
7581 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7582 priv->beacon_int = 0;
7583
7584 spin_unlock_irqrestore(&priv->lock, flags);
7585
Mohamed Abbasfde35712007-11-29 11:10:15 +08007586 if (!iwl3945_is_ready_rf(priv)) {
7587 IWL_DEBUG_MAC80211("leave - not ready\n");
7588 mutex_unlock(&priv->mutex);
7589 return;
7590 }
7591
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007592 /* we are restarting association process
7593 * clear RXON_FILTER_ASSOC_MSK bit
7594 */
7595 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007596 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007597 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007598 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007599 }
7600
Zhu Yib481de92007-09-25 17:54:57 -07007601 /* Per mac80211.h: This is only used in IBSS mode... */
7602 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007603
Zhu Yib481de92007-09-25 17:54:57 -07007604 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7605 mutex_unlock(&priv->mutex);
7606 return;
7607 }
7608
Zhu Yib481de92007-09-25 17:54:57 -07007609 priv->only_active_channel = 0;
7610
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007611 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007612
7613 mutex_unlock(&priv->mutex);
7614
7615 IWL_DEBUG_MAC80211("leave\n");
7616
7617}
7618
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007619static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007620 struct ieee80211_tx_control *control)
7621{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007622 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007623 unsigned long flags;
7624
7625 mutex_lock(&priv->mutex);
7626 IWL_DEBUG_MAC80211("enter\n");
7627
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007628 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007629 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7630 mutex_unlock(&priv->mutex);
7631 return -EIO;
7632 }
7633
7634 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7635 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7636 mutex_unlock(&priv->mutex);
7637 return -EIO;
7638 }
7639
7640 spin_lock_irqsave(&priv->lock, flags);
7641
7642 if (priv->ibss_beacon)
7643 dev_kfree_skb(priv->ibss_beacon);
7644
7645 priv->ibss_beacon = skb;
7646
7647 priv->assoc_id = 0;
7648
7649 IWL_DEBUG_MAC80211("leave\n");
7650 spin_unlock_irqrestore(&priv->lock, flags);
7651
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007652#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007653 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007654#endif
7655
7656 queue_work(priv->workqueue, &priv->post_associate.work);
7657
7658 mutex_unlock(&priv->mutex);
7659
7660 return 0;
7661}
7662
7663/*****************************************************************************
7664 *
7665 * sysfs attributes
7666 *
7667 *****************************************************************************/
7668
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007669#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007670
7671/*
7672 * The following adds a new attribute to the sysfs representation
7673 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7674 * used for controlling the debug level.
7675 *
7676 * See the level definitions in iwl for details.
7677 */
7678
7679static ssize_t show_debug_level(struct device_driver *d, char *buf)
7680{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007681 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007682}
7683static ssize_t store_debug_level(struct device_driver *d,
7684 const char *buf, size_t count)
7685{
7686 char *p = (char *)buf;
7687 u32 val;
7688
7689 val = simple_strtoul(p, &p, 0);
7690 if (p == buf)
7691 printk(KERN_INFO DRV_NAME
7692 ": %s is not in hex or decimal form.\n", buf);
7693 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007694 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007695
7696 return strnlen(buf, count);
7697}
7698
7699static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7700 show_debug_level, store_debug_level);
7701
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007702#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007703
7704static ssize_t show_rf_kill(struct device *d,
7705 struct device_attribute *attr, char *buf)
7706{
7707 /*
7708 * 0 - RF kill not enabled
7709 * 1 - SW based RF kill active (sysfs)
7710 * 2 - HW based RF kill active
7711 * 3 - Both HW and SW based RF kill active
7712 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007713 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007714 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7715 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7716
7717 return sprintf(buf, "%i\n", val);
7718}
7719
7720static ssize_t store_rf_kill(struct device *d,
7721 struct device_attribute *attr,
7722 const char *buf, size_t count)
7723{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007724 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007725
7726 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007727 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007728 mutex_unlock(&priv->mutex);
7729
7730 return count;
7731}
7732
7733static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7734
7735static ssize_t show_temperature(struct device *d,
7736 struct device_attribute *attr, char *buf)
7737{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007738 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007739
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007740 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007741 return -EAGAIN;
7742
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007743 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007744}
7745
7746static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7747
7748static ssize_t show_rs_window(struct device *d,
7749 struct device_attribute *attr,
7750 char *buf)
7751{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007752 struct iwl3945_priv *priv = d->driver_data;
7753 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007754}
7755static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7756
7757static ssize_t show_tx_power(struct device *d,
7758 struct device_attribute *attr, char *buf)
7759{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007760 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007761 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7762}
7763
7764static ssize_t store_tx_power(struct device *d,
7765 struct device_attribute *attr,
7766 const char *buf, size_t count)
7767{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007768 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007769 char *p = (char *)buf;
7770 u32 val;
7771
7772 val = simple_strtoul(p, &p, 10);
7773 if (p == buf)
7774 printk(KERN_INFO DRV_NAME
7775 ": %s is not in decimal form.\n", buf);
7776 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007777 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007778
7779 return count;
7780}
7781
7782static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7783
7784static ssize_t show_flags(struct device *d,
7785 struct device_attribute *attr, char *buf)
7786{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007787 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007788
7789 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7790}
7791
7792static ssize_t store_flags(struct device *d,
7793 struct device_attribute *attr,
7794 const char *buf, size_t count)
7795{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007796 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007797 u32 flags = simple_strtoul(buf, NULL, 0);
7798
7799 mutex_lock(&priv->mutex);
7800 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7801 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007802 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007803 IWL_WARNING("Could not cancel scan.\n");
7804 else {
7805 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7806 flags);
7807 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007808 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007809 }
7810 }
7811 mutex_unlock(&priv->mutex);
7812
7813 return count;
7814}
7815
7816static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7817
7818static ssize_t show_filter_flags(struct device *d,
7819 struct device_attribute *attr, char *buf)
7820{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007821 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007822
7823 return sprintf(buf, "0x%04X\n",
7824 le32_to_cpu(priv->active_rxon.filter_flags));
7825}
7826
7827static ssize_t store_filter_flags(struct device *d,
7828 struct device_attribute *attr,
7829 const char *buf, size_t count)
7830{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007831 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007832 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7833
7834 mutex_lock(&priv->mutex);
7835 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7836 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007837 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007838 IWL_WARNING("Could not cancel scan.\n");
7839 else {
7840 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7841 "0x%04X\n", filter_flags);
7842 priv->staging_rxon.filter_flags =
7843 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007844 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007845 }
7846 }
7847 mutex_unlock(&priv->mutex);
7848
7849 return count;
7850}
7851
7852static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7853 store_filter_flags);
7854
7855static ssize_t show_tune(struct device *d,
7856 struct device_attribute *attr, char *buf)
7857{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007858 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007859
7860 return sprintf(buf, "0x%04X\n",
7861 (priv->phymode << 8) |
7862 le16_to_cpu(priv->active_rxon.channel));
7863}
7864
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007865static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007866
7867static ssize_t store_tune(struct device *d,
7868 struct device_attribute *attr,
7869 const char *buf, size_t count)
7870{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007871 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007872 char *p = (char *)buf;
7873 u16 tune = simple_strtoul(p, &p, 0);
7874 u8 phymode = (tune >> 8) & 0xff;
7875 u16 channel = tune & 0xff;
7876
7877 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7878
7879 mutex_lock(&priv->mutex);
7880 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7881 (priv->phymode != phymode)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007882 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07007883
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007884 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
Zhu Yib481de92007-09-25 17:54:57 -07007885 if (!ch_info) {
7886 IWL_WARNING("Requested invalid phymode/channel "
7887 "combination: %d %d\n", phymode, channel);
7888 mutex_unlock(&priv->mutex);
7889 return -EINVAL;
7890 }
7891
7892 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007893 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007894 IWL_WARNING("Could not cancel scan.\n");
7895 else {
7896 IWL_DEBUG_INFO("Committing phymode and "
7897 "rxon.channel = %d %d\n",
7898 phymode, channel);
7899
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007900 iwl3945_set_rxon_channel(priv, phymode, channel);
7901 iwl3945_set_flags_for_phymode(priv, phymode);
Zhu Yib481de92007-09-25 17:54:57 -07007902
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007903 iwl3945_set_rate(priv);
7904 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007905 }
7906 }
7907 mutex_unlock(&priv->mutex);
7908
7909 return count;
7910}
7911
7912static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7913
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007914#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007915
7916static ssize_t show_measurement(struct device *d,
7917 struct device_attribute *attr, char *buf)
7918{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007919 struct iwl3945_priv *priv = dev_get_drvdata(d);
7920 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007921 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7922 u8 *data = (u8 *) & measure_report;
7923 unsigned long flags;
7924
7925 spin_lock_irqsave(&priv->lock, flags);
7926 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7927 spin_unlock_irqrestore(&priv->lock, flags);
7928 return 0;
7929 }
7930 memcpy(&measure_report, &priv->measure_report, size);
7931 priv->measurement_status = 0;
7932 spin_unlock_irqrestore(&priv->lock, flags);
7933
7934 while (size && (PAGE_SIZE - len)) {
7935 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7936 PAGE_SIZE - len, 1);
7937 len = strlen(buf);
7938 if (PAGE_SIZE - len)
7939 buf[len++] = '\n';
7940
7941 ofs += 16;
7942 size -= min(size, 16U);
7943 }
7944
7945 return len;
7946}
7947
7948static ssize_t store_measurement(struct device *d,
7949 struct device_attribute *attr,
7950 const char *buf, size_t count)
7951{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007952 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007953 struct ieee80211_measurement_params params = {
7954 .channel = le16_to_cpu(priv->active_rxon.channel),
7955 .start_time = cpu_to_le64(priv->last_tsf),
7956 .duration = cpu_to_le16(1),
7957 };
7958 u8 type = IWL_MEASURE_BASIC;
7959 u8 buffer[32];
7960 u8 channel;
7961
7962 if (count) {
7963 char *p = buffer;
7964 strncpy(buffer, buf, min(sizeof(buffer), count));
7965 channel = simple_strtoul(p, NULL, 0);
7966 if (channel)
7967 params.channel = channel;
7968
7969 p = buffer;
7970 while (*p && *p != ' ')
7971 p++;
7972 if (*p)
7973 type = simple_strtoul(p + 1, NULL, 0);
7974 }
7975
7976 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7977 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007978 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007979
7980 return count;
7981}
7982
7983static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7984 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007985#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007986
7987static ssize_t show_rate(struct device *d,
7988 struct device_attribute *attr, char *buf)
7989{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007990 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007991 unsigned long flags;
7992 int i;
7993
7994 spin_lock_irqsave(&priv->sta_lock, flags);
7995 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
7996 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
7997 else
7998 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
7999 spin_unlock_irqrestore(&priv->sta_lock, flags);
8000
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008001 i = iwl3945_rate_index_from_plcp(i);
Zhu Yib481de92007-09-25 17:54:57 -07008002 if (i == -1)
8003 return sprintf(buf, "0\n");
8004
8005 return sprintf(buf, "%d%s\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008006 (iwl3945_rates[i].ieee >> 1),
8007 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
Zhu Yib481de92007-09-25 17:54:57 -07008008}
8009
8010static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8011
8012static ssize_t store_retry_rate(struct device *d,
8013 struct device_attribute *attr,
8014 const char *buf, size_t count)
8015{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008016 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008017
8018 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8019 if (priv->retry_rate <= 0)
8020 priv->retry_rate = 1;
8021
8022 return count;
8023}
8024
8025static ssize_t show_retry_rate(struct device *d,
8026 struct device_attribute *attr, char *buf)
8027{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008028 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008029 return sprintf(buf, "%d", priv->retry_rate);
8030}
8031
8032static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8033 store_retry_rate);
8034
8035static ssize_t store_power_level(struct device *d,
8036 struct device_attribute *attr,
8037 const char *buf, size_t count)
8038{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008039 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008040 int rc;
8041 int mode;
8042
8043 mode = simple_strtoul(buf, NULL, 0);
8044 mutex_lock(&priv->mutex);
8045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008046 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008047 rc = -EAGAIN;
8048 goto out;
8049 }
8050
8051 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8052 mode = IWL_POWER_AC;
8053 else
8054 mode |= IWL_POWER_ENABLED;
8055
8056 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008057 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07008058 if (rc) {
8059 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8060 goto out;
8061 }
8062 priv->power_mode = mode;
8063 }
8064
8065 rc = count;
8066
8067 out:
8068 mutex_unlock(&priv->mutex);
8069 return rc;
8070}
8071
8072#define MAX_WX_STRING 80
8073
8074/* Values are in microsecond */
8075static const s32 timeout_duration[] = {
8076 350000,
8077 250000,
8078 75000,
8079 37000,
8080 25000,
8081};
8082static const s32 period_duration[] = {
8083 400000,
8084 700000,
8085 1000000,
8086 1000000,
8087 1000000
8088};
8089
8090static ssize_t show_power_level(struct device *d,
8091 struct device_attribute *attr, char *buf)
8092{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008093 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008094 int level = IWL_POWER_LEVEL(priv->power_mode);
8095 char *p = buf;
8096
8097 p += sprintf(p, "%d ", level);
8098 switch (level) {
8099 case IWL_POWER_MODE_CAM:
8100 case IWL_POWER_AC:
8101 p += sprintf(p, "(AC)");
8102 break;
8103 case IWL_POWER_BATTERY:
8104 p += sprintf(p, "(BATTERY)");
8105 break;
8106 default:
8107 p += sprintf(p,
8108 "(Timeout %dms, Period %dms)",
8109 timeout_duration[level - 1] / 1000,
8110 period_duration[level - 1] / 1000);
8111 }
8112
8113 if (!(priv->power_mode & IWL_POWER_ENABLED))
8114 p += sprintf(p, " OFF\n");
8115 else
8116 p += sprintf(p, " \n");
8117
8118 return (p - buf + 1);
8119
8120}
8121
8122static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8123 store_power_level);
8124
8125static ssize_t show_channels(struct device *d,
8126 struct device_attribute *attr, char *buf)
8127{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008128 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008129 int len = 0, i;
8130 struct ieee80211_channel *channels = NULL;
8131 const struct ieee80211_hw_mode *hw_mode = NULL;
8132 int count = 0;
8133
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008134 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008135 return -EAGAIN;
8136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008137 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
Zhu Yib481de92007-09-25 17:54:57 -07008138 if (!hw_mode)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008139 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
Zhu Yib481de92007-09-25 17:54:57 -07008140 if (hw_mode) {
8141 channels = hw_mode->channels;
8142 count = hw_mode->num_channels;
8143 }
8144
8145 len +=
8146 sprintf(&buf[len],
8147 "Displaying %d channels in 2.4GHz band "
8148 "(802.11bg):\n", count);
8149
8150 for (i = 0; i < count; i++)
8151 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8152 channels[i].chan,
8153 channels[i].power_level,
8154 channels[i].
8155 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8156 " (IEEE 802.11h required)" : "",
8157 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8158 || (channels[i].
8159 flag &
8160 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8161 ", IBSS",
8162 channels[i].
8163 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8164 "active/passive" : "passive only");
8165
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008166 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
Zhu Yib481de92007-09-25 17:54:57 -07008167 if (hw_mode) {
8168 channels = hw_mode->channels;
8169 count = hw_mode->num_channels;
8170 } else {
8171 channels = NULL;
8172 count = 0;
8173 }
8174
8175 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8176 "(802.11a):\n", count);
8177
8178 for (i = 0; i < count; i++)
8179 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8180 channels[i].chan,
8181 channels[i].power_level,
8182 channels[i].
8183 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8184 " (IEEE 802.11h required)" : "",
8185 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8186 || (channels[i].
8187 flag &
8188 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8189 ", IBSS",
8190 channels[i].
8191 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8192 "active/passive" : "passive only");
8193
8194 return len;
8195}
8196
8197static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8198
8199static ssize_t show_statistics(struct device *d,
8200 struct device_attribute *attr, char *buf)
8201{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008202 struct iwl3945_priv *priv = dev_get_drvdata(d);
8203 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07008204 u32 len = 0, ofs = 0;
8205 u8 *data = (u8 *) & priv->statistics;
8206 int rc = 0;
8207
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008208 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008209 return -EAGAIN;
8210
8211 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008212 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008213 mutex_unlock(&priv->mutex);
8214
8215 if (rc) {
8216 len = sprintf(buf,
8217 "Error sending statistics request: 0x%08X\n", rc);
8218 return len;
8219 }
8220
8221 while (size && (PAGE_SIZE - len)) {
8222 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8223 PAGE_SIZE - len, 1);
8224 len = strlen(buf);
8225 if (PAGE_SIZE - len)
8226 buf[len++] = '\n';
8227
8228 ofs += 16;
8229 size -= min(size, 16U);
8230 }
8231
8232 return len;
8233}
8234
8235static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8236
8237static ssize_t show_antenna(struct device *d,
8238 struct device_attribute *attr, char *buf)
8239{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008240 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008241
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008242 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008243 return -EAGAIN;
8244
8245 return sprintf(buf, "%d\n", priv->antenna);
8246}
8247
8248static ssize_t store_antenna(struct device *d,
8249 struct device_attribute *attr,
8250 const char *buf, size_t count)
8251{
8252 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008253 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07008254
8255 if (count == 0)
8256 return 0;
8257
8258 if (sscanf(buf, "%1i", &ant) != 1) {
8259 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8260 return count;
8261 }
8262
8263 if ((ant >= 0) && (ant <= 2)) {
8264 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008265 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07008266 } else
8267 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8268
8269
8270 return count;
8271}
8272
8273static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8274
8275static ssize_t show_status(struct device *d,
8276 struct device_attribute *attr, char *buf)
8277{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008278 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8279 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07008280 return -EAGAIN;
8281 return sprintf(buf, "0x%08x\n", (int)priv->status);
8282}
8283
8284static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8285
8286static ssize_t dump_error_log(struct device *d,
8287 struct device_attribute *attr,
8288 const char *buf, size_t count)
8289{
8290 char *p = (char *)buf;
8291
8292 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008293 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008294
8295 return strnlen(buf, count);
8296}
8297
8298static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8299
8300static ssize_t dump_event_log(struct device *d,
8301 struct device_attribute *attr,
8302 const char *buf, size_t count)
8303{
8304 char *p = (char *)buf;
8305
8306 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008307 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008308
8309 return strnlen(buf, count);
8310}
8311
8312static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8313
8314/*****************************************************************************
8315 *
8316 * driver setup and teardown
8317 *
8318 *****************************************************************************/
8319
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008320static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008321{
8322 priv->workqueue = create_workqueue(DRV_NAME);
8323
8324 init_waitqueue_head(&priv->wait_command_queue);
8325
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008326 INIT_WORK(&priv->up, iwl3945_bg_up);
8327 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8328 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8329 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8330 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8331 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8332 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8333 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8334 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8335 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8336 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8337 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07008338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008339 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008340
8341 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008342 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07008343}
8344
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008345static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07008346{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008347 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008348
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09008349 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07008350 cancel_delayed_work(&priv->scan_check);
8351 cancel_delayed_work(&priv->alive_start);
8352 cancel_delayed_work(&priv->post_associate);
8353 cancel_work_sync(&priv->beacon_update);
8354}
8355
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008356static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07008357 &dev_attr_antenna.attr,
8358 &dev_attr_channels.attr,
8359 &dev_attr_dump_errors.attr,
8360 &dev_attr_dump_events.attr,
8361 &dev_attr_flags.attr,
8362 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008363#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008364 &dev_attr_measurement.attr,
8365#endif
8366 &dev_attr_power_level.attr,
8367 &dev_attr_rate.attr,
8368 &dev_attr_retry_rate.attr,
8369 &dev_attr_rf_kill.attr,
8370 &dev_attr_rs_window.attr,
8371 &dev_attr_statistics.attr,
8372 &dev_attr_status.attr,
8373 &dev_attr_temperature.attr,
8374 &dev_attr_tune.attr,
8375 &dev_attr_tx_power.attr,
8376
8377 NULL
8378};
8379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008380static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008381 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008382 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008383};
8384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008385static struct ieee80211_ops iwl3945_hw_ops = {
8386 .tx = iwl3945_mac_tx,
8387 .start = iwl3945_mac_start,
8388 .stop = iwl3945_mac_stop,
8389 .add_interface = iwl3945_mac_add_interface,
8390 .remove_interface = iwl3945_mac_remove_interface,
8391 .config = iwl3945_mac_config,
8392 .config_interface = iwl3945_mac_config_interface,
8393 .configure_filter = iwl3945_configure_filter,
8394 .set_key = iwl3945_mac_set_key,
8395 .get_stats = iwl3945_mac_get_stats,
8396 .get_tx_stats = iwl3945_mac_get_tx_stats,
8397 .conf_tx = iwl3945_mac_conf_tx,
8398 .get_tsf = iwl3945_mac_get_tsf,
8399 .reset_tsf = iwl3945_mac_reset_tsf,
8400 .beacon_update = iwl3945_mac_beacon_update,
8401 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07008402};
8403
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008404static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07008405{
8406 int err = 0;
8407 u32 pci_id;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008408 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07008409 struct ieee80211_hw *hw;
8410 int i;
Zhu Yi5a66926a2008-01-14 17:46:18 -08008411 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07008412
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008413 /* Disabling hardware scan means that mac80211 will perform scans
8414 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008415 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07008416 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008417 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07008418 }
8419
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008420 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8421 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07008422 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8423 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8424 err = -EINVAL;
8425 goto out;
8426 }
8427
8428 /* mac80211 allocates memory for this device instance, including
8429 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008430 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07008431 if (hw == NULL) {
8432 IWL_ERROR("Can not allocate network device\n");
8433 err = -ENOMEM;
8434 goto out;
8435 }
8436 SET_IEEE80211_DEV(hw, &pdev->dev);
8437
Johannes Bergf51359a2007-10-28 14:53:36 +01008438 hw->rate_control_algorithm = "iwl-3945-rs";
8439
Zhu Yib481de92007-09-25 17:54:57 -07008440 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8441 priv = hw->priv;
8442 priv->hw = hw;
8443
8444 priv->pci_dev = pdev;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008445
8446 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008447 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008448#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008449 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008450 atomic_set(&priv->restrict_refcnt, 0);
8451#endif
8452 priv->retry_rate = 1;
8453
8454 priv->ibss_beacon = NULL;
8455
8456 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8457 * the range of signal quality values that we'll provide.
8458 * Negative values for level/noise indicate that we'll provide dBm.
8459 * For WE, at least, non-0 values here *enable* display of values
8460 * in app (iwconfig). */
8461 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8462 hw->max_noise = -20; /* noise level, negative indicates dBm */
8463 hw->max_signal = 100; /* link quality indication (%) */
8464
8465 /* Tell mac80211 our Tx characteristics */
8466 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8467
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008468 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008469 hw->queues = 4;
8470
8471 spin_lock_init(&priv->lock);
8472 spin_lock_init(&priv->power_data.lock);
8473 spin_lock_init(&priv->sta_lock);
8474 spin_lock_init(&priv->hcmd_lock);
8475
8476 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8477 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8478
8479 INIT_LIST_HEAD(&priv->free_frames);
8480
8481 mutex_init(&priv->mutex);
8482 if (pci_enable_device(pdev)) {
8483 err = -ENODEV;
8484 goto out_ieee80211_free_hw;
8485 }
8486
8487 pci_set_master(pdev);
8488
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008489 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008490 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008491
8492 priv->data_retry_limit = -1;
8493 priv->ieee_channels = NULL;
8494 priv->ieee_rates = NULL;
8495 priv->phymode = -1;
8496
8497 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8498 if (!err)
8499 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8500 if (err) {
8501 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8502 goto out_pci_disable_device;
8503 }
8504
8505 pci_set_drvdata(pdev, priv);
8506 err = pci_request_regions(pdev, DRV_NAME);
8507 if (err)
8508 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008509
Zhu Yib481de92007-09-25 17:54:57 -07008510 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8511 * PCI Tx retries from interfering with C3 CPU state */
8512 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008513
Zhu Yib481de92007-09-25 17:54:57 -07008514 priv->hw_base = pci_iomap(pdev, 0, 0);
8515 if (!priv->hw_base) {
8516 err = -ENODEV;
8517 goto out_pci_release_regions;
8518 }
8519
8520 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8521 (unsigned long long) pci_resource_len(pdev, 0));
8522 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8523
8524 /* Initialize module parameter values here */
8525
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008526 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008527 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008528 set_bit(STATUS_RF_KILL_SW, &priv->status);
8529 IWL_DEBUG_INFO("Radio disabled.\n");
8530 }
8531
8532 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8533
8534 pci_id =
8535 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8536
8537 switch (pci_id) {
8538 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8539 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8540 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8541 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8542 priv->is_abg = 0;
8543 break;
8544
8545 /*
8546 * Rest are assumed ABG SKU -- if this is not the
8547 * case then the card will get the wrong 'Detected'
8548 * line in the kernel log however the code that
8549 * initializes the GEO table will detect no A-band
8550 * channels and remove the is_abg mask.
8551 */
8552 default:
8553 priv->is_abg = 1;
8554 break;
8555 }
8556
8557 printk(KERN_INFO DRV_NAME
8558 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8559 priv->is_abg ? "A" : "");
8560
8561 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008562 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008563 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008564 goto out_iounmap;
8565 }
8566
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008567#ifdef CONFIG_IWL3945_QOS
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008568 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008569 priv->qos_data.qos_enable = 1;
8570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008571 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008572
8573 priv->qos_data.qos_active = 0;
8574 priv->qos_data.qos_cap.val = 0;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008575#endif /* CONFIG_IWL3945_QOS */
Zhu Yib481de92007-09-25 17:54:57 -07008576
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008577 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8578 iwl3945_setup_deferred_work(priv);
8579 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008580
8581 priv->rates_mask = IWL_RATES_MASK;
8582 /* If power management is turned on, default to AC mode */
8583 priv->power_mode = IWL_POWER_AC;
8584 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8585
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008586 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008587
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008588 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008589 if (err) {
8590 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008591 goto out_release_irq;
8592 }
8593
Zhu Yi5a66926a2008-01-14 17:46:18 -08008594 /* nic init */
8595 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8596 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8597
8598 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8599 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8600 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8601 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8602 if (err < 0) {
8603 IWL_DEBUG_INFO("Failed to init the card\n");
8604 goto out_remove_sysfs;
8605 }
8606 /* Read the EEPROM */
8607 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008608 if (err) {
Zhu Yi5a66926a2008-01-14 17:46:18 -08008609 IWL_ERROR("Unable to init EEPROM\n");
8610 goto out_remove_sysfs;
8611 }
8612 /* MAC Address location in EEPROM same for 3945/4965 */
8613 get_eeprom_mac(priv, priv->mac_addr);
8614 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8615 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8616
8617 iwl3945_rate_control_register(priv->hw);
8618 err = ieee80211_register_hw(priv->hw);
8619 if (err) {
8620 IWL_ERROR("Failed to register network device (error %d)\n", err);
8621 goto out_remove_sysfs;
Zhu Yib481de92007-09-25 17:54:57 -07008622 }
8623
Zhu Yi5a66926a2008-01-14 17:46:18 -08008624 priv->hw->conf.beacon_int = 100;
8625 priv->mac80211_registered = 1;
8626 pci_save_state(pdev);
8627 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008628
8629 return 0;
8630
Zhu Yi5a66926a2008-01-14 17:46:18 -08008631 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008632 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008633
8634 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008635 destroy_workqueue(priv->workqueue);
8636 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008637 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008638
8639 out_iounmap:
8640 pci_iounmap(pdev, priv->hw_base);
8641 out_pci_release_regions:
8642 pci_release_regions(pdev);
8643 out_pci_disable_device:
8644 pci_disable_device(pdev);
8645 pci_set_drvdata(pdev, NULL);
8646 out_ieee80211_free_hw:
8647 ieee80211_free_hw(priv->hw);
8648 out:
8649 return err;
8650}
8651
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008652static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008653{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008654 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008655 struct list_head *p, *q;
8656 int i;
8657
8658 if (!priv)
8659 return;
8660
8661 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8662
Zhu Yib481de92007-09-25 17:54:57 -07008663 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008664
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008665 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008666
8667 /* Free MAC hash list for ADHOC */
8668 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8669 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8670 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008671 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008672 }
8673 }
8674
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008675 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008676
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008677 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008678
8679 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008680 iwl3945_rx_queue_free(priv, &priv->rxq);
8681 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008682
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008683 iwl3945_unset_hw_setting(priv);
8684 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008685
8686 if (priv->mac80211_registered) {
8687 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008688 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008689 }
8690
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008691 /*netif_stop_queue(dev); */
8692 flush_workqueue(priv->workqueue);
8693
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008694 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008695 * priv->workqueue... so we can't take down the workqueue
8696 * until now... */
8697 destroy_workqueue(priv->workqueue);
8698 priv->workqueue = NULL;
8699
Zhu Yib481de92007-09-25 17:54:57 -07008700 pci_iounmap(pdev, priv->hw_base);
8701 pci_release_regions(pdev);
8702 pci_disable_device(pdev);
8703 pci_set_drvdata(pdev, NULL);
8704
8705 kfree(priv->channel_info);
8706
8707 kfree(priv->ieee_channels);
8708 kfree(priv->ieee_rates);
8709
8710 if (priv->ibss_beacon)
8711 dev_kfree_skb(priv->ibss_beacon);
8712
8713 ieee80211_free_hw(priv->hw);
8714}
8715
8716#ifdef CONFIG_PM
8717
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008718static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008719{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008720 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008721
Zhu Yie655b9f2008-01-24 02:19:38 -08008722 if (priv->is_open) {
8723 set_bit(STATUS_IN_SUSPEND, &priv->status);
8724 iwl3945_mac_stop(priv->hw);
8725 priv->is_open = 1;
8726 }
Zhu Yib481de92007-09-25 17:54:57 -07008727
Zhu Yib481de92007-09-25 17:54:57 -07008728 pci_set_power_state(pdev, PCI_D3hot);
8729
Zhu Yib481de92007-09-25 17:54:57 -07008730 return 0;
8731}
8732
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008733static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008734{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008735 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008736
Zhu Yib481de92007-09-25 17:54:57 -07008737 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008738
Zhu Yie655b9f2008-01-24 02:19:38 -08008739 if (priv->is_open)
8740 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008741
Zhu Yie655b9f2008-01-24 02:19:38 -08008742 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008743 return 0;
8744}
8745
8746#endif /* CONFIG_PM */
8747
8748/*****************************************************************************
8749 *
8750 * driver and module entry point
8751 *
8752 *****************************************************************************/
8753
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008754static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008755 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008756 .id_table = iwl3945_hw_card_ids,
8757 .probe = iwl3945_pci_probe,
8758 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008759#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008760 .suspend = iwl3945_pci_suspend,
8761 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008762#endif
8763};
8764
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008765static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008766{
8767
8768 int ret;
8769 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8770 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008771 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008772 if (ret) {
8773 IWL_ERROR("Unable to initialize PCI module\n");
8774 return ret;
8775 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008776#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008777 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008778 if (ret) {
8779 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008780 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008781 return ret;
8782 }
8783#endif
8784
8785 return ret;
8786}
8787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008788static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008789{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008790#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008791 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008792#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008793 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008794}
8795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008796module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008797MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008798module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008799MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008800module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008801MODULE_PARM_DESC(hwcrypto,
8802 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008803module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008804MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008805module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008806MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8807
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008808module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008809MODULE_PARM_DESC(queues_num, "number of hw queues.");
8810
8811/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008812module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008813MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8814
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008815module_exit(iwl3945_exit);
8816module_init(iwl3945_init);