blob: 776103e560422c38ace32ac2edec775344d26d6e [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
Paul Fulghuma7482a22005-09-10 00:26:07 -07004 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
38#include <linux/config.h>
39#include <linux/module.h>
40#include <linux/errno.h>
41#include <linux/signal.h>
42#include <linux/sched.h>
43#include <linux/timer.h>
44#include <linux/time.h>
45#include <linux/interrupt.h>
46#include <linux/pci.h>
47#include <linux/tty.h>
48#include <linux/tty_flip.h>
49#include <linux/serial.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/ioport.h>
55#include <linux/mm.h>
56#include <linux/slab.h>
57#include <linux/netdevice.h>
58#include <linux/vmalloc.h>
59#include <linux/init.h>
60#include <asm/serial.h>
61#include <linux/delay.h>
62#include <linux/ioctl.h>
63
64#include <asm/system.h>
65#include <asm/io.h>
66#include <asm/irq.h>
67#include <asm/dma.h>
68#include <linux/bitops.h>
69#include <asm/types.h>
70#include <linux/termios.h>
71#include <linux/workqueue.h>
72#include <linux/hdlc.h>
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074#include <pcmcia/cs_types.h>
75#include <pcmcia/cs.h>
76#include <pcmcia/cistpl.h>
77#include <pcmcia/cisreg.h>
78#include <pcmcia/ds.h>
79
80#ifdef CONFIG_HDLC_MODULE
81#define CONFIG_HDLC 1
82#endif
83
84#define GET_USER(error,value,addr) error = get_user(value,addr)
85#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86#define PUT_USER(error,value,addr) error = put_user(value,addr)
87#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89#include <asm/uaccess.h>
90
91#include "linux/synclink.h"
92
93static MGSL_PARAMS default_params = {
94 MGSL_MODE_HDLC, /* unsigned long mode */
95 0, /* unsigned char loopback; */
96 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
97 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
98 0, /* unsigned long clock_speed; */
99 0xff, /* unsigned char addr_filter; */
100 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
101 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
102 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
103 9600, /* unsigned long data_rate; */
104 8, /* unsigned char data_bits; */
105 1, /* unsigned char stop_bits; */
106 ASYNC_PARITY_NONE /* unsigned char parity; */
107};
108
109typedef struct
110{
111 int count;
112 unsigned char status;
113 char data[1];
114} RXBUF;
115
116/* The queue of BH actions to be performed */
117
118#define BH_RECEIVE 1
119#define BH_TRANSMIT 2
120#define BH_STATUS 4
121
122#define IO_PIN_SHUTDOWN_LIMIT 100
123
124#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126struct _input_signal_events {
127 int ri_up;
128 int ri_down;
129 int dsr_up;
130 int dsr_down;
131 int dcd_up;
132 int dcd_down;
133 int cts_up;
134 int cts_down;
135};
136
137
138/*
139 * Device instance data structure
140 */
141
142typedef struct _mgslpc_info {
143 void *if_ptr; /* General purpose pointer (used by SPPP) */
144 int magic;
145 int flags;
146 int count; /* count of opens */
147 int line;
148 unsigned short close_delay;
149 unsigned short closing_wait; /* time to wait before closing */
150
151 struct mgsl_icount icount;
152
153 struct tty_struct *tty;
154 int timeout;
155 int x_char; /* xon/xoff character */
156 int blocked_open; /* # of blocked opens */
157 unsigned char read_status_mask;
158 unsigned char ignore_status_mask;
159
160 unsigned char *tx_buf;
161 int tx_put;
162 int tx_get;
163 int tx_count;
164
165 /* circular list of fixed length rx buffers */
166
167 unsigned char *rx_buf; /* memory allocated for all rx buffers */
168 int rx_buf_total_size; /* size of memory allocated for rx buffers */
169 int rx_put; /* index of next empty rx buffer */
170 int rx_get; /* index of next full rx buffer */
171 int rx_buf_size; /* size in bytes of single rx buffer */
172 int rx_buf_count; /* total number of rx buffers */
173 int rx_frame_count; /* number of full rx buffers */
174
175 wait_queue_head_t open_wait;
176 wait_queue_head_t close_wait;
177
178 wait_queue_head_t status_event_wait_q;
179 wait_queue_head_t event_wait_q;
180 struct timer_list tx_timer; /* HDLC transmit timeout timer */
181 struct _mgslpc_info *next_device; /* device list link */
182
183 unsigned short imra_value;
184 unsigned short imrb_value;
185 unsigned char pim_value;
186
187 spinlock_t lock;
188 struct work_struct task; /* task structure for scheduling bh */
189
190 u32 max_frame_size;
191
192 u32 pending_bh;
193
194 int bh_running;
195 int bh_requested;
196
197 int dcd_chkcount; /* check counts to prevent */
198 int cts_chkcount; /* too many IRQs if a signal */
199 int dsr_chkcount; /* is floating */
200 int ri_chkcount;
201
202 int rx_enabled;
203 int rx_overflow;
204
205 int tx_enabled;
206 int tx_active;
207 int tx_aborting;
208 u32 idle_mode;
209
210 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212 char device_name[25]; /* device instance name */
213
214 unsigned int io_base; /* base I/O address of adapter */
215 unsigned int irq_level;
216
217 MGSL_PARAMS params; /* communications parameters */
218
219 unsigned char serial_signals; /* current serial signal states */
220
221 char irq_occurred; /* for diagnostics use */
222 char testing_irq;
223 unsigned int init_error; /* startup error (DIAGS) */
224
225 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226 BOOLEAN drop_rts_on_tx_done;
227
228 struct _input_signal_events input_signal_events;
229
230 /* PCMCIA support */
231 dev_link_t link;
232 dev_node_t node;
233 int stop;
234
235 /* SPPP/Cisco HDLC device parts */
236 int netcount;
237 int dosyncppp;
238 spinlock_t netlock;
239
240#ifdef CONFIG_HDLC
241 struct net_device *netdev;
242#endif
243
244} MGSLPC_INFO;
245
246#define MGSLPC_MAGIC 0x5402
247
248/*
249 * The size of the serial xmit buffer is 1 page, or 4096 bytes
250 */
251#define TXBUFSIZE 4096
252
253
254#define CHA 0x00 /* channel A offset */
255#define CHB 0x40 /* channel B offset */
256
257/*
258 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
259 */
260#undef PVR
261
262#define RXFIFO 0
263#define TXFIFO 0
264#define STAR 0x20
265#define CMDR 0x20
266#define RSTA 0x21
267#define PRE 0x21
268#define MODE 0x22
269#define TIMR 0x23
270#define XAD1 0x24
271#define XAD2 0x25
272#define RAH1 0x26
273#define RAH2 0x27
274#define DAFO 0x27
275#define RAL1 0x28
276#define RFC 0x28
277#define RHCR 0x29
278#define RAL2 0x29
279#define RBCL 0x2a
280#define XBCL 0x2a
281#define RBCH 0x2b
282#define XBCH 0x2b
283#define CCR0 0x2c
284#define CCR1 0x2d
285#define CCR2 0x2e
286#define CCR3 0x2f
287#define VSTR 0x34
288#define BGR 0x34
289#define RLCR 0x35
290#define AML 0x36
291#define AMH 0x37
292#define GIS 0x38
293#define IVA 0x38
294#define IPC 0x39
295#define ISR 0x3a
296#define IMR 0x3a
297#define PVR 0x3c
298#define PIS 0x3d
299#define PIM 0x3d
300#define PCR 0x3e
301#define CCR4 0x3f
302
303// IMR/ISR
304
305#define IRQ_BREAK_ON BIT15 // rx break detected
306#define IRQ_DATAOVERRUN BIT14 // receive data overflow
307#define IRQ_ALLSENT BIT13 // all sent
308#define IRQ_UNDERRUN BIT12 // transmit data underrun
309#define IRQ_TIMER BIT11 // timer interrupt
310#define IRQ_CTS BIT10 // CTS status change
311#define IRQ_TXREPEAT BIT9 // tx message repeat
312#define IRQ_TXFIFO BIT8 // transmit pool ready
313#define IRQ_RXEOM BIT7 // receive message end
314#define IRQ_EXITHUNT BIT6 // receive frame start
315#define IRQ_RXTIME BIT6 // rx char timeout
316#define IRQ_DCD BIT2 // carrier detect status change
317#define IRQ_OVERRUN BIT1 // receive frame overflow
318#define IRQ_RXFIFO BIT0 // receive pool full
319
320// STAR
321
322#define XFW BIT6 // transmit FIFO write enable
323#define CEC BIT2 // command executing
324#define CTS BIT1 // CTS state
325
326#define PVR_DTR BIT0
327#define PVR_DSR BIT1
328#define PVR_RI BIT2
329#define PVR_AUTOCTS BIT3
330#define PVR_RS232 0x20 /* 0010b */
331#define PVR_V35 0xe0 /* 1110b */
332#define PVR_RS422 0x40 /* 0100b */
333
334/* Register access functions */
335
336#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337#define read_reg(info, reg) inb((info)->io_base + (reg))
338
339#define read_reg16(info, reg) inw((info)->io_base + (reg))
340#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341
342#define set_reg_bits(info, reg, mask) \
343 write_reg(info, (reg), \
344 (unsigned char) (read_reg(info, (reg)) | (mask)))
345#define clear_reg_bits(info, reg, mask) \
346 write_reg(info, (reg), \
347 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
348/*
349 * interrupt enable/disable routines
350 */
351static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
352{
353 if (channel == CHA) {
354 info->imra_value |= mask;
355 write_reg16(info, CHA + IMR, info->imra_value);
356 } else {
357 info->imrb_value |= mask;
358 write_reg16(info, CHB + IMR, info->imrb_value);
359 }
360}
361static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
362{
363 if (channel == CHA) {
364 info->imra_value &= ~mask;
365 write_reg16(info, CHA + IMR, info->imra_value);
366 } else {
367 info->imrb_value &= ~mask;
368 write_reg16(info, CHB + IMR, info->imrb_value);
369 }
370}
371
372#define port_irq_disable(info, mask) \
373 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375#define port_irq_enable(info, mask) \
376 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378static void rx_start(MGSLPC_INFO *info);
379static void rx_stop(MGSLPC_INFO *info);
380
381static void tx_start(MGSLPC_INFO *info);
382static void tx_stop(MGSLPC_INFO *info);
383static void tx_set_idle(MGSLPC_INFO *info);
384
385static void get_signals(MGSLPC_INFO *info);
386static void set_signals(MGSLPC_INFO *info);
387
388static void reset_device(MGSLPC_INFO *info);
389
390static void hdlc_mode(MGSLPC_INFO *info);
391static void async_mode(MGSLPC_INFO *info);
392
393static void tx_timeout(unsigned long context);
394
395static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397#ifdef CONFIG_HDLC
398#define dev_to_port(D) (dev_to_hdlc(D)->priv)
399static void hdlcdev_tx_done(MGSLPC_INFO *info);
400static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401static int hdlcdev_init(MGSLPC_INFO *info);
402static void hdlcdev_exit(MGSLPC_INFO *info);
403#endif
404
405static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407static BOOLEAN register_test(MGSLPC_INFO *info);
408static BOOLEAN irq_test(MGSLPC_INFO *info);
409static int adapter_test(MGSLPC_INFO *info);
410
411static int claim_resources(MGSLPC_INFO *info);
412static void release_resources(MGSLPC_INFO *info);
413static void mgslpc_add_device(MGSLPC_INFO *info);
414static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416static int rx_get_frame(MGSLPC_INFO *info);
417static void rx_reset_buffers(MGSLPC_INFO *info);
418static int rx_alloc_buffers(MGSLPC_INFO *info);
419static void rx_free_buffers(MGSLPC_INFO *info);
420
421static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
422
423/*
424 * Bottom half interrupt handlers
425 */
426static void bh_handler(void* Context);
427static void bh_transmit(MGSLPC_INFO *info);
428static void bh_status(MGSLPC_INFO *info);
429
430/*
431 * ioctl handlers
432 */
433static int tiocmget(struct tty_struct *tty, struct file *file);
434static int tiocmset(struct tty_struct *tty, struct file *file,
435 unsigned int set, unsigned int clear);
436static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441static int set_txenable(MGSLPC_INFO *info, int enable);
442static int tx_abort(MGSLPC_INFO *info);
443static int set_rxenable(MGSLPC_INFO *info, int enable);
444static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446static MGSLPC_INFO *mgslpc_device_list = NULL;
447static int mgslpc_device_count = 0;
448
449/*
450 * Set this param to non-zero to load eax with the
451 * .text section address and breakpoint on module load.
452 * This is useful for use with gdb and add-symbol-file command.
453 */
454static int break_on_load=0;
455
456/*
457 * Driver major number, defaults to zero to get auto
458 * assigned major number. May be forced as module parameter.
459 */
460static int ttymajor=0;
461
462static int debug_level = 0;
463static int maxframe[MAX_DEVICE_COUNT] = {0,};
464static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466module_param(break_on_load, bool, 0);
467module_param(ttymajor, int, 0);
468module_param(debug_level, int, 0);
469module_param_array(maxframe, int, NULL, 0);
470module_param_array(dosyncppp, int, NULL, 0);
471
472MODULE_LICENSE("GPL");
473
474static char *driver_name = "SyncLink PC Card driver";
Paul Fulghuma7482a22005-09-10 00:26:07 -0700475static char *driver_version = "$Revision: 4.34 $";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476
477static struct tty_driver *serial_driver;
478
479/* number of characters left in xmit buffer before we ask for more */
480#define WAKEUP_CHARS 256
481
482static void mgslpc_change_params(MGSLPC_INFO *info);
483static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485/* PCMCIA prototypes */
486
487static void mgslpc_config(dev_link_t *link);
488static void mgslpc_release(u_long arg);
489static int mgslpc_event(event_t event, int priority,
490 event_callback_args_t *args);
491static dev_link_t *mgslpc_attach(void);
492static void mgslpc_detach(dev_link_t *);
493
494static dev_info_t dev_info = "synclink_cs";
495static dev_link_t *dev_list = NULL;
496
497/*
498 * 1st function defined in .text section. Calling this function in
499 * init_module() followed by a breakpoint allows a remote debugger
500 * (gdb) to get the .text address for the add-symbol-file command.
501 * This allows remote debugging of dynamically loadable modules.
502 */
503static void* mgslpc_get_text_ptr(void)
504{
505 return mgslpc_get_text_ptr;
506}
507
508/**
509 * line discipline callback wrappers
510 *
511 * The wrappers maintain line discipline references
512 * while calling into the line discipline.
513 *
514 * ldisc_flush_buffer - flush line discipline receive buffers
515 * ldisc_receive_buf - pass receive data to line discipline
516 */
517
518static void ldisc_flush_buffer(struct tty_struct *tty)
519{
520 struct tty_ldisc *ld = tty_ldisc_ref(tty);
521 if (ld) {
522 if (ld->flush_buffer)
523 ld->flush_buffer(tty);
524 tty_ldisc_deref(ld);
525 }
526}
527
528static void ldisc_receive_buf(struct tty_struct *tty,
529 const __u8 *data, char *flags, int count)
530{
531 struct tty_ldisc *ld;
532 if (!tty)
533 return;
534 ld = tty_ldisc_ref(tty);
535 if (ld) {
536 if (ld->receive_buf)
537 ld->receive_buf(tty, data, flags, count);
538 tty_ldisc_deref(ld);
539 }
540}
541
542static dev_link_t *mgslpc_attach(void)
543{
544 MGSLPC_INFO *info;
545 dev_link_t *link;
546 client_reg_t client_reg;
547 int ret;
548
549 if (debug_level >= DEBUG_LEVEL_INFO)
550 printk("mgslpc_attach\n");
551
552 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
553 if (!info) {
554 printk("Error can't allocate device instance data\n");
555 return NULL;
556 }
557
558 memset(info, 0, sizeof(MGSLPC_INFO));
559 info->magic = MGSLPC_MAGIC;
560 INIT_WORK(&info->task, bh_handler, info);
561 info->max_frame_size = 4096;
562 info->close_delay = 5*HZ/10;
563 info->closing_wait = 30*HZ;
564 init_waitqueue_head(&info->open_wait);
565 init_waitqueue_head(&info->close_wait);
566 init_waitqueue_head(&info->status_event_wait_q);
567 init_waitqueue_head(&info->event_wait_q);
568 spin_lock_init(&info->lock);
569 spin_lock_init(&info->netlock);
570 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
571 info->idle_mode = HDLC_TXIDLE_FLAGS;
572 info->imra_value = 0xffff;
573 info->imrb_value = 0xffff;
574 info->pim_value = 0xff;
575
576 link = &info->link;
577 link->priv = info;
578
579 /* Initialize the dev_link_t structure */
580
581 /* Interrupt setup */
582 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
Dominik Brodowski0c7ab672005-06-27 16:28:56 -0700583 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 link->irq.Handler = NULL;
585
586 link->conf.Attributes = 0;
587 link->conf.Vcc = 50;
588 link->conf.IntType = INT_MEMORY_AND_IO;
589
590 /* Register with Card Services */
591 link->next = dev_list;
592 dev_list = link;
593
594 client_reg.dev_info = &dev_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 client_reg.Version = 0x0210;
596 client_reg.event_callback_args.client_data = link;
597
598 ret = pcmcia_register_client(&link->handle, &client_reg);
599 if (ret != CS_SUCCESS) {
600 cs_error(link->handle, RegisterClient, ret);
601 mgslpc_detach(link);
602 return NULL;
603 }
604
605 mgslpc_add_device(info);
606
607 return link;
608}
609
610/* Card has been inserted.
611 */
612
613#define CS_CHECK(fn, ret) \
614do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
615
616static void mgslpc_config(dev_link_t *link)
617{
618 client_handle_t handle = link->handle;
619 MGSLPC_INFO *info = link->priv;
620 tuple_t tuple;
621 cisparse_t parse;
622 int last_fn, last_ret;
623 u_char buf[64];
624 config_info_t conf;
625 cistpl_cftable_entry_t dflt = { 0 };
626 cistpl_cftable_entry_t *cfg;
627
628 if (debug_level >= DEBUG_LEVEL_INFO)
629 printk("mgslpc_config(0x%p)\n", link);
630
631 /* read CONFIG tuple to find its configuration registers */
632 tuple.DesiredTuple = CISTPL_CONFIG;
633 tuple.Attributes = 0;
634 tuple.TupleData = buf;
635 tuple.TupleDataMax = sizeof(buf);
636 tuple.TupleOffset = 0;
637 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
638 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
639 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
640 link->conf.ConfigBase = parse.config.base;
641 link->conf.Present = parse.config.rmask[0];
642
643 /* Configure card */
644 link->state |= DEV_CONFIG;
645
646 /* Look up the current Vcc */
647 CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
648 link->conf.Vcc = conf.Vcc;
649
650 /* get CIS configuration entry */
651
652 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
653 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
654
655 cfg = &(parse.cftable_entry);
656 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
657 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
658
659 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
660 if (cfg->index == 0)
661 goto cs_failed;
662
663 link->conf.ConfigIndex = cfg->index;
664 link->conf.Attributes |= CONF_ENABLE_IRQ;
665
666 /* IO window settings */
667 link->io.NumPorts1 = 0;
668 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
669 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
670 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
671 if (!(io->flags & CISTPL_IO_8BIT))
672 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
673 if (!(io->flags & CISTPL_IO_16BIT))
674 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
675 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
676 link->io.BasePort1 = io->win[0].base;
677 link->io.NumPorts1 = io->win[0].len;
678 CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
679 }
680
681 link->conf.Attributes = CONF_ENABLE_IRQ;
682 link->conf.Vcc = 50;
683 link->conf.IntType = INT_MEMORY_AND_IO;
684 link->conf.ConfigIndex = 8;
685 link->conf.Present = PRESENT_OPTION;
686
687 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
688 link->irq.Handler = mgslpc_isr;
689 link->irq.Instance = info;
690 CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
691
692 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
693
694 info->io_base = link->io.BasePort1;
695 info->irq_level = link->irq.AssignedIRQ;
696
697 /* add to linked list of devices */
698 sprintf(info->node.dev_name, "mgslpc0");
699 info->node.major = info->node.minor = 0;
700 link->dev = &info->node;
701
702 printk(KERN_INFO "%s: index 0x%02x:",
703 info->node.dev_name, link->conf.ConfigIndex);
704 if (link->conf.Attributes & CONF_ENABLE_IRQ)
705 printk(", irq %d", link->irq.AssignedIRQ);
706 if (link->io.NumPorts1)
707 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
708 link->io.BasePort1+link->io.NumPorts1-1);
709 printk("\n");
710
711 link->state &= ~DEV_CONFIG_PENDING;
712 return;
713
714cs_failed:
715 cs_error(link->handle, last_fn, last_ret);
716 mgslpc_release((u_long)link);
717}
718
719/* Card has been removed.
720 * Unregister device and release PCMCIA configuration.
721 * If device is open, postpone until it is closed.
722 */
723static void mgslpc_release(u_long arg)
724{
725 dev_link_t *link = (dev_link_t *)arg;
726
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("mgslpc_release(0x%p)\n", link);
729
730 /* Unlink the device chain */
731 link->dev = NULL;
732 link->state &= ~DEV_CONFIG;
733
734 pcmcia_release_configuration(link->handle);
735 if (link->io.NumPorts1)
736 pcmcia_release_io(link->handle, &link->io);
737 if (link->irq.AssignedIRQ)
738 pcmcia_release_irq(link->handle, &link->irq);
739 if (link->state & DEV_STALE_LINK)
740 mgslpc_detach(link);
741}
742
743static void mgslpc_detach(dev_link_t *link)
744{
745 dev_link_t **linkp;
746
747 if (debug_level >= DEBUG_LEVEL_INFO)
748 printk("mgslpc_detach(0x%p)\n", link);
749
750 /* find device */
751 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
752 if (*linkp == link) break;
753 if (*linkp == NULL)
754 return;
755
756 if (link->state & DEV_CONFIG) {
757 /* device is configured/active, mark it so when
758 * release() is called a proper detach() occurs.
759 */
760 if (debug_level >= DEBUG_LEVEL_INFO)
761 printk(KERN_DEBUG "synclinkpc: detach postponed, '%s' "
762 "still locked\n", link->dev->dev_name);
763 link->state |= DEV_STALE_LINK;
764 return;
765 }
766
767 /* Break the link with Card Services */
768 if (link->handle)
769 pcmcia_deregister_client(link->handle);
770
771 /* Unlink device structure, and free it */
772 *linkp = link->next;
773 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
774}
775
Dominik Brodowski98e4c282005-11-14 21:21:18 +0100776static int mgslpc_suspend(struct pcmcia_device *dev)
777{
778 dev_link_t *link = dev_to_instance(dev);
779 MGSLPC_INFO *info = link->priv;
780
781 link->state |= DEV_SUSPEND;
782 info->stop = 1;
783 if (link->state & DEV_CONFIG)
784 pcmcia_release_configuration(link->handle);
785
786 return 0;
787}
788
789static int mgslpc_resume(struct pcmcia_device *dev)
790{
791 dev_link_t *link = dev_to_instance(dev);
792 MGSLPC_INFO *info = link->priv;
793
794 link->state &= ~DEV_SUSPEND;
795 if (link->state & DEV_CONFIG)
796 pcmcia_request_configuration(link->handle, &link->conf);
797 info->stop = 0;
798
799 return 0;
800}
801
802
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803static int mgslpc_event(event_t event, int priority,
804 event_callback_args_t *args)
805{
806 dev_link_t *link = args->client_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700807
808 if (debug_level >= DEBUG_LEVEL_INFO)
809 printk("mgslpc_event(0x%06x)\n", event);
810
811 switch (event) {
812 case CS_EVENT_CARD_REMOVAL:
813 link->state &= ~DEV_PRESENT;
814 if (link->state & DEV_CONFIG) {
815 ((MGSLPC_INFO *)link->priv)->stop = 1;
816 mgslpc_release((u_long)link);
817 }
818 break;
819 case CS_EVENT_CARD_INSERTION:
820 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
821 mgslpc_config(link);
822 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823 }
824 return 0;
825}
826
827static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
828 char *name, const char *routine)
829{
830#ifdef MGSLPC_PARANOIA_CHECK
831 static const char *badmagic =
832 "Warning: bad magic number for mgsl struct (%s) in %s\n";
833 static const char *badinfo =
834 "Warning: null mgslpc_info for (%s) in %s\n";
835
836 if (!info) {
837 printk(badinfo, name, routine);
838 return 1;
839 }
840 if (info->magic != MGSLPC_MAGIC) {
841 printk(badmagic, name, routine);
842 return 1;
843 }
844#else
845 if (!info)
846 return 1;
847#endif
848 return 0;
849}
850
851
852#define CMD_RXFIFO BIT7 // release current rx FIFO
853#define CMD_RXRESET BIT6 // receiver reset
854#define CMD_RXFIFO_READ BIT5
855#define CMD_START_TIMER BIT4
856#define CMD_TXFIFO BIT3 // release current tx FIFO
857#define CMD_TXEOM BIT1 // transmit end message
858#define CMD_TXRESET BIT0 // transmit reset
859
860static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
861{
862 int i = 0;
863 /* wait for command completion */
864 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
865 udelay(1);
866 if (i++ == 1000)
867 return FALSE;
868 }
869 return TRUE;
870}
871
872static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
873{
874 wait_command_complete(info, channel);
875 write_reg(info, (unsigned char) (channel + CMDR), cmd);
876}
877
878static void tx_pause(struct tty_struct *tty)
879{
880 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
881 unsigned long flags;
882
883 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
884 return;
885 if (debug_level >= DEBUG_LEVEL_INFO)
886 printk("tx_pause(%s)\n",info->device_name);
887
888 spin_lock_irqsave(&info->lock,flags);
889 if (info->tx_enabled)
890 tx_stop(info);
891 spin_unlock_irqrestore(&info->lock,flags);
892}
893
894static void tx_release(struct tty_struct *tty)
895{
896 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
897 unsigned long flags;
898
899 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
900 return;
901 if (debug_level >= DEBUG_LEVEL_INFO)
902 printk("tx_release(%s)\n",info->device_name);
903
904 spin_lock_irqsave(&info->lock,flags);
905 if (!info->tx_enabled)
906 tx_start(info);
907 spin_unlock_irqrestore(&info->lock,flags);
908}
909
910/* Return next bottom half action to perform.
911 * or 0 if nothing to do.
912 */
913static int bh_action(MGSLPC_INFO *info)
914{
915 unsigned long flags;
916 int rc = 0;
917
918 spin_lock_irqsave(&info->lock,flags);
919
920 if (info->pending_bh & BH_RECEIVE) {
921 info->pending_bh &= ~BH_RECEIVE;
922 rc = BH_RECEIVE;
923 } else if (info->pending_bh & BH_TRANSMIT) {
924 info->pending_bh &= ~BH_TRANSMIT;
925 rc = BH_TRANSMIT;
926 } else if (info->pending_bh & BH_STATUS) {
927 info->pending_bh &= ~BH_STATUS;
928 rc = BH_STATUS;
929 }
930
931 if (!rc) {
932 /* Mark BH routine as complete */
933 info->bh_running = 0;
934 info->bh_requested = 0;
935 }
936
937 spin_unlock_irqrestore(&info->lock,flags);
938
939 return rc;
940}
941
942void bh_handler(void* Context)
943{
944 MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
945 int action;
946
947 if (!info)
948 return;
949
950 if (debug_level >= DEBUG_LEVEL_BH)
951 printk( "%s(%d):bh_handler(%s) entry\n",
952 __FILE__,__LINE__,info->device_name);
953
954 info->bh_running = 1;
955
956 while((action = bh_action(info)) != 0) {
957
958 /* Process work item */
959 if ( debug_level >= DEBUG_LEVEL_BH )
960 printk( "%s(%d):bh_handler() work item action=%d\n",
961 __FILE__,__LINE__,action);
962
963 switch (action) {
964
965 case BH_RECEIVE:
966 while(rx_get_frame(info));
967 break;
968 case BH_TRANSMIT:
969 bh_transmit(info);
970 break;
971 case BH_STATUS:
972 bh_status(info);
973 break;
974 default:
975 /* unknown work item ID */
976 printk("Unknown work item ID=%08X!\n", action);
977 break;
978 }
979 }
980
981 if (debug_level >= DEBUG_LEVEL_BH)
982 printk( "%s(%d):bh_handler(%s) exit\n",
983 __FILE__,__LINE__,info->device_name);
984}
985
986void bh_transmit(MGSLPC_INFO *info)
987{
988 struct tty_struct *tty = info->tty;
989 if (debug_level >= DEBUG_LEVEL_BH)
990 printk("bh_transmit() entry on %s\n", info->device_name);
991
992 if (tty) {
993 tty_wakeup(tty);
994 wake_up_interruptible(&tty->write_wait);
995 }
996}
997
998void bh_status(MGSLPC_INFO *info)
999{
1000 info->ri_chkcount = 0;
1001 info->dsr_chkcount = 0;
1002 info->dcd_chkcount = 0;
1003 info->cts_chkcount = 0;
1004}
1005
1006/* eom: non-zero = end of frame */
1007static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
1008{
1009 unsigned char data[2];
1010 unsigned char fifo_count, read_count, i;
1011 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
1012
1013 if (debug_level >= DEBUG_LEVEL_ISR)
1014 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
1015
1016 if (!info->rx_enabled)
1017 return;
1018
1019 if (info->rx_frame_count >= info->rx_buf_count) {
1020 /* no more free buffers */
1021 issue_command(info, CHA, CMD_RXRESET);
1022 info->pending_bh |= BH_RECEIVE;
1023 info->rx_overflow = 1;
1024 info->icount.buf_overrun++;
1025 return;
1026 }
1027
1028 if (eom) {
1029 /* end of frame, get FIFO count from RBCL register */
1030 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
1031 fifo_count = 32;
1032 } else
1033 fifo_count = 32;
1034
1035 do {
1036 if (fifo_count == 1) {
1037 read_count = 1;
1038 data[0] = read_reg(info, CHA + RXFIFO);
1039 } else {
1040 read_count = 2;
1041 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
1042 }
1043 fifo_count -= read_count;
1044 if (!fifo_count && eom)
1045 buf->status = data[--read_count];
1046
1047 for (i = 0; i < read_count; i++) {
1048 if (buf->count >= info->max_frame_size) {
1049 /* frame too large, reset receiver and reset current buffer */
1050 issue_command(info, CHA, CMD_RXRESET);
1051 buf->count = 0;
1052 return;
1053 }
1054 *(buf->data + buf->count) = data[i];
1055 buf->count++;
1056 }
1057 } while (fifo_count);
1058
1059 if (eom) {
1060 info->pending_bh |= BH_RECEIVE;
1061 info->rx_frame_count++;
1062 info->rx_put++;
1063 if (info->rx_put >= info->rx_buf_count)
1064 info->rx_put = 0;
1065 }
1066 issue_command(info, CHA, CMD_RXFIFO);
1067}
1068
1069static void rx_ready_async(MGSLPC_INFO *info, int tcd)
1070{
1071 unsigned char data, status;
1072 int fifo_count;
1073 struct tty_struct *tty = info->tty;
1074 struct mgsl_icount *icount = &info->icount;
1075
1076 if (tcd) {
1077 /* early termination, get FIFO count from RBCL register */
1078 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
1079
1080 /* Zero fifo count could mean 0 or 32 bytes available.
1081 * If BIT5 of STAR is set then at least 1 byte is available.
1082 */
1083 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
1084 fifo_count = 32;
1085 } else
1086 fifo_count = 32;
1087
1088 /* Flush received async data to receive data buffer. */
1089 while (fifo_count) {
1090 data = read_reg(info, CHA + RXFIFO);
1091 status = read_reg(info, CHA + RXFIFO);
1092 fifo_count -= 2;
1093
1094 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
1095 break;
1096
1097 *tty->flip.char_buf_ptr = data;
1098 icount->rx++;
1099
1100 *tty->flip.flag_buf_ptr = 0;
1101
1102 // if no frameing/crc error then save data
1103 // BIT7:parity error
1104 // BIT6:framing error
1105
1106 if (status & (BIT7 + BIT6)) {
1107 if (status & BIT7)
1108 icount->parity++;
1109 else
1110 icount->frame++;
1111
1112 /* discard char if tty control flags say so */
1113 if (status & info->ignore_status_mask)
1114 continue;
1115
1116 status &= info->read_status_mask;
1117
1118 if (status & BIT7)
1119 *tty->flip.flag_buf_ptr = TTY_PARITY;
1120 else if (status & BIT6)
1121 *tty->flip.flag_buf_ptr = TTY_FRAME;
1122 }
1123
1124 tty->flip.flag_buf_ptr++;
1125 tty->flip.char_buf_ptr++;
1126 tty->flip.count++;
1127 }
1128 issue_command(info, CHA, CMD_RXFIFO);
1129
1130 if (debug_level >= DEBUG_LEVEL_ISR) {
1131 printk("%s(%d):rx_ready_async count=%d\n",
1132 __FILE__,__LINE__,tty->flip.count);
1133 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1134 __FILE__,__LINE__,icount->rx,icount->brk,
1135 icount->parity,icount->frame,icount->overrun);
1136 }
1137
1138 if (tty->flip.count)
1139 tty_flip_buffer_push(tty);
1140}
1141
1142
1143static void tx_done(MGSLPC_INFO *info)
1144{
1145 if (!info->tx_active)
1146 return;
1147
1148 info->tx_active = 0;
1149 info->tx_aborting = 0;
1150
1151 if (info->params.mode == MGSL_MODE_ASYNC)
1152 return;
1153
1154 info->tx_count = info->tx_put = info->tx_get = 0;
1155 del_timer(&info->tx_timer);
1156
1157 if (info->drop_rts_on_tx_done) {
1158 get_signals(info);
1159 if (info->serial_signals & SerialSignal_RTS) {
1160 info->serial_signals &= ~SerialSignal_RTS;
1161 set_signals(info);
1162 }
1163 info->drop_rts_on_tx_done = 0;
1164 }
1165
1166#ifdef CONFIG_HDLC
1167 if (info->netcount)
1168 hdlcdev_tx_done(info);
1169 else
1170#endif
1171 {
1172 if (info->tty->stopped || info->tty->hw_stopped) {
1173 tx_stop(info);
1174 return;
1175 }
1176 info->pending_bh |= BH_TRANSMIT;
1177 }
1178}
1179
1180static void tx_ready(MGSLPC_INFO *info)
1181{
1182 unsigned char fifo_count = 32;
1183 int c;
1184
1185 if (debug_level >= DEBUG_LEVEL_ISR)
1186 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1187
1188 if (info->params.mode == MGSL_MODE_HDLC) {
1189 if (!info->tx_active)
1190 return;
1191 } else {
1192 if (info->tty->stopped || info->tty->hw_stopped) {
1193 tx_stop(info);
1194 return;
1195 }
1196 if (!info->tx_count)
1197 info->tx_active = 0;
1198 }
1199
1200 if (!info->tx_count)
1201 return;
1202
1203 while (info->tx_count && fifo_count) {
1204 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1205
1206 if (c == 1) {
1207 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1208 } else {
1209 write_reg16(info, CHA + TXFIFO,
1210 *((unsigned short*)(info->tx_buf + info->tx_get)));
1211 }
1212 info->tx_count -= c;
1213 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1214 fifo_count -= c;
1215 }
1216
1217 if (info->params.mode == MGSL_MODE_ASYNC) {
1218 if (info->tx_count < WAKEUP_CHARS)
1219 info->pending_bh |= BH_TRANSMIT;
1220 issue_command(info, CHA, CMD_TXFIFO);
1221 } else {
1222 if (info->tx_count)
1223 issue_command(info, CHA, CMD_TXFIFO);
1224 else
1225 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1226 }
1227}
1228
1229static void cts_change(MGSLPC_INFO *info)
1230{
1231 get_signals(info);
1232 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1233 irq_disable(info, CHB, IRQ_CTS);
1234 info->icount.cts++;
1235 if (info->serial_signals & SerialSignal_CTS)
1236 info->input_signal_events.cts_up++;
1237 else
1238 info->input_signal_events.cts_down++;
1239 wake_up_interruptible(&info->status_event_wait_q);
1240 wake_up_interruptible(&info->event_wait_q);
1241
1242 if (info->flags & ASYNC_CTS_FLOW) {
1243 if (info->tty->hw_stopped) {
1244 if (info->serial_signals & SerialSignal_CTS) {
1245 if (debug_level >= DEBUG_LEVEL_ISR)
1246 printk("CTS tx start...");
1247 if (info->tty)
1248 info->tty->hw_stopped = 0;
1249 tx_start(info);
1250 info->pending_bh |= BH_TRANSMIT;
1251 return;
1252 }
1253 } else {
1254 if (!(info->serial_signals & SerialSignal_CTS)) {
1255 if (debug_level >= DEBUG_LEVEL_ISR)
1256 printk("CTS tx stop...");
1257 if (info->tty)
1258 info->tty->hw_stopped = 1;
1259 tx_stop(info);
1260 }
1261 }
1262 }
1263 info->pending_bh |= BH_STATUS;
1264}
1265
1266static void dcd_change(MGSLPC_INFO *info)
1267{
1268 get_signals(info);
1269 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1270 irq_disable(info, CHB, IRQ_DCD);
1271 info->icount.dcd++;
1272 if (info->serial_signals & SerialSignal_DCD) {
1273 info->input_signal_events.dcd_up++;
1274 }
1275 else
1276 info->input_signal_events.dcd_down++;
1277#ifdef CONFIG_HDLC
1278 if (info->netcount)
1279 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
1280#endif
1281 wake_up_interruptible(&info->status_event_wait_q);
1282 wake_up_interruptible(&info->event_wait_q);
1283
1284 if (info->flags & ASYNC_CHECK_CD) {
1285 if (debug_level >= DEBUG_LEVEL_ISR)
1286 printk("%s CD now %s...", info->device_name,
1287 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1288 if (info->serial_signals & SerialSignal_DCD)
1289 wake_up_interruptible(&info->open_wait);
1290 else {
1291 if (debug_level >= DEBUG_LEVEL_ISR)
1292 printk("doing serial hangup...");
1293 if (info->tty)
1294 tty_hangup(info->tty);
1295 }
1296 }
1297 info->pending_bh |= BH_STATUS;
1298}
1299
1300static void dsr_change(MGSLPC_INFO *info)
1301{
1302 get_signals(info);
1303 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1304 port_irq_disable(info, PVR_DSR);
1305 info->icount.dsr++;
1306 if (info->serial_signals & SerialSignal_DSR)
1307 info->input_signal_events.dsr_up++;
1308 else
1309 info->input_signal_events.dsr_down++;
1310 wake_up_interruptible(&info->status_event_wait_q);
1311 wake_up_interruptible(&info->event_wait_q);
1312 info->pending_bh |= BH_STATUS;
1313}
1314
1315static void ri_change(MGSLPC_INFO *info)
1316{
1317 get_signals(info);
1318 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1319 port_irq_disable(info, PVR_RI);
1320 info->icount.rng++;
1321 if (info->serial_signals & SerialSignal_RI)
1322 info->input_signal_events.ri_up++;
1323 else
1324 info->input_signal_events.ri_down++;
1325 wake_up_interruptible(&info->status_event_wait_q);
1326 wake_up_interruptible(&info->event_wait_q);
1327 info->pending_bh |= BH_STATUS;
1328}
1329
1330/* Interrupt service routine entry point.
1331 *
1332 * Arguments:
1333 *
1334 * irq interrupt number that caused interrupt
1335 * dev_id device ID supplied during interrupt registration
1336 * regs interrupted processor context
1337 */
1338static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1339{
1340 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1341 unsigned short isr;
1342 unsigned char gis, pis;
1343 int count=0;
1344
1345 if (debug_level >= DEBUG_LEVEL_ISR)
1346 printk("mgslpc_isr(%d) entry.\n", irq);
1347 if (!info)
1348 return IRQ_NONE;
1349
1350 if (!(info->link.state & DEV_CONFIG))
1351 return IRQ_HANDLED;
1352
1353 spin_lock(&info->lock);
1354
1355 while ((gis = read_reg(info, CHA + GIS))) {
1356 if (debug_level >= DEBUG_LEVEL_ISR)
1357 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1358
1359 if ((gis & 0x70) || count > 1000) {
1360 printk("synclink_cs:hardware failed or ejected\n");
1361 break;
1362 }
1363 count++;
1364
1365 if (gis & (BIT1 + BIT0)) {
1366 isr = read_reg16(info, CHB + ISR);
1367 if (isr & IRQ_DCD)
1368 dcd_change(info);
1369 if (isr & IRQ_CTS)
1370 cts_change(info);
1371 }
1372 if (gis & (BIT3 + BIT2))
1373 {
1374 isr = read_reg16(info, CHA + ISR);
1375 if (isr & IRQ_TIMER) {
1376 info->irq_occurred = 1;
1377 irq_disable(info, CHA, IRQ_TIMER);
1378 }
1379
1380 /* receive IRQs */
1381 if (isr & IRQ_EXITHUNT) {
1382 info->icount.exithunt++;
1383 wake_up_interruptible(&info->event_wait_q);
1384 }
1385 if (isr & IRQ_BREAK_ON) {
1386 info->icount.brk++;
1387 if (info->flags & ASYNC_SAK)
1388 do_SAK(info->tty);
1389 }
1390 if (isr & IRQ_RXTIME) {
1391 issue_command(info, CHA, CMD_RXFIFO_READ);
1392 }
1393 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1394 if (info->params.mode == MGSL_MODE_HDLC)
1395 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1396 else
1397 rx_ready_async(info, isr & IRQ_RXEOM);
1398 }
1399
1400 /* transmit IRQs */
1401 if (isr & IRQ_UNDERRUN) {
1402 if (info->tx_aborting)
1403 info->icount.txabort++;
1404 else
1405 info->icount.txunder++;
1406 tx_done(info);
1407 }
1408 else if (isr & IRQ_ALLSENT) {
1409 info->icount.txok++;
1410 tx_done(info);
1411 }
1412 else if (isr & IRQ_TXFIFO)
1413 tx_ready(info);
1414 }
1415 if (gis & BIT7) {
1416 pis = read_reg(info, CHA + PIS);
1417 if (pis & BIT1)
1418 dsr_change(info);
1419 if (pis & BIT2)
1420 ri_change(info);
1421 }
1422 }
1423
1424 /* Request bottom half processing if there's something
1425 * for it to do and the bh is not already running
1426 */
1427
1428 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1429 if ( debug_level >= DEBUG_LEVEL_ISR )
1430 printk("%s(%d):%s queueing bh task.\n",
1431 __FILE__,__LINE__,info->device_name);
1432 schedule_work(&info->task);
1433 info->bh_requested = 1;
1434 }
1435
1436 spin_unlock(&info->lock);
1437
1438 if (debug_level >= DEBUG_LEVEL_ISR)
1439 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1440 __FILE__,__LINE__,irq);
1441
1442 return IRQ_HANDLED;
1443}
1444
1445/* Initialize and start device.
1446 */
1447static int startup(MGSLPC_INFO * info)
1448{
1449 int retval = 0;
1450
1451 if (debug_level >= DEBUG_LEVEL_INFO)
1452 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1453
1454 if (info->flags & ASYNC_INITIALIZED)
1455 return 0;
1456
1457 if (!info->tx_buf) {
1458 /* allocate a page of memory for a transmit buffer */
1459 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1460 if (!info->tx_buf) {
1461 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1462 __FILE__,__LINE__,info->device_name);
1463 return -ENOMEM;
1464 }
1465 }
1466
1467 info->pending_bh = 0;
1468
Paul Fulghuma7482a22005-09-10 00:26:07 -07001469 memset(&info->icount, 0, sizeof(info->icount));
1470
Linus Torvalds1da177e2005-04-16 15:20:36 -07001471 init_timer(&info->tx_timer);
1472 info->tx_timer.data = (unsigned long)info;
1473 info->tx_timer.function = tx_timeout;
1474
1475 /* Allocate and claim adapter resources */
1476 retval = claim_resources(info);
1477
1478 /* perform existance check and diagnostics */
1479 if ( !retval )
1480 retval = adapter_test(info);
1481
1482 if ( retval ) {
1483 if (capable(CAP_SYS_ADMIN) && info->tty)
1484 set_bit(TTY_IO_ERROR, &info->tty->flags);
1485 release_resources(info);
1486 return retval;
1487 }
1488
1489 /* program hardware for current parameters */
1490 mgslpc_change_params(info);
1491
1492 if (info->tty)
1493 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1494
1495 info->flags |= ASYNC_INITIALIZED;
1496
1497 return 0;
1498}
1499
1500/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1501 */
1502static void shutdown(MGSLPC_INFO * info)
1503{
1504 unsigned long flags;
1505
1506 if (!(info->flags & ASYNC_INITIALIZED))
1507 return;
1508
1509 if (debug_level >= DEBUG_LEVEL_INFO)
1510 printk("%s(%d):mgslpc_shutdown(%s)\n",
1511 __FILE__,__LINE__, info->device_name );
1512
1513 /* clear status wait queue because status changes */
1514 /* can't happen after shutting down the hardware */
1515 wake_up_interruptible(&info->status_event_wait_q);
1516 wake_up_interruptible(&info->event_wait_q);
1517
1518 del_timer(&info->tx_timer);
1519
1520 if (info->tx_buf) {
1521 free_page((unsigned long) info->tx_buf);
1522 info->tx_buf = NULL;
1523 }
1524
1525 spin_lock_irqsave(&info->lock,flags);
1526
1527 rx_stop(info);
1528 tx_stop(info);
1529
1530 /* TODO:disable interrupts instead of reset to preserve signal states */
1531 reset_device(info);
1532
1533 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1534 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1535 set_signals(info);
1536 }
1537
1538 spin_unlock_irqrestore(&info->lock,flags);
1539
1540 release_resources(info);
1541
1542 if (info->tty)
1543 set_bit(TTY_IO_ERROR, &info->tty->flags);
1544
1545 info->flags &= ~ASYNC_INITIALIZED;
1546}
1547
1548static void mgslpc_program_hw(MGSLPC_INFO *info)
1549{
1550 unsigned long flags;
1551
1552 spin_lock_irqsave(&info->lock,flags);
1553
1554 rx_stop(info);
1555 tx_stop(info);
1556 info->tx_count = info->tx_put = info->tx_get = 0;
1557
1558 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1559 hdlc_mode(info);
1560 else
1561 async_mode(info);
1562
1563 set_signals(info);
1564
1565 info->dcd_chkcount = 0;
1566 info->cts_chkcount = 0;
1567 info->ri_chkcount = 0;
1568 info->dsr_chkcount = 0;
1569
1570 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1571 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1572 get_signals(info);
1573
1574 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1575 rx_start(info);
1576
1577 spin_unlock_irqrestore(&info->lock,flags);
1578}
1579
1580/* Reconfigure adapter based on new parameters
1581 */
1582static void mgslpc_change_params(MGSLPC_INFO *info)
1583{
1584 unsigned cflag;
1585 int bits_per_char;
1586
1587 if (!info->tty || !info->tty->termios)
1588 return;
1589
1590 if (debug_level >= DEBUG_LEVEL_INFO)
1591 printk("%s(%d):mgslpc_change_params(%s)\n",
1592 __FILE__,__LINE__, info->device_name );
1593
1594 cflag = info->tty->termios->c_cflag;
1595
1596 /* if B0 rate (hangup) specified then negate DTR and RTS */
1597 /* otherwise assert DTR and RTS */
1598 if (cflag & CBAUD)
1599 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1600 else
1601 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1602
1603 /* byte size and parity */
1604
1605 switch (cflag & CSIZE) {
1606 case CS5: info->params.data_bits = 5; break;
1607 case CS6: info->params.data_bits = 6; break;
1608 case CS7: info->params.data_bits = 7; break;
1609 case CS8: info->params.data_bits = 8; break;
1610 default: info->params.data_bits = 7; break;
1611 }
1612
1613 if (cflag & CSTOPB)
1614 info->params.stop_bits = 2;
1615 else
1616 info->params.stop_bits = 1;
1617
1618 info->params.parity = ASYNC_PARITY_NONE;
1619 if (cflag & PARENB) {
1620 if (cflag & PARODD)
1621 info->params.parity = ASYNC_PARITY_ODD;
1622 else
1623 info->params.parity = ASYNC_PARITY_EVEN;
1624#ifdef CMSPAR
1625 if (cflag & CMSPAR)
1626 info->params.parity = ASYNC_PARITY_SPACE;
1627#endif
1628 }
1629
1630 /* calculate number of jiffies to transmit a full
1631 * FIFO (32 bytes) at specified data rate
1632 */
1633 bits_per_char = info->params.data_bits +
1634 info->params.stop_bits + 1;
1635
1636 /* if port data rate is set to 460800 or less then
1637 * allow tty settings to override, otherwise keep the
1638 * current data rate.
1639 */
1640 if (info->params.data_rate <= 460800) {
1641 info->params.data_rate = tty_get_baud_rate(info->tty);
1642 }
1643
1644 if ( info->params.data_rate ) {
1645 info->timeout = (32*HZ*bits_per_char) /
1646 info->params.data_rate;
1647 }
1648 info->timeout += HZ/50; /* Add .02 seconds of slop */
1649
1650 if (cflag & CRTSCTS)
1651 info->flags |= ASYNC_CTS_FLOW;
1652 else
1653 info->flags &= ~ASYNC_CTS_FLOW;
1654
1655 if (cflag & CLOCAL)
1656 info->flags &= ~ASYNC_CHECK_CD;
1657 else
1658 info->flags |= ASYNC_CHECK_CD;
1659
1660 /* process tty input control flags */
1661
1662 info->read_status_mask = 0;
1663 if (I_INPCK(info->tty))
1664 info->read_status_mask |= BIT7 | BIT6;
1665 if (I_IGNPAR(info->tty))
1666 info->ignore_status_mask |= BIT7 | BIT6;
1667
1668 mgslpc_program_hw(info);
1669}
1670
1671/* Add a character to the transmit buffer
1672 */
1673static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1674{
1675 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1676 unsigned long flags;
1677
1678 if (debug_level >= DEBUG_LEVEL_INFO) {
1679 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1680 __FILE__,__LINE__,ch,info->device_name);
1681 }
1682
1683 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1684 return;
1685
1686 if (!tty || !info->tx_buf)
1687 return;
1688
1689 spin_lock_irqsave(&info->lock,flags);
1690
1691 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1692 if (info->tx_count < TXBUFSIZE - 1) {
1693 info->tx_buf[info->tx_put++] = ch;
1694 info->tx_put &= TXBUFSIZE-1;
1695 info->tx_count++;
1696 }
1697 }
1698
1699 spin_unlock_irqrestore(&info->lock,flags);
1700}
1701
1702/* Enable transmitter so remaining characters in the
1703 * transmit buffer are sent.
1704 */
1705static void mgslpc_flush_chars(struct tty_struct *tty)
1706{
1707 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1708 unsigned long flags;
1709
1710 if (debug_level >= DEBUG_LEVEL_INFO)
1711 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1712 __FILE__,__LINE__,info->device_name,info->tx_count);
1713
1714 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1715 return;
1716
1717 if (info->tx_count <= 0 || tty->stopped ||
1718 tty->hw_stopped || !info->tx_buf)
1719 return;
1720
1721 if (debug_level >= DEBUG_LEVEL_INFO)
1722 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1723 __FILE__,__LINE__,info->device_name);
1724
1725 spin_lock_irqsave(&info->lock,flags);
1726 if (!info->tx_active)
1727 tx_start(info);
1728 spin_unlock_irqrestore(&info->lock,flags);
1729}
1730
1731/* Send a block of data
1732 *
1733 * Arguments:
1734 *
1735 * tty pointer to tty information structure
1736 * buf pointer to buffer containing send data
1737 * count size of send data in bytes
1738 *
1739 * Returns: number of characters written
1740 */
1741static int mgslpc_write(struct tty_struct * tty,
1742 const unsigned char *buf, int count)
1743{
1744 int c, ret = 0;
1745 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1746 unsigned long flags;
1747
1748 if (debug_level >= DEBUG_LEVEL_INFO)
1749 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1750 __FILE__,__LINE__,info->device_name,count);
1751
1752 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1753 !tty || !info->tx_buf)
1754 goto cleanup;
1755
1756 if (info->params.mode == MGSL_MODE_HDLC) {
1757 if (count > TXBUFSIZE) {
1758 ret = -EIO;
1759 goto cleanup;
1760 }
1761 if (info->tx_active)
1762 goto cleanup;
1763 else if (info->tx_count)
1764 goto start;
1765 }
1766
1767 for (;;) {
1768 c = min(count,
1769 min(TXBUFSIZE - info->tx_count - 1,
1770 TXBUFSIZE - info->tx_put));
1771 if (c <= 0)
1772 break;
1773
1774 memcpy(info->tx_buf + info->tx_put, buf, c);
1775
1776 spin_lock_irqsave(&info->lock,flags);
1777 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1778 info->tx_count += c;
1779 spin_unlock_irqrestore(&info->lock,flags);
1780
1781 buf += c;
1782 count -= c;
1783 ret += c;
1784 }
1785start:
1786 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1787 spin_lock_irqsave(&info->lock,flags);
1788 if (!info->tx_active)
1789 tx_start(info);
1790 spin_unlock_irqrestore(&info->lock,flags);
1791 }
1792cleanup:
1793 if (debug_level >= DEBUG_LEVEL_INFO)
1794 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1795 __FILE__,__LINE__,info->device_name,ret);
1796 return ret;
1797}
1798
1799/* Return the count of free bytes in transmit buffer
1800 */
1801static int mgslpc_write_room(struct tty_struct *tty)
1802{
1803 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1804 int ret;
1805
1806 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1807 return 0;
1808
1809 if (info->params.mode == MGSL_MODE_HDLC) {
1810 /* HDLC (frame oriented) mode */
1811 if (info->tx_active)
1812 return 0;
1813 else
1814 return HDLC_MAX_FRAME_SIZE;
1815 } else {
1816 ret = TXBUFSIZE - info->tx_count - 1;
1817 if (ret < 0)
1818 ret = 0;
1819 }
1820
1821 if (debug_level >= DEBUG_LEVEL_INFO)
1822 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1823 __FILE__,__LINE__, info->device_name, ret);
1824 return ret;
1825}
1826
1827/* Return the count of bytes in transmit buffer
1828 */
1829static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1830{
1831 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1832 int rc;
1833
1834 if (debug_level >= DEBUG_LEVEL_INFO)
1835 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1836 __FILE__,__LINE__, info->device_name );
1837
1838 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1839 return 0;
1840
1841 if (info->params.mode == MGSL_MODE_HDLC)
1842 rc = info->tx_active ? info->max_frame_size : 0;
1843 else
1844 rc = info->tx_count;
1845
1846 if (debug_level >= DEBUG_LEVEL_INFO)
1847 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1848 __FILE__,__LINE__, info->device_name, rc);
1849
1850 return rc;
1851}
1852
1853/* Discard all data in the send buffer
1854 */
1855static void mgslpc_flush_buffer(struct tty_struct *tty)
1856{
1857 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1858 unsigned long flags;
1859
1860 if (debug_level >= DEBUG_LEVEL_INFO)
1861 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1862 __FILE__,__LINE__, info->device_name );
1863
1864 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1865 return;
1866
1867 spin_lock_irqsave(&info->lock,flags);
1868 info->tx_count = info->tx_put = info->tx_get = 0;
1869 del_timer(&info->tx_timer);
1870 spin_unlock_irqrestore(&info->lock,flags);
1871
1872 wake_up_interruptible(&tty->write_wait);
1873 tty_wakeup(tty);
1874}
1875
1876/* Send a high-priority XON/XOFF character
1877 */
1878static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1879{
1880 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1881 unsigned long flags;
1882
1883 if (debug_level >= DEBUG_LEVEL_INFO)
1884 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1885 __FILE__,__LINE__, info->device_name, ch );
1886
1887 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1888 return;
1889
1890 info->x_char = ch;
1891 if (ch) {
1892 spin_lock_irqsave(&info->lock,flags);
1893 if (!info->tx_enabled)
1894 tx_start(info);
1895 spin_unlock_irqrestore(&info->lock,flags);
1896 }
1897}
1898
1899/* Signal remote device to throttle send data (our receive data)
1900 */
1901static void mgslpc_throttle(struct tty_struct * tty)
1902{
1903 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1904 unsigned long flags;
1905
1906 if (debug_level >= DEBUG_LEVEL_INFO)
1907 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1908 __FILE__,__LINE__, info->device_name );
1909
1910 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1911 return;
1912
1913 if (I_IXOFF(tty))
1914 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1915
1916 if (tty->termios->c_cflag & CRTSCTS) {
1917 spin_lock_irqsave(&info->lock,flags);
1918 info->serial_signals &= ~SerialSignal_RTS;
1919 set_signals(info);
1920 spin_unlock_irqrestore(&info->lock,flags);
1921 }
1922}
1923
1924/* Signal remote device to stop throttling send data (our receive data)
1925 */
1926static void mgslpc_unthrottle(struct tty_struct * tty)
1927{
1928 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1929 unsigned long flags;
1930
1931 if (debug_level >= DEBUG_LEVEL_INFO)
1932 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1933 __FILE__,__LINE__, info->device_name );
1934
1935 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1936 return;
1937
1938 if (I_IXOFF(tty)) {
1939 if (info->x_char)
1940 info->x_char = 0;
1941 else
1942 mgslpc_send_xchar(tty, START_CHAR(tty));
1943 }
1944
1945 if (tty->termios->c_cflag & CRTSCTS) {
1946 spin_lock_irqsave(&info->lock,flags);
1947 info->serial_signals |= SerialSignal_RTS;
1948 set_signals(info);
1949 spin_unlock_irqrestore(&info->lock,flags);
1950 }
1951}
1952
1953/* get the current serial statistics
1954 */
1955static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1956{
1957 int err;
1958 if (debug_level >= DEBUG_LEVEL_INFO)
1959 printk("get_params(%s)\n", info->device_name);
Paul Fulghuma7482a22005-09-10 00:26:07 -07001960 if (!user_icount) {
1961 memset(&info->icount, 0, sizeof(info->icount));
1962 } else {
1963 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1964 if (err)
1965 return -EFAULT;
1966 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001967 return 0;
1968}
1969
1970/* get the current serial parameters
1971 */
1972static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1973{
1974 int err;
1975 if (debug_level >= DEBUG_LEVEL_INFO)
1976 printk("get_params(%s)\n", info->device_name);
1977 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1978 if (err)
1979 return -EFAULT;
1980 return 0;
1981}
1982
1983/* set the serial parameters
1984 *
1985 * Arguments:
1986 *
1987 * info pointer to device instance data
1988 * new_params user buffer containing new serial params
1989 *
1990 * Returns: 0 if success, otherwise error code
1991 */
1992static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1993{
1994 unsigned long flags;
1995 MGSL_PARAMS tmp_params;
1996 int err;
1997
1998 if (debug_level >= DEBUG_LEVEL_INFO)
1999 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
2000 info->device_name );
2001 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
2002 if (err) {
2003 if ( debug_level >= DEBUG_LEVEL_INFO )
2004 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
2005 __FILE__,__LINE__,info->device_name);
2006 return -EFAULT;
2007 }
2008
2009 spin_lock_irqsave(&info->lock,flags);
2010 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
2011 spin_unlock_irqrestore(&info->lock,flags);
2012
2013 mgslpc_change_params(info);
2014
2015 return 0;
2016}
2017
2018static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
2019{
2020 int err;
2021 if (debug_level >= DEBUG_LEVEL_INFO)
2022 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
2023 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2024 if (err)
2025 return -EFAULT;
2026 return 0;
2027}
2028
2029static int set_txidle(MGSLPC_INFO * info, int idle_mode)
2030{
2031 unsigned long flags;
2032 if (debug_level >= DEBUG_LEVEL_INFO)
2033 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
2034 spin_lock_irqsave(&info->lock,flags);
2035 info->idle_mode = idle_mode;
2036 tx_set_idle(info);
2037 spin_unlock_irqrestore(&info->lock,flags);
2038 return 0;
2039}
2040
2041static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
2042{
2043 int err;
2044 if (debug_level >= DEBUG_LEVEL_INFO)
2045 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
2046 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
2047 if (err)
2048 return -EFAULT;
2049 return 0;
2050}
2051
2052static int set_interface(MGSLPC_INFO * info, int if_mode)
2053{
2054 unsigned long flags;
2055 unsigned char val;
2056 if (debug_level >= DEBUG_LEVEL_INFO)
2057 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
2058 spin_lock_irqsave(&info->lock,flags);
2059 info->if_mode = if_mode;
2060
2061 val = read_reg(info, PVR) & 0x0f;
2062 switch (info->if_mode)
2063 {
2064 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
2065 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
2066 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
2067 }
2068 write_reg(info, PVR, val);
2069
2070 spin_unlock_irqrestore(&info->lock,flags);
2071 return 0;
2072}
2073
2074static int set_txenable(MGSLPC_INFO * info, int enable)
2075{
2076 unsigned long flags;
2077
2078 if (debug_level >= DEBUG_LEVEL_INFO)
2079 printk("set_txenable(%s,%d)\n", info->device_name, enable);
2080
2081 spin_lock_irqsave(&info->lock,flags);
2082 if (enable) {
2083 if (!info->tx_enabled)
2084 tx_start(info);
2085 } else {
2086 if (info->tx_enabled)
2087 tx_stop(info);
2088 }
2089 spin_unlock_irqrestore(&info->lock,flags);
2090 return 0;
2091}
2092
2093static int tx_abort(MGSLPC_INFO * info)
2094{
2095 unsigned long flags;
2096
2097 if (debug_level >= DEBUG_LEVEL_INFO)
2098 printk("tx_abort(%s)\n", info->device_name);
2099
2100 spin_lock_irqsave(&info->lock,flags);
2101 if (info->tx_active && info->tx_count &&
2102 info->params.mode == MGSL_MODE_HDLC) {
2103 /* clear data count so FIFO is not filled on next IRQ.
2104 * This results in underrun and abort transmission.
2105 */
2106 info->tx_count = info->tx_put = info->tx_get = 0;
2107 info->tx_aborting = TRUE;
2108 }
2109 spin_unlock_irqrestore(&info->lock,flags);
2110 return 0;
2111}
2112
2113static int set_rxenable(MGSLPC_INFO * info, int enable)
2114{
2115 unsigned long flags;
2116
2117 if (debug_level >= DEBUG_LEVEL_INFO)
2118 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2119
2120 spin_lock_irqsave(&info->lock,flags);
2121 if (enable) {
2122 if (!info->rx_enabled)
2123 rx_start(info);
2124 } else {
2125 if (info->rx_enabled)
2126 rx_stop(info);
2127 }
2128 spin_unlock_irqrestore(&info->lock,flags);
2129 return 0;
2130}
2131
2132/* wait for specified event to occur
2133 *
2134 * Arguments: info pointer to device instance data
2135 * mask pointer to bitmask of events to wait for
2136 * Return Value: 0 if successful and bit mask updated with
2137 * of events triggerred,
2138 * otherwise error code
2139 */
2140static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2141{
2142 unsigned long flags;
2143 int s;
2144 int rc=0;
2145 struct mgsl_icount cprev, cnow;
2146 int events;
2147 int mask;
2148 struct _input_signal_events oldsigs, newsigs;
2149 DECLARE_WAITQUEUE(wait, current);
2150
2151 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2152 if (rc)
2153 return -EFAULT;
2154
2155 if (debug_level >= DEBUG_LEVEL_INFO)
2156 printk("wait_events(%s,%d)\n", info->device_name, mask);
2157
2158 spin_lock_irqsave(&info->lock,flags);
2159
2160 /* return immediately if state matches requested events */
2161 get_signals(info);
2162 s = info->serial_signals;
2163 events = mask &
2164 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2165 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2166 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2167 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2168 if (events) {
2169 spin_unlock_irqrestore(&info->lock,flags);
2170 goto exit;
2171 }
2172
2173 /* save current irq counts */
2174 cprev = info->icount;
2175 oldsigs = info->input_signal_events;
2176
2177 if ((info->params.mode == MGSL_MODE_HDLC) &&
2178 (mask & MgslEvent_ExitHuntMode))
2179 irq_enable(info, CHA, IRQ_EXITHUNT);
2180
2181 set_current_state(TASK_INTERRUPTIBLE);
2182 add_wait_queue(&info->event_wait_q, &wait);
2183
2184 spin_unlock_irqrestore(&info->lock,flags);
2185
2186
2187 for(;;) {
2188 schedule();
2189 if (signal_pending(current)) {
2190 rc = -ERESTARTSYS;
2191 break;
2192 }
2193
2194 /* get current irq counts */
2195 spin_lock_irqsave(&info->lock,flags);
2196 cnow = info->icount;
2197 newsigs = info->input_signal_events;
2198 set_current_state(TASK_INTERRUPTIBLE);
2199 spin_unlock_irqrestore(&info->lock,flags);
2200
2201 /* if no change, wait aborted for some reason */
2202 if (newsigs.dsr_up == oldsigs.dsr_up &&
2203 newsigs.dsr_down == oldsigs.dsr_down &&
2204 newsigs.dcd_up == oldsigs.dcd_up &&
2205 newsigs.dcd_down == oldsigs.dcd_down &&
2206 newsigs.cts_up == oldsigs.cts_up &&
2207 newsigs.cts_down == oldsigs.cts_down &&
2208 newsigs.ri_up == oldsigs.ri_up &&
2209 newsigs.ri_down == oldsigs.ri_down &&
2210 cnow.exithunt == cprev.exithunt &&
2211 cnow.rxidle == cprev.rxidle) {
2212 rc = -EIO;
2213 break;
2214 }
2215
2216 events = mask &
2217 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2218 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2219 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2220 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2221 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2222 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2223 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2224 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2225 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2226 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2227 if (events)
2228 break;
2229
2230 cprev = cnow;
2231 oldsigs = newsigs;
2232 }
2233
2234 remove_wait_queue(&info->event_wait_q, &wait);
2235 set_current_state(TASK_RUNNING);
2236
2237 if (mask & MgslEvent_ExitHuntMode) {
2238 spin_lock_irqsave(&info->lock,flags);
2239 if (!waitqueue_active(&info->event_wait_q))
2240 irq_disable(info, CHA, IRQ_EXITHUNT);
2241 spin_unlock_irqrestore(&info->lock,flags);
2242 }
2243exit:
2244 if (rc == 0)
2245 PUT_USER(rc, events, mask_ptr);
2246 return rc;
2247}
2248
2249static int modem_input_wait(MGSLPC_INFO *info,int arg)
2250{
2251 unsigned long flags;
2252 int rc;
2253 struct mgsl_icount cprev, cnow;
2254 DECLARE_WAITQUEUE(wait, current);
2255
2256 /* save current irq counts */
2257 spin_lock_irqsave(&info->lock,flags);
2258 cprev = info->icount;
2259 add_wait_queue(&info->status_event_wait_q, &wait);
2260 set_current_state(TASK_INTERRUPTIBLE);
2261 spin_unlock_irqrestore(&info->lock,flags);
2262
2263 for(;;) {
2264 schedule();
2265 if (signal_pending(current)) {
2266 rc = -ERESTARTSYS;
2267 break;
2268 }
2269
2270 /* get new irq counts */
2271 spin_lock_irqsave(&info->lock,flags);
2272 cnow = info->icount;
2273 set_current_state(TASK_INTERRUPTIBLE);
2274 spin_unlock_irqrestore(&info->lock,flags);
2275
2276 /* if no change, wait aborted for some reason */
2277 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2278 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2279 rc = -EIO;
2280 break;
2281 }
2282
2283 /* check for change in caller specified modem input */
2284 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2285 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2286 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2287 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2288 rc = 0;
2289 break;
2290 }
2291
2292 cprev = cnow;
2293 }
2294 remove_wait_queue(&info->status_event_wait_q, &wait);
2295 set_current_state(TASK_RUNNING);
2296 return rc;
2297}
2298
2299/* return the state of the serial control and status signals
2300 */
2301static int tiocmget(struct tty_struct *tty, struct file *file)
2302{
2303 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2304 unsigned int result;
2305 unsigned long flags;
2306
2307 spin_lock_irqsave(&info->lock,flags);
2308 get_signals(info);
2309 spin_unlock_irqrestore(&info->lock,flags);
2310
2311 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2312 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2313 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2314 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2315 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2316 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2317
2318 if (debug_level >= DEBUG_LEVEL_INFO)
2319 printk("%s(%d):%s tiocmget() value=%08X\n",
2320 __FILE__,__LINE__, info->device_name, result );
2321 return result;
2322}
2323
2324/* set modem control signals (DTR/RTS)
2325 */
2326static int tiocmset(struct tty_struct *tty, struct file *file,
2327 unsigned int set, unsigned int clear)
2328{
2329 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2330 unsigned long flags;
2331
2332 if (debug_level >= DEBUG_LEVEL_INFO)
2333 printk("%s(%d):%s tiocmset(%x,%x)\n",
2334 __FILE__,__LINE__,info->device_name, set, clear);
2335
2336 if (set & TIOCM_RTS)
2337 info->serial_signals |= SerialSignal_RTS;
2338 if (set & TIOCM_DTR)
2339 info->serial_signals |= SerialSignal_DTR;
2340 if (clear & TIOCM_RTS)
2341 info->serial_signals &= ~SerialSignal_RTS;
2342 if (clear & TIOCM_DTR)
2343 info->serial_signals &= ~SerialSignal_DTR;
2344
2345 spin_lock_irqsave(&info->lock,flags);
2346 set_signals(info);
2347 spin_unlock_irqrestore(&info->lock,flags);
2348
2349 return 0;
2350}
2351
2352/* Set or clear transmit break condition
2353 *
2354 * Arguments: tty pointer to tty instance data
2355 * break_state -1=set break condition, 0=clear
2356 */
2357static void mgslpc_break(struct tty_struct *tty, int break_state)
2358{
2359 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2360 unsigned long flags;
2361
2362 if (debug_level >= DEBUG_LEVEL_INFO)
2363 printk("%s(%d):mgslpc_break(%s,%d)\n",
2364 __FILE__,__LINE__, info->device_name, break_state);
2365
2366 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2367 return;
2368
2369 spin_lock_irqsave(&info->lock,flags);
2370 if (break_state == -1)
2371 set_reg_bits(info, CHA+DAFO, BIT6);
2372 else
2373 clear_reg_bits(info, CHA+DAFO, BIT6);
2374 spin_unlock_irqrestore(&info->lock,flags);
2375}
2376
2377/* Service an IOCTL request
2378 *
2379 * Arguments:
2380 *
2381 * tty pointer to tty instance data
2382 * file pointer to associated file object for device
2383 * cmd IOCTL command code
2384 * arg command argument/context
2385 *
2386 * Return Value: 0 if success, otherwise error code
2387 */
2388static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2389 unsigned int cmd, unsigned long arg)
2390{
2391 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2392
2393 if (debug_level >= DEBUG_LEVEL_INFO)
2394 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2395 info->device_name, cmd );
2396
2397 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2398 return -ENODEV;
2399
2400 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2401 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2402 if (tty->flags & (1 << TTY_IO_ERROR))
2403 return -EIO;
2404 }
2405
2406 return ioctl_common(info, cmd, arg);
2407}
2408
2409int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2410{
2411 int error;
2412 struct mgsl_icount cnow; /* kernel counter temps */
2413 struct serial_icounter_struct __user *p_cuser; /* user space */
2414 void __user *argp = (void __user *)arg;
2415 unsigned long flags;
2416
2417 switch (cmd) {
2418 case MGSL_IOCGPARAMS:
2419 return get_params(info, argp);
2420 case MGSL_IOCSPARAMS:
2421 return set_params(info, argp);
2422 case MGSL_IOCGTXIDLE:
2423 return get_txidle(info, argp);
2424 case MGSL_IOCSTXIDLE:
2425 return set_txidle(info, (int)arg);
2426 case MGSL_IOCGIF:
2427 return get_interface(info, argp);
2428 case MGSL_IOCSIF:
2429 return set_interface(info,(int)arg);
2430 case MGSL_IOCTXENABLE:
2431 return set_txenable(info,(int)arg);
2432 case MGSL_IOCRXENABLE:
2433 return set_rxenable(info,(int)arg);
2434 case MGSL_IOCTXABORT:
2435 return tx_abort(info);
2436 case MGSL_IOCGSTATS:
2437 return get_stats(info, argp);
2438 case MGSL_IOCWAITEVENT:
2439 return wait_events(info, argp);
2440 case TIOCMIWAIT:
2441 return modem_input_wait(info,(int)arg);
2442 case TIOCGICOUNT:
2443 spin_lock_irqsave(&info->lock,flags);
2444 cnow = info->icount;
2445 spin_unlock_irqrestore(&info->lock,flags);
2446 p_cuser = argp;
2447 PUT_USER(error,cnow.cts, &p_cuser->cts);
2448 if (error) return error;
2449 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2450 if (error) return error;
2451 PUT_USER(error,cnow.rng, &p_cuser->rng);
2452 if (error) return error;
2453 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2454 if (error) return error;
2455 PUT_USER(error,cnow.rx, &p_cuser->rx);
2456 if (error) return error;
2457 PUT_USER(error,cnow.tx, &p_cuser->tx);
2458 if (error) return error;
2459 PUT_USER(error,cnow.frame, &p_cuser->frame);
2460 if (error) return error;
2461 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2462 if (error) return error;
2463 PUT_USER(error,cnow.parity, &p_cuser->parity);
2464 if (error) return error;
2465 PUT_USER(error,cnow.brk, &p_cuser->brk);
2466 if (error) return error;
2467 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2468 if (error) return error;
2469 return 0;
2470 default:
2471 return -ENOIOCTLCMD;
2472 }
2473 return 0;
2474}
2475
2476/* Set new termios settings
2477 *
2478 * Arguments:
2479 *
2480 * tty pointer to tty structure
2481 * termios pointer to buffer to hold returned old termios
2482 */
2483static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2484{
2485 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2486 unsigned long flags;
2487
2488 if (debug_level >= DEBUG_LEVEL_INFO)
2489 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2490 tty->driver->name );
2491
2492 /* just return if nothing has changed */
2493 if ((tty->termios->c_cflag == old_termios->c_cflag)
2494 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2495 == RELEVANT_IFLAG(old_termios->c_iflag)))
2496 return;
2497
2498 mgslpc_change_params(info);
2499
2500 /* Handle transition to B0 status */
2501 if (old_termios->c_cflag & CBAUD &&
2502 !(tty->termios->c_cflag & CBAUD)) {
2503 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2504 spin_lock_irqsave(&info->lock,flags);
2505 set_signals(info);
2506 spin_unlock_irqrestore(&info->lock,flags);
2507 }
2508
2509 /* Handle transition away from B0 status */
2510 if (!(old_termios->c_cflag & CBAUD) &&
2511 tty->termios->c_cflag & CBAUD) {
2512 info->serial_signals |= SerialSignal_DTR;
2513 if (!(tty->termios->c_cflag & CRTSCTS) ||
2514 !test_bit(TTY_THROTTLED, &tty->flags)) {
2515 info->serial_signals |= SerialSignal_RTS;
2516 }
2517 spin_lock_irqsave(&info->lock,flags);
2518 set_signals(info);
2519 spin_unlock_irqrestore(&info->lock,flags);
2520 }
2521
2522 /* Handle turning off CRTSCTS */
2523 if (old_termios->c_cflag & CRTSCTS &&
2524 !(tty->termios->c_cflag & CRTSCTS)) {
2525 tty->hw_stopped = 0;
2526 tx_release(tty);
2527 }
2528}
2529
2530static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2531{
2532 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2533
2534 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2535 return;
2536
2537 if (debug_level >= DEBUG_LEVEL_INFO)
2538 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2539 __FILE__,__LINE__, info->device_name, info->count);
2540
2541 if (!info->count)
2542 return;
2543
2544 if (tty_hung_up_p(filp))
2545 goto cleanup;
2546
2547 if ((tty->count == 1) && (info->count != 1)) {
2548 /*
2549 * tty->count is 1 and the tty structure will be freed.
2550 * info->count should be one in this case.
2551 * if it's not, correct it so that the port is shutdown.
2552 */
2553 printk("mgslpc_close: bad refcount; tty->count is 1, "
2554 "info->count is %d\n", info->count);
2555 info->count = 1;
2556 }
2557
2558 info->count--;
2559
2560 /* if at least one open remaining, leave hardware active */
2561 if (info->count)
2562 goto cleanup;
2563
2564 info->flags |= ASYNC_CLOSING;
2565
2566 /* set tty->closing to notify line discipline to
2567 * only process XON/XOFF characters. Only the N_TTY
2568 * discipline appears to use this (ppp does not).
2569 */
2570 tty->closing = 1;
2571
2572 /* wait for transmit data to clear all layers */
2573
2574 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2575 if (debug_level >= DEBUG_LEVEL_INFO)
2576 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2577 __FILE__,__LINE__, info->device_name );
2578 tty_wait_until_sent(tty, info->closing_wait);
2579 }
2580
2581 if (info->flags & ASYNC_INITIALIZED)
2582 mgslpc_wait_until_sent(tty, info->timeout);
2583
2584 if (tty->driver->flush_buffer)
2585 tty->driver->flush_buffer(tty);
2586
2587 ldisc_flush_buffer(tty);
2588
2589 shutdown(info);
2590
2591 tty->closing = 0;
2592 info->tty = NULL;
2593
2594 if (info->blocked_open) {
2595 if (info->close_delay) {
2596 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2597 }
2598 wake_up_interruptible(&info->open_wait);
2599 }
2600
2601 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2602
2603 wake_up_interruptible(&info->close_wait);
2604
2605cleanup:
2606 if (debug_level >= DEBUG_LEVEL_INFO)
2607 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2608 tty->driver->name, info->count);
2609}
2610
2611/* Wait until the transmitter is empty.
2612 */
2613static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2614{
2615 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2616 unsigned long orig_jiffies, char_time;
2617
2618 if (!info )
2619 return;
2620
2621 if (debug_level >= DEBUG_LEVEL_INFO)
2622 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2623 __FILE__,__LINE__, info->device_name );
2624
2625 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2626 return;
2627
2628 if (!(info->flags & ASYNC_INITIALIZED))
2629 goto exit;
2630
2631 orig_jiffies = jiffies;
2632
2633 /* Set check interval to 1/5 of estimated time to
2634 * send a character, and make it at least 1. The check
2635 * interval should also be less than the timeout.
2636 * Note: use tight timings here to satisfy the NIST-PCTS.
2637 */
2638
2639 if ( info->params.data_rate ) {
2640 char_time = info->timeout/(32 * 5);
2641 if (!char_time)
2642 char_time++;
2643 } else
2644 char_time = 1;
2645
2646 if (timeout)
2647 char_time = min_t(unsigned long, char_time, timeout);
2648
2649 if (info->params.mode == MGSL_MODE_HDLC) {
2650 while (info->tx_active) {
2651 msleep_interruptible(jiffies_to_msecs(char_time));
2652 if (signal_pending(current))
2653 break;
2654 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2655 break;
2656 }
2657 } else {
2658 while ((info->tx_count || info->tx_active) &&
2659 info->tx_enabled) {
2660 msleep_interruptible(jiffies_to_msecs(char_time));
2661 if (signal_pending(current))
2662 break;
2663 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2664 break;
2665 }
2666 }
2667
2668exit:
2669 if (debug_level >= DEBUG_LEVEL_INFO)
2670 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2671 __FILE__,__LINE__, info->device_name );
2672}
2673
2674/* Called by tty_hangup() when a hangup is signaled.
2675 * This is the same as closing all open files for the port.
2676 */
2677static void mgslpc_hangup(struct tty_struct *tty)
2678{
2679 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2680
2681 if (debug_level >= DEBUG_LEVEL_INFO)
2682 printk("%s(%d):mgslpc_hangup(%s)\n",
2683 __FILE__,__LINE__, info->device_name );
2684
2685 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2686 return;
2687
2688 mgslpc_flush_buffer(tty);
2689 shutdown(info);
2690
2691 info->count = 0;
2692 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2693 info->tty = NULL;
2694
2695 wake_up_interruptible(&info->open_wait);
2696}
2697
2698/* Block the current process until the specified port
2699 * is ready to be opened.
2700 */
2701static int block_til_ready(struct tty_struct *tty, struct file *filp,
2702 MGSLPC_INFO *info)
2703{
2704 DECLARE_WAITQUEUE(wait, current);
2705 int retval;
2706 int do_clocal = 0, extra_count = 0;
2707 unsigned long flags;
2708
2709 if (debug_level >= DEBUG_LEVEL_INFO)
2710 printk("%s(%d):block_til_ready on %s\n",
2711 __FILE__,__LINE__, tty->driver->name );
2712
2713 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2714 /* nonblock mode is set or port is not enabled */
2715 /* just verify that callout device is not active */
2716 info->flags |= ASYNC_NORMAL_ACTIVE;
2717 return 0;
2718 }
2719
2720 if (tty->termios->c_cflag & CLOCAL)
2721 do_clocal = 1;
2722
2723 /* Wait for carrier detect and the line to become
2724 * free (i.e., not in use by the callout). While we are in
2725 * this loop, info->count is dropped by one, so that
2726 * mgslpc_close() knows when to free things. We restore it upon
2727 * exit, either normal or abnormal.
2728 */
2729
2730 retval = 0;
2731 add_wait_queue(&info->open_wait, &wait);
2732
2733 if (debug_level >= DEBUG_LEVEL_INFO)
2734 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2735 __FILE__,__LINE__, tty->driver->name, info->count );
2736
2737 spin_lock_irqsave(&info->lock, flags);
2738 if (!tty_hung_up_p(filp)) {
2739 extra_count = 1;
2740 info->count--;
2741 }
2742 spin_unlock_irqrestore(&info->lock, flags);
2743 info->blocked_open++;
2744
2745 while (1) {
2746 if ((tty->termios->c_cflag & CBAUD)) {
2747 spin_lock_irqsave(&info->lock,flags);
2748 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2749 set_signals(info);
2750 spin_unlock_irqrestore(&info->lock,flags);
2751 }
2752
2753 set_current_state(TASK_INTERRUPTIBLE);
2754
2755 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2756 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2757 -EAGAIN : -ERESTARTSYS;
2758 break;
2759 }
2760
2761 spin_lock_irqsave(&info->lock,flags);
2762 get_signals(info);
2763 spin_unlock_irqrestore(&info->lock,flags);
2764
2765 if (!(info->flags & ASYNC_CLOSING) &&
2766 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2767 break;
2768 }
2769
2770 if (signal_pending(current)) {
2771 retval = -ERESTARTSYS;
2772 break;
2773 }
2774
2775 if (debug_level >= DEBUG_LEVEL_INFO)
2776 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2777 __FILE__,__LINE__, tty->driver->name, info->count );
2778
2779 schedule();
2780 }
2781
2782 set_current_state(TASK_RUNNING);
2783 remove_wait_queue(&info->open_wait, &wait);
2784
2785 if (extra_count)
2786 info->count++;
2787 info->blocked_open--;
2788
2789 if (debug_level >= DEBUG_LEVEL_INFO)
2790 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2791 __FILE__,__LINE__, tty->driver->name, info->count );
2792
2793 if (!retval)
2794 info->flags |= ASYNC_NORMAL_ACTIVE;
2795
2796 return retval;
2797}
2798
2799static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2800{
2801 MGSLPC_INFO *info;
2802 int retval, line;
2803 unsigned long flags;
2804
2805 /* verify range of specified line number */
2806 line = tty->index;
2807 if ((line < 0) || (line >= mgslpc_device_count)) {
2808 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2809 __FILE__,__LINE__,line);
2810 return -ENODEV;
2811 }
2812
2813 /* find the info structure for the specified line */
2814 info = mgslpc_device_list;
2815 while(info && info->line != line)
2816 info = info->next_device;
2817 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2818 return -ENODEV;
2819
2820 tty->driver_data = info;
2821 info->tty = tty;
2822
2823 if (debug_level >= DEBUG_LEVEL_INFO)
2824 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2825 __FILE__,__LINE__,tty->driver->name, info->count);
2826
2827 /* If port is closing, signal caller to try again */
2828 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2829 if (info->flags & ASYNC_CLOSING)
2830 interruptible_sleep_on(&info->close_wait);
2831 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2832 -EAGAIN : -ERESTARTSYS);
2833 goto cleanup;
2834 }
2835
2836 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2837
2838 spin_lock_irqsave(&info->netlock, flags);
2839 if (info->netcount) {
2840 retval = -EBUSY;
2841 spin_unlock_irqrestore(&info->netlock, flags);
2842 goto cleanup;
2843 }
2844 info->count++;
2845 spin_unlock_irqrestore(&info->netlock, flags);
2846
2847 if (info->count == 1) {
2848 /* 1st open on this device, init hardware */
2849 retval = startup(info);
2850 if (retval < 0)
2851 goto cleanup;
2852 }
2853
2854 retval = block_til_ready(tty, filp, info);
2855 if (retval) {
2856 if (debug_level >= DEBUG_LEVEL_INFO)
2857 printk("%s(%d):block_til_ready(%s) returned %d\n",
2858 __FILE__,__LINE__, info->device_name, retval);
2859 goto cleanup;
2860 }
2861
2862 if (debug_level >= DEBUG_LEVEL_INFO)
2863 printk("%s(%d):mgslpc_open(%s) success\n",
2864 __FILE__,__LINE__, info->device_name);
2865 retval = 0;
2866
2867cleanup:
2868 if (retval) {
2869 if (tty->count == 1)
2870 info->tty = NULL; /* tty layer will release tty struct */
2871 if(info->count)
2872 info->count--;
2873 }
2874
2875 return retval;
2876}
2877
2878/*
2879 * /proc fs routines....
2880 */
2881
2882static inline int line_info(char *buf, MGSLPC_INFO *info)
2883{
2884 char stat_buf[30];
2885 int ret;
2886 unsigned long flags;
2887
2888 ret = sprintf(buf, "%s:io:%04X irq:%d",
2889 info->device_name, info->io_base, info->irq_level);
2890
2891 /* output current serial signal states */
2892 spin_lock_irqsave(&info->lock,flags);
2893 get_signals(info);
2894 spin_unlock_irqrestore(&info->lock,flags);
2895
2896 stat_buf[0] = 0;
2897 stat_buf[1] = 0;
2898 if (info->serial_signals & SerialSignal_RTS)
2899 strcat(stat_buf, "|RTS");
2900 if (info->serial_signals & SerialSignal_CTS)
2901 strcat(stat_buf, "|CTS");
2902 if (info->serial_signals & SerialSignal_DTR)
2903 strcat(stat_buf, "|DTR");
2904 if (info->serial_signals & SerialSignal_DSR)
2905 strcat(stat_buf, "|DSR");
2906 if (info->serial_signals & SerialSignal_DCD)
2907 strcat(stat_buf, "|CD");
2908 if (info->serial_signals & SerialSignal_RI)
2909 strcat(stat_buf, "|RI");
2910
2911 if (info->params.mode == MGSL_MODE_HDLC) {
2912 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2913 info->icount.txok, info->icount.rxok);
2914 if (info->icount.txunder)
2915 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2916 if (info->icount.txabort)
2917 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2918 if (info->icount.rxshort)
2919 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2920 if (info->icount.rxlong)
2921 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2922 if (info->icount.rxover)
2923 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2924 if (info->icount.rxcrc)
2925 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2926 } else {
2927 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2928 info->icount.tx, info->icount.rx);
2929 if (info->icount.frame)
2930 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2931 if (info->icount.parity)
2932 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2933 if (info->icount.brk)
2934 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2935 if (info->icount.overrun)
2936 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2937 }
2938
2939 /* Append serial signal status to end */
2940 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2941
2942 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2943 info->tx_active,info->bh_requested,info->bh_running,
2944 info->pending_bh);
2945
2946 return ret;
2947}
2948
2949/* Called to print information about devices
2950 */
2951static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2952 int *eof, void *data)
2953{
2954 int len = 0, l;
2955 off_t begin = 0;
2956 MGSLPC_INFO *info;
2957
2958 len += sprintf(page, "synclink driver:%s\n", driver_version);
2959
2960 info = mgslpc_device_list;
2961 while( info ) {
2962 l = line_info(page + len, info);
2963 len += l;
2964 if (len+begin > off+count)
2965 goto done;
2966 if (len+begin < off) {
2967 begin += len;
2968 len = 0;
2969 }
2970 info = info->next_device;
2971 }
2972
2973 *eof = 1;
2974done:
2975 if (off >= len+begin)
2976 return 0;
2977 *start = page + (off-begin);
2978 return ((count < begin+len-off) ? count : begin+len-off);
2979}
2980
2981int rx_alloc_buffers(MGSLPC_INFO *info)
2982{
2983 /* each buffer has header and data */
2984 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2985
2986 /* calculate total allocation size for 8 buffers */
2987 info->rx_buf_total_size = info->rx_buf_size * 8;
2988
2989 /* limit total allocated memory */
2990 if (info->rx_buf_total_size > 0x10000)
2991 info->rx_buf_total_size = 0x10000;
2992
2993 /* calculate number of buffers */
2994 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2995
2996 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2997 if (info->rx_buf == NULL)
2998 return -ENOMEM;
2999
3000 rx_reset_buffers(info);
3001 return 0;
3002}
3003
3004void rx_free_buffers(MGSLPC_INFO *info)
3005{
Jesper Juhl735d5662005-11-07 01:01:29 -08003006 kfree(info->rx_buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003007 info->rx_buf = NULL;
3008}
3009
3010int claim_resources(MGSLPC_INFO *info)
3011{
3012 if (rx_alloc_buffers(info) < 0 ) {
3013 printk( "Cant allocate rx buffer %s\n", info->device_name);
3014 release_resources(info);
3015 return -ENODEV;
3016 }
3017 return 0;
3018}
3019
3020void release_resources(MGSLPC_INFO *info)
3021{
3022 if (debug_level >= DEBUG_LEVEL_INFO)
3023 printk("release_resources(%s)\n", info->device_name);
3024 rx_free_buffers(info);
3025}
3026
3027/* Add the specified device instance data structure to the
3028 * global linked list of devices and increment the device count.
3029 *
3030 * Arguments: info pointer to device instance data
3031 */
3032void mgslpc_add_device(MGSLPC_INFO *info)
3033{
3034 info->next_device = NULL;
3035 info->line = mgslpc_device_count;
3036 sprintf(info->device_name,"ttySLP%d",info->line);
3037
3038 if (info->line < MAX_DEVICE_COUNT) {
3039 if (maxframe[info->line])
3040 info->max_frame_size = maxframe[info->line];
3041 info->dosyncppp = dosyncppp[info->line];
3042 }
3043
3044 mgslpc_device_count++;
3045
3046 if (!mgslpc_device_list)
3047 mgslpc_device_list = info;
3048 else {
3049 MGSLPC_INFO *current_dev = mgslpc_device_list;
3050 while( current_dev->next_device )
3051 current_dev = current_dev->next_device;
3052 current_dev->next_device = info;
3053 }
3054
3055 if (info->max_frame_size < 4096)
3056 info->max_frame_size = 4096;
3057 else if (info->max_frame_size > 65535)
3058 info->max_frame_size = 65535;
3059
3060 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
3061 info->device_name, info->io_base, info->irq_level);
3062
3063#ifdef CONFIG_HDLC
3064 hdlcdev_init(info);
3065#endif
3066}
3067
3068void mgslpc_remove_device(MGSLPC_INFO *remove_info)
3069{
3070 MGSLPC_INFO *info = mgslpc_device_list;
3071 MGSLPC_INFO *last = NULL;
3072
3073 while(info) {
3074 if (info == remove_info) {
3075 if (last)
3076 last->next_device = info->next_device;
3077 else
3078 mgslpc_device_list = info->next_device;
3079#ifdef CONFIG_HDLC
3080 hdlcdev_exit(info);
3081#endif
3082 release_resources(info);
3083 kfree(info);
3084 mgslpc_device_count--;
3085 return;
3086 }
3087 last = info;
3088 info = info->next_device;
3089 }
3090}
3091
Dominik Brodowski4af48c82005-06-27 16:28:42 -07003092static struct pcmcia_device_id mgslpc_ids[] = {
3093 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
3094 PCMCIA_DEVICE_NULL
3095};
3096MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
3097
Linus Torvalds1da177e2005-04-16 15:20:36 -07003098static struct pcmcia_driver mgslpc_driver = {
3099 .owner = THIS_MODULE,
3100 .drv = {
3101 .name = "synclink_cs",
3102 },
3103 .attach = mgslpc_attach,
Dominik Brodowski1e212f32005-07-07 17:59:00 -07003104 .event = mgslpc_event,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003105 .detach = mgslpc_detach,
Dominik Brodowski4af48c82005-06-27 16:28:42 -07003106 .id_table = mgslpc_ids,
Dominik Brodowski98e4c282005-11-14 21:21:18 +01003107 .suspend = mgslpc_suspend,
3108 .resume = mgslpc_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003109};
3110
3111static struct tty_operations mgslpc_ops = {
3112 .open = mgslpc_open,
3113 .close = mgslpc_close,
3114 .write = mgslpc_write,
3115 .put_char = mgslpc_put_char,
3116 .flush_chars = mgslpc_flush_chars,
3117 .write_room = mgslpc_write_room,
3118 .chars_in_buffer = mgslpc_chars_in_buffer,
3119 .flush_buffer = mgslpc_flush_buffer,
3120 .ioctl = mgslpc_ioctl,
3121 .throttle = mgslpc_throttle,
3122 .unthrottle = mgslpc_unthrottle,
3123 .send_xchar = mgslpc_send_xchar,
3124 .break_ctl = mgslpc_break,
3125 .wait_until_sent = mgslpc_wait_until_sent,
3126 .read_proc = mgslpc_read_proc,
3127 .set_termios = mgslpc_set_termios,
3128 .stop = tx_pause,
3129 .start = tx_release,
3130 .hangup = mgslpc_hangup,
3131 .tiocmget = tiocmget,
3132 .tiocmset = tiocmset,
3133};
3134
3135static void synclink_cs_cleanup(void)
3136{
3137 int rc;
3138
3139 printk("Unloading %s: version %s\n", driver_name, driver_version);
3140
3141 while(mgslpc_device_list)
3142 mgslpc_remove_device(mgslpc_device_list);
3143
3144 if (serial_driver) {
3145 if ((rc = tty_unregister_driver(serial_driver)))
3146 printk("%s(%d) failed to unregister tty driver err=%d\n",
3147 __FILE__,__LINE__,rc);
3148 put_tty_driver(serial_driver);
3149 }
3150
3151 pcmcia_unregister_driver(&mgslpc_driver);
3152 BUG_ON(dev_list != NULL);
3153}
3154
3155static int __init synclink_cs_init(void)
3156{
3157 int rc;
3158
3159 if (break_on_load) {
3160 mgslpc_get_text_ptr();
3161 BREAKPOINT();
3162 }
3163
3164 printk("%s %s\n", driver_name, driver_version);
3165
3166 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3167 return rc;
3168
3169 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3170 if (!serial_driver) {
3171 rc = -ENOMEM;
3172 goto error;
3173 }
3174
3175 /* Initialize the tty_driver structure */
3176
3177 serial_driver->owner = THIS_MODULE;
3178 serial_driver->driver_name = "synclink_cs";
3179 serial_driver->name = "ttySLP";
3180 serial_driver->major = ttymajor;
3181 serial_driver->minor_start = 64;
3182 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3183 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3184 serial_driver->init_termios = tty_std_termios;
3185 serial_driver->init_termios.c_cflag =
3186 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3187 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3188 tty_set_operations(serial_driver, &mgslpc_ops);
3189
3190 if ((rc = tty_register_driver(serial_driver)) < 0) {
3191 printk("%s(%d):Couldn't register serial driver\n",
3192 __FILE__,__LINE__);
3193 put_tty_driver(serial_driver);
3194 serial_driver = NULL;
3195 goto error;
3196 }
3197
3198 printk("%s %s, tty major#%d\n",
3199 driver_name, driver_version,
3200 serial_driver->major);
3201
3202 return 0;
3203
3204error:
3205 synclink_cs_cleanup();
3206 return rc;
3207}
3208
3209static void __exit synclink_cs_exit(void)
3210{
3211 synclink_cs_cleanup();
3212}
3213
3214module_init(synclink_cs_init);
3215module_exit(synclink_cs_exit);
3216
3217static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3218{
3219 unsigned int M, N;
3220 unsigned char val;
3221
3222 /* note:standard BRG mode is broken in V3.2 chip
3223 * so enhanced mode is always used
3224 */
3225
3226 if (rate) {
3227 N = 3686400 / rate;
3228 if (!N)
3229 N = 1;
3230 N >>= 1;
3231 for (M = 1; N > 64 && M < 16; M++)
3232 N >>= 1;
3233 N--;
3234
3235 /* BGR[5..0] = N
3236 * BGR[9..6] = M
3237 * BGR[7..0] contained in BGR register
3238 * BGR[9..8] contained in CCR2[7..6]
3239 * divisor = (N+1)*2^M
3240 *
3241 * Note: M *must* not be zero (causes asymetric duty cycle)
3242 */
3243 write_reg(info, (unsigned char) (channel + BGR),
3244 (unsigned char) ((M << 6) + N));
3245 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3246 val |= ((M << 4) & 0xc0);
3247 write_reg(info, (unsigned char) (channel + CCR2), val);
3248 }
3249}
3250
3251/* Enabled the AUX clock output at the specified frequency.
3252 */
3253static void enable_auxclk(MGSLPC_INFO *info)
3254{
3255 unsigned char val;
3256
3257 /* MODE
3258 *
3259 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3260 * 05 ADM Address Mode, 0 = no addr recognition
3261 * 04 TMD Timer Mode, 0 = external
3262 * 03 RAC Receiver Active, 0 = inactive
3263 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3264 * 01 TRS Timer Resolution, 1=512
3265 * 00 TLP Test Loop, 0 = no loop
3266 *
3267 * 1000 0010
3268 */
3269 val = 0x82;
3270
3271 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3272 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3273 val |= BIT2;
3274 write_reg(info, CHB + MODE, val);
3275
3276 /* CCR0
3277 *
3278 * 07 PU Power Up, 1=active, 0=power down
3279 * 06 MCE Master Clock Enable, 1=enabled
3280 * 05 Reserved, 0
3281 * 04..02 SC[2..0] Encoding
3282 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3283 *
3284 * 11000000
3285 */
3286 write_reg(info, CHB + CCR0, 0xc0);
3287
3288 /* CCR1
3289 *
3290 * 07 SFLG Shared Flag, 0 = disable shared flags
3291 * 06 GALP Go Active On Loop, 0 = not used
3292 * 05 GLP Go On Loop, 0 = not used
3293 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3294 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3295 * 02..00 CM[2..0] Clock Mode
3296 *
3297 * 0001 0111
3298 */
3299 write_reg(info, CHB + CCR1, 0x17);
3300
3301 /* CCR2 (Channel B)
3302 *
3303 * 07..06 BGR[9..8] Baud rate bits 9..8
3304 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3305 * 04 SSEL Clock source select, 1=submode b
3306 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3307 * 02 RWX Read/Write Exchange 0=disabled
3308 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3309 * 00 DIV, data inversion 0=disabled, 1=enabled
3310 *
3311 * 0011 1000
3312 */
3313 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3314 write_reg(info, CHB + CCR2, 0x38);
3315 else
3316 write_reg(info, CHB + CCR2, 0x30);
3317
3318 /* CCR4
3319 *
3320 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3321 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3322 * 05 TST1 Test Pin, 0=normal operation
3323 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3324 * 03..02 Reserved, must be 0
3325 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3326 *
3327 * 0101 0000
3328 */
3329 write_reg(info, CHB + CCR4, 0x50);
3330
3331 /* if auxclk not enabled, set internal BRG so
3332 * CTS transitions can be detected (requires TxC)
3333 */
3334 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3335 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3336 else
3337 mgslpc_set_rate(info, CHB, 921600);
3338}
3339
3340static void loopback_enable(MGSLPC_INFO *info)
3341{
3342 unsigned char val;
3343
3344 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3345 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3346 write_reg(info, CHA + CCR1, val);
3347
3348 /* CCR2:04 SSEL Clock source select, 1=submode b */
3349 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3350 write_reg(info, CHA + CCR2, val);
3351
3352 /* set LinkSpeed if available, otherwise default to 2Mbps */
3353 if (info->params.clock_speed)
3354 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3355 else
3356 mgslpc_set_rate(info, CHA, 1843200);
3357
3358 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3359 val = read_reg(info, CHA + MODE) | BIT0;
3360 write_reg(info, CHA + MODE, val);
3361}
3362
3363void hdlc_mode(MGSLPC_INFO *info)
3364{
3365 unsigned char val;
3366 unsigned char clkmode, clksubmode;
3367
3368 /* disable all interrupts */
3369 irq_disable(info, CHA, 0xffff);
3370 irq_disable(info, CHB, 0xffff);
3371 port_irq_disable(info, 0xff);
3372
3373 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3374 clkmode = clksubmode = 0;
3375 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3376 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3377 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3378 clkmode = 7;
3379 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3380 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3381 /* clock mode 7b, rcv = BRG, xmt = BRG */
3382 clkmode = 7;
3383 clksubmode = 1;
3384 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3385 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3386 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3387 clkmode = 6;
3388 clksubmode = 1;
3389 } else {
3390 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3391 clkmode = 6;
3392 }
3393 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3394 /* clock mode 0b, rcv = RxC, xmt = BRG */
3395 clksubmode = 1;
3396 }
3397
3398 /* MODE
3399 *
3400 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3401 * 05 ADM Address Mode, 0 = no addr recognition
3402 * 04 TMD Timer Mode, 0 = external
3403 * 03 RAC Receiver Active, 0 = inactive
3404 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3405 * 01 TRS Timer Resolution, 1=512
3406 * 00 TLP Test Loop, 0 = no loop
3407 *
3408 * 1000 0010
3409 */
3410 val = 0x82;
3411 if (info->params.loopback)
3412 val |= BIT0;
3413
3414 /* preserve RTS state */
3415 if (info->serial_signals & SerialSignal_RTS)
3416 val |= BIT2;
3417 write_reg(info, CHA + MODE, val);
3418
3419 /* CCR0
3420 *
3421 * 07 PU Power Up, 1=active, 0=power down
3422 * 06 MCE Master Clock Enable, 1=enabled
3423 * 05 Reserved, 0
3424 * 04..02 SC[2..0] Encoding
3425 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3426 *
3427 * 11000000
3428 */
3429 val = 0xc0;
3430 switch (info->params.encoding)
3431 {
3432 case HDLC_ENCODING_NRZI:
3433 val |= BIT3;
3434 break;
3435 case HDLC_ENCODING_BIPHASE_SPACE:
3436 val |= BIT4;
3437 break; // FM0
3438 case HDLC_ENCODING_BIPHASE_MARK:
3439 val |= BIT4 + BIT2;
3440 break; // FM1
3441 case HDLC_ENCODING_BIPHASE_LEVEL:
3442 val |= BIT4 + BIT3;
3443 break; // Manchester
3444 }
3445 write_reg(info, CHA + CCR0, val);
3446
3447 /* CCR1
3448 *
3449 * 07 SFLG Shared Flag, 0 = disable shared flags
3450 * 06 GALP Go Active On Loop, 0 = not used
3451 * 05 GLP Go On Loop, 0 = not used
3452 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3453 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3454 * 02..00 CM[2..0] Clock Mode
3455 *
3456 * 0001 0000
3457 */
3458 val = 0x10 + clkmode;
3459 write_reg(info, CHA + CCR1, val);
3460
3461 /* CCR2
3462 *
3463 * 07..06 BGR[9..8] Baud rate bits 9..8
3464 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3465 * 04 SSEL Clock source select, 1=submode b
3466 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3467 * 02 RWX Read/Write Exchange 0=disabled
3468 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3469 * 00 DIV, data inversion 0=disabled, 1=enabled
3470 *
3471 * 0000 0000
3472 */
3473 val = 0x00;
3474 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3475 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3476 val |= BIT5;
3477 if (clksubmode)
3478 val |= BIT4;
3479 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3480 val |= BIT1;
3481 if (info->params.encoding == HDLC_ENCODING_NRZB)
3482 val |= BIT0;
3483 write_reg(info, CHA + CCR2, val);
3484
3485 /* CCR3
3486 *
3487 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3488 * 05 EPT Enable preamble transmission, 1=enabled
3489 * 04 RADD Receive address pushed to FIFO, 0=disabled
3490 * 03 CRL CRC Reset Level, 0=FFFF
3491 * 02 RCRC Rx CRC 0=On 1=Off
3492 * 01 TCRC Tx CRC 0=On 1=Off
3493 * 00 PSD DPLL Phase Shift Disable
3494 *
3495 * 0000 0000
3496 */
3497 val = 0x00;
3498 if (info->params.crc_type == HDLC_CRC_NONE)
3499 val |= BIT2 + BIT1;
3500 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3501 val |= BIT5;
3502 switch (info->params.preamble_length)
3503 {
3504 case HDLC_PREAMBLE_LENGTH_16BITS:
3505 val |= BIT6;
3506 break;
3507 case HDLC_PREAMBLE_LENGTH_32BITS:
3508 val |= BIT6;
3509 break;
3510 case HDLC_PREAMBLE_LENGTH_64BITS:
3511 val |= BIT7 + BIT6;
3512 break;
3513 }
3514 write_reg(info, CHA + CCR3, val);
3515
3516 /* PRE - Preamble pattern */
3517 val = 0;
3518 switch (info->params.preamble)
3519 {
3520 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3521 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3522 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3523 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3524 }
3525 write_reg(info, CHA + PRE, val);
3526
3527 /* CCR4
3528 *
3529 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3530 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3531 * 05 TST1 Test Pin, 0=normal operation
3532 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3533 * 03..02 Reserved, must be 0
3534 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3535 *
3536 * 0101 0000
3537 */
3538 val = 0x50;
3539 write_reg(info, CHA + CCR4, val);
3540 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3541 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3542 else
3543 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3544
3545 /* RLCR Receive length check register
3546 *
3547 * 7 1=enable receive length check
3548 * 6..0 Max frame length = (RL + 1) * 32
3549 */
3550 write_reg(info, CHA + RLCR, 0);
3551
3552 /* XBCH Transmit Byte Count High
3553 *
3554 * 07 DMA mode, 0 = interrupt driven
3555 * 06 NRM, 0=ABM (ignored)
3556 * 05 CAS Carrier Auto Start
3557 * 04 XC Transmit Continuously (ignored)
3558 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3559 *
3560 * 0000 0000
3561 */
3562 val = 0x00;
3563 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3564 val |= BIT5;
3565 write_reg(info, CHA + XBCH, val);
3566 enable_auxclk(info);
3567 if (info->params.loopback || info->testing_irq)
3568 loopback_enable(info);
3569 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3570 {
3571 irq_enable(info, CHB, IRQ_CTS);
3572 /* PVR[3] 1=AUTO CTS active */
3573 set_reg_bits(info, CHA + PVR, BIT3);
3574 } else
3575 clear_reg_bits(info, CHA + PVR, BIT3);
3576
3577 irq_enable(info, CHA,
3578 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3579 IRQ_UNDERRUN + IRQ_TXFIFO);
3580 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3581 wait_command_complete(info, CHA);
3582 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3583
3584 /* Master clock mode enabled above to allow reset commands
3585 * to complete even if no data clocks are present.
3586 *
3587 * Disable master clock mode for normal communications because
3588 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3589 * IRQ when in master clock mode.
3590 *
3591 * Leave master clock mode enabled for IRQ test because the
3592 * timer IRQ used by the test can only happen in master clock mode.
3593 */
3594 if (!info->testing_irq)
3595 clear_reg_bits(info, CHA + CCR0, BIT6);
3596
3597 tx_set_idle(info);
3598
3599 tx_stop(info);
3600 rx_stop(info);
3601}
3602
3603void rx_stop(MGSLPC_INFO *info)
3604{
3605 if (debug_level >= DEBUG_LEVEL_ISR)
3606 printk("%s(%d):rx_stop(%s)\n",
3607 __FILE__,__LINE__, info->device_name );
3608
3609 /* MODE:03 RAC Receiver Active, 0=inactive */
3610 clear_reg_bits(info, CHA + MODE, BIT3);
3611
3612 info->rx_enabled = 0;
3613 info->rx_overflow = 0;
3614}
3615
3616void rx_start(MGSLPC_INFO *info)
3617{
3618 if (debug_level >= DEBUG_LEVEL_ISR)
3619 printk("%s(%d):rx_start(%s)\n",
3620 __FILE__,__LINE__, info->device_name );
3621
3622 rx_reset_buffers(info);
3623 info->rx_enabled = 0;
3624 info->rx_overflow = 0;
3625
3626 /* MODE:03 RAC Receiver Active, 1=active */
3627 set_reg_bits(info, CHA + MODE, BIT3);
3628
3629 info->rx_enabled = 1;
3630}
3631
3632void tx_start(MGSLPC_INFO *info)
3633{
3634 if (debug_level >= DEBUG_LEVEL_ISR)
3635 printk("%s(%d):tx_start(%s)\n",
3636 __FILE__,__LINE__, info->device_name );
3637
3638 if (info->tx_count) {
3639 /* If auto RTS enabled and RTS is inactive, then assert */
3640 /* RTS and set a flag indicating that the driver should */
3641 /* negate RTS when the transmission completes. */
3642 info->drop_rts_on_tx_done = 0;
3643
3644 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3645 get_signals(info);
3646 if (!(info->serial_signals & SerialSignal_RTS)) {
3647 info->serial_signals |= SerialSignal_RTS;
3648 set_signals(info);
3649 info->drop_rts_on_tx_done = 1;
3650 }
3651 }
3652
3653 if (info->params.mode == MGSL_MODE_ASYNC) {
3654 if (!info->tx_active) {
3655 info->tx_active = 1;
3656 tx_ready(info);
3657 }
3658 } else {
3659 info->tx_active = 1;
3660 tx_ready(info);
3661 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3662 add_timer(&info->tx_timer);
3663 }
3664 }
3665
3666 if (!info->tx_enabled)
3667 info->tx_enabled = 1;
3668}
3669
3670void tx_stop(MGSLPC_INFO *info)
3671{
3672 if (debug_level >= DEBUG_LEVEL_ISR)
3673 printk("%s(%d):tx_stop(%s)\n",
3674 __FILE__,__LINE__, info->device_name );
3675
3676 del_timer(&info->tx_timer);
3677
3678 info->tx_enabled = 0;
3679 info->tx_active = 0;
3680}
3681
3682/* Reset the adapter to a known state and prepare it for further use.
3683 */
3684void reset_device(MGSLPC_INFO *info)
3685{
3686 /* power up both channels (set BIT7) */
3687 write_reg(info, CHA + CCR0, 0x80);
3688 write_reg(info, CHB + CCR0, 0x80);
3689 write_reg(info, CHA + MODE, 0);
3690 write_reg(info, CHB + MODE, 0);
3691
3692 /* disable all interrupts */
3693 irq_disable(info, CHA, 0xffff);
3694 irq_disable(info, CHB, 0xffff);
3695 port_irq_disable(info, 0xff);
3696
3697 /* PCR Port Configuration Register
3698 *
3699 * 07..04 DEC[3..0] Serial I/F select outputs
3700 * 03 output, 1=AUTO CTS control enabled
3701 * 02 RI Ring Indicator input 0=active
3702 * 01 DSR input 0=active
3703 * 00 DTR output 0=active
3704 *
3705 * 0000 0110
3706 */
3707 write_reg(info, PCR, 0x06);
3708
3709 /* PVR Port Value Register
3710 *
3711 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3712 * 03 AUTO CTS output 1=enabled
3713 * 02 RI Ring Indicator input
3714 * 01 DSR input
3715 * 00 DTR output (1=inactive)
3716 *
3717 * 0000 0001
3718 */
3719// write_reg(info, PVR, PVR_DTR);
3720
3721 /* IPC Interrupt Port Configuration
3722 *
3723 * 07 VIS 1=Masked interrupts visible
3724 * 06..05 Reserved, 0
3725 * 04..03 SLA Slave address, 00 ignored
3726 * 02 CASM Cascading Mode, 1=daisy chain
3727 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3728 *
3729 * 0000 0101
3730 */
3731 write_reg(info, IPC, 0x05);
3732}
3733
3734void async_mode(MGSLPC_INFO *info)
3735{
3736 unsigned char val;
3737
3738 /* disable all interrupts */
3739 irq_disable(info, CHA, 0xffff);
3740 irq_disable(info, CHB, 0xffff);
3741 port_irq_disable(info, 0xff);
3742
3743 /* MODE
3744 *
3745 * 07 Reserved, 0
3746 * 06 FRTS RTS State, 0=active
3747 * 05 FCTS Flow Control on CTS
3748 * 04 FLON Flow Control Enable
3749 * 03 RAC Receiver Active, 0 = inactive
3750 * 02 RTS 0=Auto RTS, 1=manual RTS
3751 * 01 TRS Timer Resolution, 1=512
3752 * 00 TLP Test Loop, 0 = no loop
3753 *
3754 * 0000 0110
3755 */
3756 val = 0x06;
3757 if (info->params.loopback)
3758 val |= BIT0;
3759
3760 /* preserve RTS state */
3761 if (!(info->serial_signals & SerialSignal_RTS))
3762 val |= BIT6;
3763 write_reg(info, CHA + MODE, val);
3764
3765 /* CCR0
3766 *
3767 * 07 PU Power Up, 1=active, 0=power down
3768 * 06 MCE Master Clock Enable, 1=enabled
3769 * 05 Reserved, 0
3770 * 04..02 SC[2..0] Encoding, 000=NRZ
3771 * 01..00 SM[1..0] Serial Mode, 11=Async
3772 *
3773 * 1000 0011
3774 */
3775 write_reg(info, CHA + CCR0, 0x83);
3776
3777 /* CCR1
3778 *
3779 * 07..05 Reserved, 0
3780 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3781 * 03 BCR Bit Clock Rate, 1=16x
3782 * 02..00 CM[2..0] Clock Mode, 111=BRG
3783 *
3784 * 0001 1111
3785 */
3786 write_reg(info, CHA + CCR1, 0x1f);
3787
3788 /* CCR2 (channel A)
3789 *
3790 * 07..06 BGR[9..8] Baud rate bits 9..8
3791 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3792 * 04 SSEL Clock source select, 1=submode b
3793 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3794 * 02 RWX Read/Write Exchange 0=disabled
3795 * 01 Reserved, 0
3796 * 00 DIV, data inversion 0=disabled, 1=enabled
3797 *
3798 * 0001 0000
3799 */
3800 write_reg(info, CHA + CCR2, 0x10);
3801
3802 /* CCR3
3803 *
3804 * 07..01 Reserved, 0
3805 * 00 PSD DPLL Phase Shift Disable
3806 *
3807 * 0000 0000
3808 */
3809 write_reg(info, CHA + CCR3, 0);
3810
3811 /* CCR4
3812 *
3813 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3814 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3815 * 05 TST1 Test Pin, 0=normal operation
3816 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3817 * 03..00 Reserved, must be 0
3818 *
3819 * 0101 0000
3820 */
3821 write_reg(info, CHA + CCR4, 0x50);
3822 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3823
3824 /* DAFO Data Format
3825 *
3826 * 07 Reserved, 0
3827 * 06 XBRK transmit break, 0=normal operation
3828 * 05 Stop bits (0=1, 1=2)
3829 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3830 * 02 PAREN Parity Enable
3831 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3832 *
3833 */
3834 val = 0x00;
3835 if (info->params.data_bits != 8)
3836 val |= BIT0; /* 7 bits */
3837 if (info->params.stop_bits != 1)
3838 val |= BIT5;
3839 if (info->params.parity != ASYNC_PARITY_NONE)
3840 {
3841 val |= BIT2; /* Parity enable */
3842 if (info->params.parity == ASYNC_PARITY_ODD)
3843 val |= BIT3;
3844 else
3845 val |= BIT4;
3846 }
3847 write_reg(info, CHA + DAFO, val);
3848
3849 /* RFC Rx FIFO Control
3850 *
3851 * 07 Reserved, 0
3852 * 06 DPS, 1=parity bit not stored in data byte
3853 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3854 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3855 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3856 * 01 Reserved, 0
3857 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3858 *
3859 * 0101 1100
3860 */
3861 write_reg(info, CHA + RFC, 0x5c);
3862
3863 /* RLCR Receive length check register
3864 *
3865 * Max frame length = (RL + 1) * 32
3866 */
3867 write_reg(info, CHA + RLCR, 0);
3868
3869 /* XBCH Transmit Byte Count High
3870 *
3871 * 07 DMA mode, 0 = interrupt driven
3872 * 06 NRM, 0=ABM (ignored)
3873 * 05 CAS Carrier Auto Start
3874 * 04 XC Transmit Continuously (ignored)
3875 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3876 *
3877 * 0000 0000
3878 */
3879 val = 0x00;
3880 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3881 val |= BIT5;
3882 write_reg(info, CHA + XBCH, val);
3883 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3884 irq_enable(info, CHA, IRQ_CTS);
3885
3886 /* MODE:03 RAC Receiver Active, 1=active */
3887 set_reg_bits(info, CHA + MODE, BIT3);
3888 enable_auxclk(info);
3889 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3890 irq_enable(info, CHB, IRQ_CTS);
3891 /* PVR[3] 1=AUTO CTS active */
3892 set_reg_bits(info, CHA + PVR, BIT3);
3893 } else
3894 clear_reg_bits(info, CHA + PVR, BIT3);
3895 irq_enable(info, CHA,
3896 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3897 IRQ_ALLSENT + IRQ_TXFIFO);
3898 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3899 wait_command_complete(info, CHA);
3900 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3901}
3902
3903/* Set the HDLC idle mode for the transmitter.
3904 */
3905void tx_set_idle(MGSLPC_INFO *info)
3906{
3907 /* Note: ESCC2 only supports flags and one idle modes */
3908 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3909 set_reg_bits(info, CHA + CCR1, BIT3);
3910 else
3911 clear_reg_bits(info, CHA + CCR1, BIT3);
3912}
3913
3914/* get state of the V24 status (input) signals.
3915 */
3916void get_signals(MGSLPC_INFO *info)
3917{
3918 unsigned char status = 0;
3919
3920 /* preserve DTR and RTS */
3921 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3922
3923 if (read_reg(info, CHB + VSTR) & BIT7)
3924 info->serial_signals |= SerialSignal_DCD;
3925 if (read_reg(info, CHB + STAR) & BIT1)
3926 info->serial_signals |= SerialSignal_CTS;
3927
3928 status = read_reg(info, CHA + PVR);
3929 if (!(status & PVR_RI))
3930 info->serial_signals |= SerialSignal_RI;
3931 if (!(status & PVR_DSR))
3932 info->serial_signals |= SerialSignal_DSR;
3933}
3934
3935/* Set the state of DTR and RTS based on contents of
3936 * serial_signals member of device extension.
3937 */
3938void set_signals(MGSLPC_INFO *info)
3939{
3940 unsigned char val;
3941
3942 val = read_reg(info, CHA + MODE);
3943 if (info->params.mode == MGSL_MODE_ASYNC) {
3944 if (info->serial_signals & SerialSignal_RTS)
3945 val &= ~BIT6;
3946 else
3947 val |= BIT6;
3948 } else {
3949 if (info->serial_signals & SerialSignal_RTS)
3950 val |= BIT2;
3951 else
3952 val &= ~BIT2;
3953 }
3954 write_reg(info, CHA + MODE, val);
3955
3956 if (info->serial_signals & SerialSignal_DTR)
3957 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3958 else
3959 set_reg_bits(info, CHA + PVR, PVR_DTR);
3960}
3961
3962void rx_reset_buffers(MGSLPC_INFO *info)
3963{
3964 RXBUF *buf;
3965 int i;
3966
3967 info->rx_put = 0;
3968 info->rx_get = 0;
3969 info->rx_frame_count = 0;
3970 for (i=0 ; i < info->rx_buf_count ; i++) {
3971 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3972 buf->status = buf->count = 0;
3973 }
3974}
3975
3976/* Attempt to return a received HDLC frame
3977 * Only frames received without errors are returned.
3978 *
3979 * Returns 1 if frame returned, otherwise 0
3980 */
3981int rx_get_frame(MGSLPC_INFO *info)
3982{
3983 unsigned short status;
3984 RXBUF *buf;
3985 unsigned int framesize = 0;
3986 unsigned long flags;
3987 struct tty_struct *tty = info->tty;
3988 int return_frame = 0;
3989
3990 if (info->rx_frame_count == 0)
3991 return 0;
3992
3993 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3994
3995 status = buf->status;
3996
3997 /* 07 VFR 1=valid frame
3998 * 06 RDO 1=data overrun
3999 * 05 CRC 1=OK, 0=error
4000 * 04 RAB 1=frame aborted
4001 */
4002 if ((status & 0xf0) != 0xA0) {
4003 if (!(status & BIT7) || (status & BIT4))
4004 info->icount.rxabort++;
4005 else if (status & BIT6)
4006 info->icount.rxover++;
4007 else if (!(status & BIT5)) {
4008 info->icount.rxcrc++;
4009 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
4010 return_frame = 1;
4011 }
4012 framesize = 0;
4013#ifdef CONFIG_HDLC
4014 {
4015 struct net_device_stats *stats = hdlc_stats(info->netdev);
4016 stats->rx_errors++;
4017 stats->rx_frame_errors++;
4018 }
4019#endif
4020 } else
4021 return_frame = 1;
4022
4023 if (return_frame)
4024 framesize = buf->count;
4025
4026 if (debug_level >= DEBUG_LEVEL_BH)
4027 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
4028 __FILE__,__LINE__,info->device_name,status,framesize);
4029
4030 if (debug_level >= DEBUG_LEVEL_DATA)
4031 trace_block(info, buf->data, framesize, 0);
4032
4033 if (framesize) {
4034 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
4035 framesize+1 > info->max_frame_size) ||
4036 framesize > info->max_frame_size)
4037 info->icount.rxlong++;
4038 else {
4039 if (status & BIT5)
4040 info->icount.rxok++;
4041
4042 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
4043 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
4044 ++framesize;
4045 }
4046
4047#ifdef CONFIG_HDLC
4048 if (info->netcount)
4049 hdlcdev_rx(info, buf->data, framesize);
4050 else
4051#endif
4052 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
4053 }
4054 }
4055
4056 spin_lock_irqsave(&info->lock,flags);
4057 buf->status = buf->count = 0;
4058 info->rx_frame_count--;
4059 info->rx_get++;
4060 if (info->rx_get >= info->rx_buf_count)
4061 info->rx_get = 0;
4062 spin_unlock_irqrestore(&info->lock,flags);
4063
4064 return 1;
4065}
4066
4067BOOLEAN register_test(MGSLPC_INFO *info)
4068{
4069 static unsigned char patterns[] =
4070 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
4071 static unsigned int count = sizeof(patterns) / sizeof(patterns[0]);
4072 unsigned int i;
4073 BOOLEAN rc = TRUE;
4074 unsigned long flags;
4075
4076 spin_lock_irqsave(&info->lock,flags);
4077 reset_device(info);
4078
4079 for (i = 0; i < count; i++) {
4080 write_reg(info, XAD1, patterns[i]);
4081 write_reg(info, XAD2, patterns[(i + 1) % count]);
4082 if ((read_reg(info, XAD1) != patterns[i]) ||
4083 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
4084 rc = FALSE;
4085 break;
4086 }
4087 }
4088
4089 spin_unlock_irqrestore(&info->lock,flags);
4090 return rc;
4091}
4092
4093BOOLEAN irq_test(MGSLPC_INFO *info)
4094{
4095 unsigned long end_time;
4096 unsigned long flags;
4097
4098 spin_lock_irqsave(&info->lock,flags);
4099 reset_device(info);
4100
4101 info->testing_irq = TRUE;
4102 hdlc_mode(info);
4103
4104 info->irq_occurred = FALSE;
4105
4106 /* init hdlc mode */
4107
4108 irq_enable(info, CHA, IRQ_TIMER);
4109 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4110 issue_command(info, CHA, CMD_START_TIMER);
4111
4112 spin_unlock_irqrestore(&info->lock,flags);
4113
4114 end_time=100;
4115 while(end_time-- && !info->irq_occurred) {
4116 msleep_interruptible(10);
4117 }
4118
4119 info->testing_irq = FALSE;
4120
4121 spin_lock_irqsave(&info->lock,flags);
4122 reset_device(info);
4123 spin_unlock_irqrestore(&info->lock,flags);
4124
4125 return info->irq_occurred ? TRUE : FALSE;
4126}
4127
4128int adapter_test(MGSLPC_INFO *info)
4129{
4130 if (!register_test(info)) {
4131 info->init_error = DiagStatus_AddressFailure;
4132 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4133 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4134 return -ENODEV;
4135 }
4136
4137 if (!irq_test(info)) {
4138 info->init_error = DiagStatus_IrqFailure;
4139 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4140 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4141 return -ENODEV;
4142 }
4143
4144 if (debug_level >= DEBUG_LEVEL_INFO)
4145 printk("%s(%d):device %s passed diagnostics\n",
4146 __FILE__,__LINE__,info->device_name);
4147 return 0;
4148}
4149
4150void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4151{
4152 int i;
4153 int linecount;
4154 if (xmit)
4155 printk("%s tx data:\n",info->device_name);
4156 else
4157 printk("%s rx data:\n",info->device_name);
4158
4159 while(count) {
4160 if (count > 16)
4161 linecount = 16;
4162 else
4163 linecount = count;
4164
4165 for(i=0;i<linecount;i++)
4166 printk("%02X ",(unsigned char)data[i]);
4167 for(;i<17;i++)
4168 printk(" ");
4169 for(i=0;i<linecount;i++) {
4170 if (data[i]>=040 && data[i]<=0176)
4171 printk("%c",data[i]);
4172 else
4173 printk(".");
4174 }
4175 printk("\n");
4176
4177 data += linecount;
4178 count -= linecount;
4179 }
4180}
4181
4182/* HDLC frame time out
4183 * update stats and do tx completion processing
4184 */
4185void tx_timeout(unsigned long context)
4186{
4187 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4188 unsigned long flags;
4189
4190 if ( debug_level >= DEBUG_LEVEL_INFO )
4191 printk( "%s(%d):tx_timeout(%s)\n",
4192 __FILE__,__LINE__,info->device_name);
4193 if(info->tx_active &&
4194 info->params.mode == MGSL_MODE_HDLC) {
4195 info->icount.txtimeout++;
4196 }
4197 spin_lock_irqsave(&info->lock,flags);
4198 info->tx_active = 0;
4199 info->tx_count = info->tx_put = info->tx_get = 0;
4200
4201 spin_unlock_irqrestore(&info->lock,flags);
4202
4203#ifdef CONFIG_HDLC
4204 if (info->netcount)
4205 hdlcdev_tx_done(info);
4206 else
4207#endif
4208 bh_transmit(info);
4209}
4210
4211#ifdef CONFIG_HDLC
4212
4213/**
4214 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4215 * set encoding and frame check sequence (FCS) options
4216 *
4217 * dev pointer to network device structure
4218 * encoding serial encoding setting
4219 * parity FCS setting
4220 *
4221 * returns 0 if success, otherwise error code
4222 */
4223static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4224 unsigned short parity)
4225{
4226 MGSLPC_INFO *info = dev_to_port(dev);
4227 unsigned char new_encoding;
4228 unsigned short new_crctype;
4229
4230 /* return error if TTY interface open */
4231 if (info->count)
4232 return -EBUSY;
4233
4234 switch (encoding)
4235 {
4236 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4237 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4238 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4239 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4240 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4241 default: return -EINVAL;
4242 }
4243
4244 switch (parity)
4245 {
4246 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4247 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4248 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4249 default: return -EINVAL;
4250 }
4251
4252 info->params.encoding = new_encoding;
4253 info->params.crc_type = new_crctype;;
4254
4255 /* if network interface up, reprogram hardware */
4256 if (info->netcount)
4257 mgslpc_program_hw(info);
4258
4259 return 0;
4260}
4261
4262/**
4263 * called by generic HDLC layer to send frame
4264 *
4265 * skb socket buffer containing HDLC frame
4266 * dev pointer to network device structure
4267 *
4268 * returns 0 if success, otherwise error code
4269 */
4270static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4271{
4272 MGSLPC_INFO *info = dev_to_port(dev);
4273 struct net_device_stats *stats = hdlc_stats(dev);
4274 unsigned long flags;
4275
4276 if (debug_level >= DEBUG_LEVEL_INFO)
4277 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4278
4279 /* stop sending until this frame completes */
4280 netif_stop_queue(dev);
4281
4282 /* copy data to device buffers */
4283 memcpy(info->tx_buf, skb->data, skb->len);
4284 info->tx_get = 0;
4285 info->tx_put = info->tx_count = skb->len;
4286
4287 /* update network statistics */
4288 stats->tx_packets++;
4289 stats->tx_bytes += skb->len;
4290
4291 /* done with socket buffer, so free it */
4292 dev_kfree_skb(skb);
4293
4294 /* save start time for transmit timeout detection */
4295 dev->trans_start = jiffies;
4296
4297 /* start hardware transmitter if necessary */
4298 spin_lock_irqsave(&info->lock,flags);
4299 if (!info->tx_active)
4300 tx_start(info);
4301 spin_unlock_irqrestore(&info->lock,flags);
4302
4303 return 0;
4304}
4305
4306/**
4307 * called by network layer when interface enabled
4308 * claim resources and initialize hardware
4309 *
4310 * dev pointer to network device structure
4311 *
4312 * returns 0 if success, otherwise error code
4313 */
4314static int hdlcdev_open(struct net_device *dev)
4315{
4316 MGSLPC_INFO *info = dev_to_port(dev);
4317 int rc;
4318 unsigned long flags;
4319
4320 if (debug_level >= DEBUG_LEVEL_INFO)
4321 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4322
4323 /* generic HDLC layer open processing */
4324 if ((rc = hdlc_open(dev)))
4325 return rc;
4326
4327 /* arbitrate between network and tty opens */
4328 spin_lock_irqsave(&info->netlock, flags);
4329 if (info->count != 0 || info->netcount != 0) {
4330 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4331 spin_unlock_irqrestore(&info->netlock, flags);
4332 return -EBUSY;
4333 }
4334 info->netcount=1;
4335 spin_unlock_irqrestore(&info->netlock, flags);
4336
4337 /* claim resources and init adapter */
4338 if ((rc = startup(info)) != 0) {
4339 spin_lock_irqsave(&info->netlock, flags);
4340 info->netcount=0;
4341 spin_unlock_irqrestore(&info->netlock, flags);
4342 return rc;
4343 }
4344
4345 /* assert DTR and RTS, apply hardware settings */
4346 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4347 mgslpc_program_hw(info);
4348
4349 /* enable network layer transmit */
4350 dev->trans_start = jiffies;
4351 netif_start_queue(dev);
4352
4353 /* inform generic HDLC layer of current DCD status */
4354 spin_lock_irqsave(&info->lock, flags);
4355 get_signals(info);
4356 spin_unlock_irqrestore(&info->lock, flags);
4357 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
4358
4359 return 0;
4360}
4361
4362/**
4363 * called by network layer when interface is disabled
4364 * shutdown hardware and release resources
4365 *
4366 * dev pointer to network device structure
4367 *
4368 * returns 0 if success, otherwise error code
4369 */
4370static int hdlcdev_close(struct net_device *dev)
4371{
4372 MGSLPC_INFO *info = dev_to_port(dev);
4373 unsigned long flags;
4374
4375 if (debug_level >= DEBUG_LEVEL_INFO)
4376 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4377
4378 netif_stop_queue(dev);
4379
4380 /* shutdown adapter and release resources */
4381 shutdown(info);
4382
4383 hdlc_close(dev);
4384
4385 spin_lock_irqsave(&info->netlock, flags);
4386 info->netcount=0;
4387 spin_unlock_irqrestore(&info->netlock, flags);
4388
4389 return 0;
4390}
4391
4392/**
4393 * called by network layer to process IOCTL call to network device
4394 *
4395 * dev pointer to network device structure
4396 * ifr pointer to network interface request structure
4397 * cmd IOCTL command code
4398 *
4399 * returns 0 if success, otherwise error code
4400 */
4401static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4402{
4403 const size_t size = sizeof(sync_serial_settings);
4404 sync_serial_settings new_line;
4405 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4406 MGSLPC_INFO *info = dev_to_port(dev);
4407 unsigned int flags;
4408
4409 if (debug_level >= DEBUG_LEVEL_INFO)
4410 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4411
4412 /* return error if TTY interface open */
4413 if (info->count)
4414 return -EBUSY;
4415
4416 if (cmd != SIOCWANDEV)
4417 return hdlc_ioctl(dev, ifr, cmd);
4418
4419 switch(ifr->ifr_settings.type) {
4420 case IF_GET_IFACE: /* return current sync_serial_settings */
4421
4422 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4423 if (ifr->ifr_settings.size < size) {
4424 ifr->ifr_settings.size = size; /* data size wanted */
4425 return -ENOBUFS;
4426 }
4427
4428 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4429 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4430 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4431 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4432
4433 switch (flags){
4434 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4435 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4436 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4437 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4438 default: new_line.clock_type = CLOCK_DEFAULT;
4439 }
4440
4441 new_line.clock_rate = info->params.clock_speed;
4442 new_line.loopback = info->params.loopback ? 1:0;
4443
4444 if (copy_to_user(line, &new_line, size))
4445 return -EFAULT;
4446 return 0;
4447
4448 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4449
4450 if(!capable(CAP_NET_ADMIN))
4451 return -EPERM;
4452 if (copy_from_user(&new_line, line, size))
4453 return -EFAULT;
4454
4455 switch (new_line.clock_type)
4456 {
4457 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4458 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4459 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4460 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4461 case CLOCK_DEFAULT: flags = info->params.flags &
4462 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4463 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4464 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4465 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4466 default: return -EINVAL;
4467 }
4468
4469 if (new_line.loopback != 0 && new_line.loopback != 1)
4470 return -EINVAL;
4471
4472 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4473 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4474 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4475 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4476 info->params.flags |= flags;
4477
4478 info->params.loopback = new_line.loopback;
4479
4480 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4481 info->params.clock_speed = new_line.clock_rate;
4482 else
4483 info->params.clock_speed = 0;
4484
4485 /* if network interface up, reprogram hardware */
4486 if (info->netcount)
4487 mgslpc_program_hw(info);
4488 return 0;
4489
4490 default:
4491 return hdlc_ioctl(dev, ifr, cmd);
4492 }
4493}
4494
4495/**
4496 * called by network layer when transmit timeout is detected
4497 *
4498 * dev pointer to network device structure
4499 */
4500static void hdlcdev_tx_timeout(struct net_device *dev)
4501{
4502 MGSLPC_INFO *info = dev_to_port(dev);
4503 struct net_device_stats *stats = hdlc_stats(dev);
4504 unsigned long flags;
4505
4506 if (debug_level >= DEBUG_LEVEL_INFO)
4507 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4508
4509 stats->tx_errors++;
4510 stats->tx_aborted_errors++;
4511
4512 spin_lock_irqsave(&info->lock,flags);
4513 tx_stop(info);
4514 spin_unlock_irqrestore(&info->lock,flags);
4515
4516 netif_wake_queue(dev);
4517}
4518
4519/**
4520 * called by device driver when transmit completes
4521 * reenable network layer transmit if stopped
4522 *
4523 * info pointer to device instance information
4524 */
4525static void hdlcdev_tx_done(MGSLPC_INFO *info)
4526{
4527 if (netif_queue_stopped(info->netdev))
4528 netif_wake_queue(info->netdev);
4529}
4530
4531/**
4532 * called by device driver when frame received
4533 * pass frame to network layer
4534 *
4535 * info pointer to device instance information
4536 * buf pointer to buffer contianing frame data
4537 * size count of data bytes in buf
4538 */
4539static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4540{
4541 struct sk_buff *skb = dev_alloc_skb(size);
4542 struct net_device *dev = info->netdev;
4543 struct net_device_stats *stats = hdlc_stats(dev);
4544
4545 if (debug_level >= DEBUG_LEVEL_INFO)
4546 printk("hdlcdev_rx(%s)\n",dev->name);
4547
4548 if (skb == NULL) {
4549 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4550 stats->rx_dropped++;
4551 return;
4552 }
4553
4554 memcpy(skb_put(skb, size),buf,size);
4555
4556 skb->protocol = hdlc_type_trans(skb, info->netdev);
4557
4558 stats->rx_packets++;
4559 stats->rx_bytes += size;
4560
4561 netif_rx(skb);
4562
4563 info->netdev->last_rx = jiffies;
4564}
4565
4566/**
4567 * called by device driver when adding device instance
4568 * do generic HDLC initialization
4569 *
4570 * info pointer to device instance information
4571 *
4572 * returns 0 if success, otherwise error code
4573 */
4574static int hdlcdev_init(MGSLPC_INFO *info)
4575{
4576 int rc;
4577 struct net_device *dev;
4578 hdlc_device *hdlc;
4579
4580 /* allocate and initialize network and HDLC layer objects */
4581
4582 if (!(dev = alloc_hdlcdev(info))) {
4583 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4584 return -ENOMEM;
4585 }
4586
4587 /* for network layer reporting purposes only */
4588 dev->base_addr = info->io_base;
4589 dev->irq = info->irq_level;
4590
4591 /* network layer callbacks and settings */
4592 dev->do_ioctl = hdlcdev_ioctl;
4593 dev->open = hdlcdev_open;
4594 dev->stop = hdlcdev_close;
4595 dev->tx_timeout = hdlcdev_tx_timeout;
4596 dev->watchdog_timeo = 10*HZ;
4597 dev->tx_queue_len = 50;
4598
4599 /* generic HDLC layer callbacks and settings */
4600 hdlc = dev_to_hdlc(dev);
4601 hdlc->attach = hdlcdev_attach;
4602 hdlc->xmit = hdlcdev_xmit;
4603
4604 /* register objects with HDLC layer */
4605 if ((rc = register_hdlc_device(dev))) {
4606 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4607 free_netdev(dev);
4608 return rc;
4609 }
4610
4611 info->netdev = dev;
4612 return 0;
4613}
4614
4615/**
4616 * called by device driver when removing device instance
4617 * do generic HDLC cleanup
4618 *
4619 * info pointer to device instance information
4620 */
4621static void hdlcdev_exit(MGSLPC_INFO *info)
4622{
4623 unregister_hdlc_device(info->netdev);
4624 free_netdev(info->netdev);
4625 info->netdev = NULL;
4626}
4627
4628#endif /* CONFIG_HDLC */
4629