blob: 2a2d31687b72243de84451212ff52198f37ecc29 [file] [log] [blame]
Wei WANG67d16a42012-11-09 20:53:33 +08001/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
21 */
22
23#include <linux/module.h>
24#include <linux/bitops.h>
25#include <linux/delay.h>
26#include <linux/mfd/rtsx_pci.h>
27
28#include "rtsx_pcr.h"
29
30static u8 rtl8411_get_ic_version(struct rtsx_pcr *pcr)
31{
32 u8 val;
33
34 rtsx_pci_read_register(pcr, SYS_VER, &val);
35 return val & 0x0F;
36}
37
38static int rtl8411_extra_init_hw(struct rtsx_pcr *pcr)
39{
40 return rtsx_pci_write_register(pcr, CD_PAD_CTL,
41 CD_DISABLE_MASK | CD_AUTO_DISABLE, CD_ENABLE);
42}
43
44static int rtl8411_turn_on_led(struct rtsx_pcr *pcr)
45{
46 return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00);
47}
48
49static int rtl8411_turn_off_led(struct rtsx_pcr *pcr)
50{
51 return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01);
52}
53
54static int rtl8411_enable_auto_blink(struct rtsx_pcr *pcr)
55{
56 return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D);
57}
58
59static int rtl8411_disable_auto_blink(struct rtsx_pcr *pcr)
60{
61 return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00);
62}
63
64static int rtl8411_card_power_on(struct rtsx_pcr *pcr, int card)
65{
66 int err;
67
68 rtsx_pci_init_cmd(pcr);
69 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
70 BPP_POWER_MASK, BPP_POWER_5_PERCENT_ON);
71 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_CTL,
72 BPP_LDO_POWB, BPP_LDO_SUSPEND);
73 err = rtsx_pci_send_cmd(pcr, 100);
74 if (err < 0)
75 return err;
76
77 /* To avoid too large in-rush current */
78 udelay(150);
79
80 err = rtsx_pci_write_register(pcr, CARD_PWR_CTL,
81 BPP_POWER_MASK, BPP_POWER_10_PERCENT_ON);
82 if (err < 0)
83 return err;
84
85 udelay(150);
86
87 err = rtsx_pci_write_register(pcr, CARD_PWR_CTL,
88 BPP_POWER_MASK, BPP_POWER_15_PERCENT_ON);
89 if (err < 0)
90 return err;
91
92 udelay(150);
93
94 err = rtsx_pci_write_register(pcr, CARD_PWR_CTL,
95 BPP_POWER_MASK, BPP_POWER_ON);
96 if (err < 0)
97 return err;
98
99 return rtsx_pci_write_register(pcr, LDO_CTL, BPP_LDO_POWB, BPP_LDO_ON);
100}
101
102static int rtl8411_card_power_off(struct rtsx_pcr *pcr, int card)
103{
104 int err;
105
106 err = rtsx_pci_write_register(pcr, CARD_PWR_CTL,
107 BPP_POWER_MASK, BPP_POWER_OFF);
108 if (err < 0)
109 return err;
110
111 return rtsx_pci_write_register(pcr, LDO_CTL,
112 BPP_LDO_POWB, BPP_LDO_SUSPEND);
113}
114
Wei WANGd817ac42013-01-23 09:51:04 +0800115static int rtl8411_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
116{
117 u8 mask, val;
Roger Tseng88a7ee32013-02-04 15:45:58 +0800118 int err;
Wei WANGd817ac42013-01-23 09:51:04 +0800119
120 mask = (BPP_REG_TUNED18 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_MASK;
Roger Tseng88a7ee32013-02-04 15:45:58 +0800121 if (voltage == OUTPUT_3V3) {
122 err = rtsx_pci_write_register(pcr,
123 SD30_DRIVE_SEL, 0x07, DRIVER_TYPE_D);
124 if (err < 0)
125 return err;
Wei WANGd817ac42013-01-23 09:51:04 +0800126 val = (BPP_ASIC_3V3 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_3V3;
Roger Tseng88a7ee32013-02-04 15:45:58 +0800127 } else if (voltage == OUTPUT_1V8) {
128 err = rtsx_pci_write_register(pcr,
129 SD30_DRIVE_SEL, 0x07, DRIVER_TYPE_B);
130 if (err < 0)
131 return err;
Wei WANGd817ac42013-01-23 09:51:04 +0800132 val = (BPP_ASIC_1V8 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_1V8;
Roger Tseng88a7ee32013-02-04 15:45:58 +0800133 } else {
Wei WANGd817ac42013-01-23 09:51:04 +0800134 return -EINVAL;
Roger Tseng88a7ee32013-02-04 15:45:58 +0800135 }
Wei WANGd817ac42013-01-23 09:51:04 +0800136
137 return rtsx_pci_write_register(pcr, LDO_CTL, mask, val);
138}
139
Wei WANG67d16a42012-11-09 20:53:33 +0800140static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr)
141{
142 unsigned int card_exist;
143
144 card_exist = rtsx_pci_readl(pcr, RTSX_BIPR);
145 card_exist &= CARD_EXIST;
146 if (!card_exist) {
147 /* Enable card CD */
148 rtsx_pci_write_register(pcr, CD_PAD_CTL,
149 CD_DISABLE_MASK, CD_ENABLE);
150 /* Enable card interrupt */
151 rtsx_pci_write_register(pcr, EFUSE_CONTENT, 0xe0, 0x00);
152 return 0;
153 }
154
155 if (hweight32(card_exist) > 1) {
156 rtsx_pci_write_register(pcr, CARD_PWR_CTL,
157 BPP_POWER_MASK, BPP_POWER_5_PERCENT_ON);
158 msleep(100);
159
160 card_exist = rtsx_pci_readl(pcr, RTSX_BIPR);
161 if (card_exist & MS_EXIST)
162 card_exist = MS_EXIST;
163 else if (card_exist & SD_EXIST)
164 card_exist = SD_EXIST;
165 else
166 card_exist = 0;
167
168 rtsx_pci_write_register(pcr, CARD_PWR_CTL,
169 BPP_POWER_MASK, BPP_POWER_OFF);
170
171 dev_dbg(&(pcr->pci->dev),
172 "After CD deglitch, card_exist = 0x%x\n",
173 card_exist);
174 }
175
176 if (card_exist & MS_EXIST) {
177 /* Disable SD interrupt */
178 rtsx_pci_write_register(pcr, EFUSE_CONTENT, 0xe0, 0x40);
179 rtsx_pci_write_register(pcr, CD_PAD_CTL,
180 CD_DISABLE_MASK, MS_CD_EN_ONLY);
181 } else if (card_exist & SD_EXIST) {
182 /* Disable MS interrupt */
183 rtsx_pci_write_register(pcr, EFUSE_CONTENT, 0xe0, 0x80);
184 rtsx_pci_write_register(pcr, CD_PAD_CTL,
185 CD_DISABLE_MASK, SD_CD_EN_ONLY);
186 }
187
188 return card_exist;
189}
190
Wei WANGab4e8f82013-01-23 09:51:06 +0800191static int rtl8411_conv_clk_and_div_n(int input, int dir)
192{
193 int output;
194
195 if (dir == CLK_TO_DIV_N)
196 output = input * 4 / 5 - 2;
197 else
198 output = (input + 2) * 5 / 4;
199
200 return output;
201}
202
Wei WANG67d16a42012-11-09 20:53:33 +0800203static const struct pcr_ops rtl8411_pcr_ops = {
204 .extra_init_hw = rtl8411_extra_init_hw,
205 .optimize_phy = NULL,
206 .turn_on_led = rtl8411_turn_on_led,
207 .turn_off_led = rtl8411_turn_off_led,
208 .enable_auto_blink = rtl8411_enable_auto_blink,
209 .disable_auto_blink = rtl8411_disable_auto_blink,
210 .card_power_on = rtl8411_card_power_on,
211 .card_power_off = rtl8411_card_power_off,
Wei WANGd817ac42013-01-23 09:51:04 +0800212 .switch_output_voltage = rtl8411_switch_output_voltage,
Wei WANG67d16a42012-11-09 20:53:33 +0800213 .cd_deglitch = rtl8411_cd_deglitch,
Wei WANGab4e8f82013-01-23 09:51:06 +0800214 .conv_clk_and_div_n = rtl8411_conv_clk_and_div_n,
Wei WANG67d16a42012-11-09 20:53:33 +0800215};
216
217/* SD Pull Control Enable:
218 * SD_DAT[3:0] ==> pull up
219 * SD_CD ==> pull up
220 * SD_WP ==> pull up
221 * SD_CMD ==> pull up
222 * SD_CLK ==> pull down
223 */
224static const u32 rtl8411_sd_pull_ctl_enable_tbl[] = {
225 RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
226 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
227 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xA9),
228 RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09),
229 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x09),
230 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04),
231 0,
232};
233
234/* SD Pull Control Disable:
235 * SD_DAT[3:0] ==> pull down
236 * SD_CD ==> pull up
237 * SD_WP ==> pull down
238 * SD_CMD ==> pull down
239 * SD_CLK ==> pull down
240 */
241static const u32 rtl8411_sd_pull_ctl_disable_tbl[] = {
242 RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
243 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
244 RTSX_REG_PAIR(CARD_PULL_CTL3, 0x95),
245 RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09),
246 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05),
247 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04),
248 0,
249};
250
251/* MS Pull Control Enable:
252 * MS CD ==> pull up
253 * others ==> pull down
254 */
255static const u32 rtl8411_ms_pull_ctl_enable_tbl[] = {
256 RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
257 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
258 RTSX_REG_PAIR(CARD_PULL_CTL3, 0x95),
259 RTSX_REG_PAIR(CARD_PULL_CTL4, 0x05),
260 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05),
261 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04),
262 0,
263};
264
265/* MS Pull Control Disable:
266 * MS CD ==> pull up
267 * others ==> pull down
268 */
269static const u32 rtl8411_ms_pull_ctl_disable_tbl[] = {
270 RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
271 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
272 RTSX_REG_PAIR(CARD_PULL_CTL3, 0x95),
273 RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09),
274 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05),
275 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04),
276 0,
277};
278
279void rtl8411_init_params(struct rtsx_pcr *pcr)
280{
281 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
282 pcr->num_slots = 2;
283 pcr->ops = &rtl8411_pcr_ops;
284
285 pcr->ic_version = rtl8411_get_ic_version(pcr);
286 pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl;
287 pcr->sd_pull_ctl_disable_tbl = rtl8411_sd_pull_ctl_disable_tbl;
288 pcr->ms_pull_ctl_enable_tbl = rtl8411_ms_pull_ctl_enable_tbl;
289 pcr->ms_pull_ctl_disable_tbl = rtl8411_ms_pull_ctl_disable_tbl;
290}