blob: 6a3cddd156c47b79572d788b32a7662b957499c3 [file] [log] [blame]
Vladimir Kondratievdba4b742014-10-01 15:05:25 +03001/*
2 * Copyright (c) 2014 Qualcomm Atheros, Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef __WIL6210_UAPI_H__
18#define __WIL6210_UAPI_H__
19
20#if !defined(__KERNEL__)
21#define __user
22#endif
23
24#include <linux/sockios.h>
25
26/* Numbers SIOCDEVPRIVATE and SIOCDEVPRIVATE + 1
27 * are used by Android devices to implement PNO (preferred network offload).
28 * Albeit it is temporary solution, use different numbers to avoid conflicts
29 */
30
31/**
32 * Perform 32-bit I/O operation to the card memory
33 *
34 * User code should arrange data in memory like this:
35 *
36 * struct wil_memio io;
37 * struct ifreq ifr = {
38 * .ifr_data = &io,
39 * };
40 */
41#define WIL_IOCTL_MEMIO (SIOCDEVPRIVATE + 2)
42
43/**
44 * Perform block I/O operation to the card memory
45 *
46 * User code should arrange data in memory like this:
47 *
48 * void *buf;
49 * struct wil_memio_block io = {
50 * .block = buf,
51 * };
52 * struct ifreq ifr = {
53 * .ifr_data = &io,
54 * };
55 */
56#define WIL_IOCTL_MEMIO_BLOCK (SIOCDEVPRIVATE + 3)
57
58/**
59 * operation to perform
60 *
61 * @wil_mmio_op_mask - bits defining operation,
62 * @wil_mmio_addr_mask - bits defining addressing mode
63 */
64enum wil_memio_op {
65 wil_mmio_read = 0,
66 wil_mmio_write = 1,
67 wil_mmio_op_mask = 0xff,
68 wil_mmio_addr_linker = 0 << 8,
69 wil_mmio_addr_ahb = 1 << 8,
70 wil_mmio_addr_bar = 2 << 8,
71 wil_mmio_addr_mask = 0xff00,
72};
73
74struct wil_memio {
75 uint32_t op; /* enum wil_memio_op */
76 uint32_t addr; /* should be 32-bit aligned */
77 uint32_t val;
78};
79
80struct wil_memio_block {
81 uint32_t op; /* enum wil_memio_op */
82 uint32_t addr; /* should be 32-bit aligned */
83 uint32_t size; /* should be multiple of 4 */
84 void __user *block; /* block address */
85};
86
87#endif /* __WIL6210_UAPI_H__ */