Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1 | #ifndef _HFI1_KERNEL_H |
| 2 | #define _HFI1_KERNEL_H |
| 3 | /* |
| 4 | * |
| 5 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 6 | * redistributing this file, you may do so under either license. |
| 7 | * |
| 8 | * GPL LICENSE SUMMARY |
| 9 | * |
| 10 | * Copyright(c) 2015 Intel Corporation. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of version 2 of the GNU General Public License as |
| 14 | * published by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but |
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 19 | * General Public License for more details. |
| 20 | * |
| 21 | * BSD LICENSE |
| 22 | * |
| 23 | * Copyright(c) 2015 Intel Corporation. |
| 24 | * |
| 25 | * Redistribution and use in source and binary forms, with or without |
| 26 | * modification, are permitted provided that the following conditions |
| 27 | * are met: |
| 28 | * |
| 29 | * - Redistributions of source code must retain the above copyright |
| 30 | * notice, this list of conditions and the following disclaimer. |
| 31 | * - Redistributions in binary form must reproduce the above copyright |
| 32 | * notice, this list of conditions and the following disclaimer in |
| 33 | * the documentation and/or other materials provided with the |
| 34 | * distribution. |
| 35 | * - Neither the name of Intel Corporation nor the names of its |
| 36 | * contributors may be used to endorse or promote products derived |
| 37 | * from this software without specific prior written permission. |
| 38 | * |
| 39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 40 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 41 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 42 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 43 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 44 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 45 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 46 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 47 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 48 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 49 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 50 | * |
| 51 | */ |
| 52 | |
| 53 | #include <linux/interrupt.h> |
| 54 | #include <linux/pci.h> |
| 55 | #include <linux/dma-mapping.h> |
| 56 | #include <linux/mutex.h> |
| 57 | #include <linux/list.h> |
| 58 | #include <linux/scatterlist.h> |
| 59 | #include <linux/slab.h> |
| 60 | #include <linux/io.h> |
| 61 | #include <linux/fs.h> |
| 62 | #include <linux/completion.h> |
| 63 | #include <linux/kref.h> |
| 64 | #include <linux/sched.h> |
| 65 | #include <linux/cdev.h> |
| 66 | #include <linux/delay.h> |
| 67 | #include <linux/kthread.h> |
| 68 | |
| 69 | #include "chip_registers.h" |
| 70 | #include "common.h" |
| 71 | #include "verbs.h" |
| 72 | #include "pio.h" |
| 73 | #include "chip.h" |
| 74 | #include "mad.h" |
| 75 | #include "qsfp.h" |
| 76 | #include "platform_config.h" |
| 77 | |
| 78 | /* bumped 1 from s/w major version of TrueScale */ |
| 79 | #define HFI1_CHIP_VERS_MAJ 3U |
| 80 | |
| 81 | /* don't care about this except printing */ |
| 82 | #define HFI1_CHIP_VERS_MIN 0U |
| 83 | |
| 84 | /* The Organization Unique Identifier (Mfg code), and its position in GUID */ |
| 85 | #define HFI1_OUI 0x001175 |
| 86 | #define HFI1_OUI_LSB 40 |
| 87 | |
| 88 | #define DROP_PACKET_OFF 0 |
| 89 | #define DROP_PACKET_ON 1 |
| 90 | |
| 91 | extern unsigned long hfi1_cap_mask; |
| 92 | #define HFI1_CAP_KGET_MASK(mask, cap) ((mask) & HFI1_CAP_##cap) |
| 93 | #define HFI1_CAP_UGET_MASK(mask, cap) \ |
| 94 | (((mask) >> HFI1_CAP_USER_SHIFT) & HFI1_CAP_##cap) |
| 95 | #define HFI1_CAP_KGET(cap) (HFI1_CAP_KGET_MASK(hfi1_cap_mask, cap)) |
| 96 | #define HFI1_CAP_UGET(cap) (HFI1_CAP_UGET_MASK(hfi1_cap_mask, cap)) |
| 97 | #define HFI1_CAP_IS_KSET(cap) (!!HFI1_CAP_KGET(cap)) |
| 98 | #define HFI1_CAP_IS_USET(cap) (!!HFI1_CAP_UGET(cap)) |
| 99 | #define HFI1_MISC_GET() ((hfi1_cap_mask >> HFI1_CAP_MISC_SHIFT) & \ |
| 100 | HFI1_CAP_MISC_MASK) |
| 101 | |
| 102 | /* |
Niranjana Vishwanathapura | 82c2611 | 2015-11-11 00:35:19 -0500 | [diff] [blame] | 103 | * Control context is always 0 and handles the error packets. |
| 104 | * It also handles the VL15 and multicast packets. |
| 105 | */ |
| 106 | #define HFI1_CTRL_CTXT 0 |
| 107 | |
| 108 | /* |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 109 | * per driver stats, either not device nor port-specific, or |
| 110 | * summed over all of the devices and ports. |
| 111 | * They are described by name via ipathfs filesystem, so layout |
| 112 | * and number of elements can change without breaking compatibility. |
| 113 | * If members are added or deleted hfi1_statnames[] in debugfs.c must |
| 114 | * change to match. |
| 115 | */ |
| 116 | struct hfi1_ib_stats { |
| 117 | __u64 sps_ints; /* number of interrupts handled */ |
| 118 | __u64 sps_errints; /* number of error interrupts */ |
| 119 | __u64 sps_txerrs; /* tx-related packet errors */ |
| 120 | __u64 sps_rcverrs; /* non-crc rcv packet errors */ |
| 121 | __u64 sps_hwerrs; /* hardware errors reported (parity, etc.) */ |
| 122 | __u64 sps_nopiobufs; /* no pio bufs avail from kernel */ |
| 123 | __u64 sps_ctxts; /* number of contexts currently open */ |
| 124 | __u64 sps_lenerrs; /* number of kernel packets where RHF != LRH len */ |
| 125 | __u64 sps_buffull; |
| 126 | __u64 sps_hdrfull; |
| 127 | }; |
| 128 | |
| 129 | extern struct hfi1_ib_stats hfi1_stats; |
| 130 | extern const struct pci_error_handlers hfi1_pci_err_handler; |
| 131 | |
| 132 | /* |
| 133 | * First-cut criterion for "device is active" is |
| 134 | * two thousand dwords combined Tx, Rx traffic per |
| 135 | * 5-second interval. SMA packets are 64 dwords, |
| 136 | * and occur "a few per second", presumably each way. |
| 137 | */ |
| 138 | #define HFI1_TRAFFIC_ACTIVE_THRESHOLD (2000) |
| 139 | |
| 140 | /* |
| 141 | * Below contains all data related to a single context (formerly called port). |
| 142 | */ |
| 143 | |
| 144 | #ifdef CONFIG_DEBUG_FS |
| 145 | struct hfi1_opcode_stats_perctx; |
| 146 | #endif |
| 147 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 148 | struct ctxt_eager_bufs { |
| 149 | ssize_t size; /* total size of eager buffers */ |
| 150 | u32 count; /* size of buffers array */ |
| 151 | u32 numbufs; /* number of buffers allocated */ |
| 152 | u32 alloced; /* number of rcvarray entries used */ |
| 153 | u32 rcvtid_size; /* size of each eager rcv tid */ |
| 154 | u32 threshold; /* head update threshold */ |
| 155 | struct eager_buffer { |
| 156 | void *addr; |
| 157 | dma_addr_t phys; |
| 158 | ssize_t len; |
| 159 | } *buffers; |
| 160 | struct { |
| 161 | void *addr; |
| 162 | dma_addr_t phys; |
| 163 | } *rcvtids; |
| 164 | }; |
| 165 | |
| 166 | struct hfi1_ctxtdata { |
| 167 | /* shadow the ctxt's RcvCtrl register */ |
| 168 | u64 rcvctrl; |
| 169 | /* rcvhdrq base, needs mmap before useful */ |
| 170 | void *rcvhdrq; |
| 171 | /* kernel virtual address where hdrqtail is updated */ |
| 172 | volatile __le64 *rcvhdrtail_kvaddr; |
| 173 | /* |
| 174 | * Shared page for kernel to signal user processes that send buffers |
| 175 | * need disarming. The process should call HFI1_CMD_DISARM_BUFS |
| 176 | * or HFI1_CMD_ACK_EVENT with IPATH_EVENT_DISARM_BUFS set. |
| 177 | */ |
| 178 | unsigned long *user_event_mask; |
| 179 | /* when waiting for rcv or pioavail */ |
| 180 | wait_queue_head_t wait; |
| 181 | /* rcvhdrq size (for freeing) */ |
| 182 | size_t rcvhdrq_size; |
| 183 | /* number of rcvhdrq entries */ |
| 184 | u16 rcvhdrq_cnt; |
| 185 | /* size of each of the rcvhdrq entries */ |
| 186 | u16 rcvhdrqentsize; |
| 187 | /* mmap of hdrq, must fit in 44 bits */ |
| 188 | dma_addr_t rcvhdrq_phys; |
| 189 | dma_addr_t rcvhdrqtailaddr_phys; |
| 190 | struct ctxt_eager_bufs egrbufs; |
| 191 | /* this receive context's assigned PIO ACK send context */ |
| 192 | struct send_context *sc; |
| 193 | |
| 194 | /* dynamic receive available interrupt timeout */ |
| 195 | u32 rcvavail_timeout; |
| 196 | /* |
| 197 | * number of opens (including slave sub-contexts) on this instance |
| 198 | * (ignoring forks, dup, etc. for now) |
| 199 | */ |
| 200 | int cnt; |
| 201 | /* |
| 202 | * how much space to leave at start of eager TID entries for |
| 203 | * protocol use, on each TID |
| 204 | */ |
| 205 | /* instead of calculating it */ |
| 206 | unsigned ctxt; |
| 207 | /* non-zero if ctxt is being shared. */ |
| 208 | u16 subctxt_cnt; |
| 209 | /* non-zero if ctxt is being shared. */ |
| 210 | u16 subctxt_id; |
| 211 | u8 uuid[16]; |
| 212 | /* job key */ |
| 213 | u16 jkey; |
| 214 | /* number of RcvArray groups for this context. */ |
| 215 | u32 rcv_array_groups; |
| 216 | /* index of first eager TID entry. */ |
| 217 | u32 eager_base; |
| 218 | /* number of expected TID entries */ |
| 219 | u32 expected_count; |
| 220 | /* index of first expected TID entry. */ |
| 221 | u32 expected_base; |
| 222 | /* cursor into the exp group sets */ |
| 223 | atomic_t tidcursor; |
| 224 | /* number of exp TID groups assigned to the ctxt */ |
| 225 | u16 numtidgroups; |
| 226 | /* size of exp TID group fields in tidusemap */ |
| 227 | u16 tidmapcnt; |
| 228 | /* exp TID group usage bitfield array */ |
| 229 | unsigned long *tidusemap; |
| 230 | /* pinned pages for exp sends, allocated at open */ |
| 231 | struct page **tid_pg_list; |
| 232 | /* dma handles for exp tid pages */ |
| 233 | dma_addr_t *physshadow; |
| 234 | /* lock protecting all Expected TID data */ |
| 235 | spinlock_t exp_lock; |
| 236 | /* number of pio bufs for this ctxt (all procs, if shared) */ |
| 237 | u32 piocnt; |
| 238 | /* first pio buffer for this ctxt */ |
| 239 | u32 pio_base; |
| 240 | /* chip offset of PIO buffers for this ctxt */ |
| 241 | u32 piobufs; |
| 242 | /* per-context configuration flags */ |
Niranjana Vishwanathapura | 82c2611 | 2015-11-11 00:35:19 -0500 | [diff] [blame] | 243 | u32 flags; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 244 | /* per-context event flags for fileops/intr communication */ |
| 245 | unsigned long event_flags; |
| 246 | /* WAIT_RCV that timed out, no interrupt */ |
| 247 | u32 rcvwait_to; |
| 248 | /* WAIT_PIO that timed out, no interrupt */ |
| 249 | u32 piowait_to; |
| 250 | /* WAIT_RCV already happened, no wait */ |
| 251 | u32 rcvnowait; |
| 252 | /* WAIT_PIO already happened, no wait */ |
| 253 | u32 pionowait; |
| 254 | /* total number of polled urgent packets */ |
| 255 | u32 urgent; |
| 256 | /* saved total number of polled urgent packets for poll edge trigger */ |
| 257 | u32 urgent_poll; |
| 258 | /* pid of process using this ctxt */ |
| 259 | pid_t pid; |
| 260 | pid_t subpid[HFI1_MAX_SHARED_CTXTS]; |
| 261 | /* same size as task_struct .comm[], command that opened context */ |
Geliang Tang | c3af8a2 | 2015-10-08 22:04:26 -0700 | [diff] [blame] | 262 | char comm[TASK_COMM_LEN]; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 263 | /* so file ops can get at unit */ |
| 264 | struct hfi1_devdata *dd; |
| 265 | /* so functions that need physical port can get it easily */ |
| 266 | struct hfi1_pportdata *ppd; |
| 267 | /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */ |
| 268 | void *subctxt_uregbase; |
| 269 | /* An array of pages for the eager receive buffers * N */ |
| 270 | void *subctxt_rcvegrbuf; |
| 271 | /* An array of pages for the eager header queue entries * N */ |
| 272 | void *subctxt_rcvhdr_base; |
| 273 | /* The version of the library which opened this ctxt */ |
| 274 | u32 userversion; |
| 275 | /* Bitmask of active slaves */ |
| 276 | u32 active_slaves; |
| 277 | /* Type of packets or conditions we want to poll for */ |
| 278 | u16 poll_type; |
| 279 | /* receive packet sequence counter */ |
| 280 | u8 seq_cnt; |
| 281 | u8 redirect_seq_cnt; |
| 282 | /* ctxt rcvhdrq head offset */ |
| 283 | u32 head; |
| 284 | u32 pkt_count; |
| 285 | /* QPs waiting for context processing */ |
| 286 | struct list_head qp_wait_list; |
| 287 | /* interrupt handling */ |
| 288 | u64 imask; /* clear interrupt mask */ |
| 289 | int ireg; /* clear interrupt register */ |
| 290 | unsigned numa_id; /* numa node of this context */ |
| 291 | /* verbs stats per CTX */ |
| 292 | struct hfi1_opcode_stats_perctx *opstats; |
| 293 | /* |
| 294 | * This is the kernel thread that will keep making |
| 295 | * progress on the user sdma requests behind the scenes. |
| 296 | * There is one per context (shared contexts use the master's). |
| 297 | */ |
| 298 | struct task_struct *progress; |
| 299 | struct list_head sdma_queues; |
| 300 | spinlock_t sdma_qlock; |
| 301 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 302 | /* |
| 303 | * The interrupt handler for a particular receive context can vary |
| 304 | * throughout it's lifetime. This is not a lock protected data member so |
| 305 | * it must be updated atomically and the prev and new value must always |
| 306 | * be valid. Worst case is we process an extra interrupt and up to 64 |
| 307 | * packets with the wrong interrupt handler. |
| 308 | */ |
Dean Luick | f4f30031c | 2015-10-26 10:28:44 -0400 | [diff] [blame] | 309 | int (*do_interrupt)(struct hfi1_ctxtdata *rcd, int threaded); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 310 | }; |
| 311 | |
| 312 | /* |
| 313 | * Represents a single packet at a high level. Put commonly computed things in |
| 314 | * here so we do not have to keep doing them over and over. The rule of thumb is |
| 315 | * if something is used one time to derive some value, store that something in |
| 316 | * here. If it is used multiple times, then store the result of that derivation |
| 317 | * in here. |
| 318 | */ |
| 319 | struct hfi1_packet { |
| 320 | void *ebuf; |
| 321 | void *hdr; |
| 322 | struct hfi1_ctxtdata *rcd; |
| 323 | __le32 *rhf_addr; |
| 324 | struct hfi1_qp *qp; |
| 325 | struct hfi1_other_headers *ohdr; |
| 326 | u64 rhf; |
| 327 | u32 maxcnt; |
| 328 | u32 rhqoff; |
| 329 | u32 hdrqtail; |
| 330 | int numpkt; |
| 331 | u16 tlen; |
| 332 | u16 hlen; |
| 333 | s16 etail; |
| 334 | u16 rsize; |
| 335 | u8 updegr; |
| 336 | u8 rcv_flags; |
| 337 | u8 etype; |
| 338 | }; |
| 339 | |
| 340 | static inline bool has_sc4_bit(struct hfi1_packet *p) |
| 341 | { |
| 342 | return !!rhf_dc_info(p->rhf); |
| 343 | } |
| 344 | |
| 345 | /* |
| 346 | * Private data for snoop/capture support. |
| 347 | */ |
| 348 | struct hfi1_snoop_data { |
| 349 | int mode_flag; |
| 350 | struct cdev cdev; |
| 351 | struct device *class_dev; |
| 352 | spinlock_t snoop_lock; |
| 353 | struct list_head queue; |
| 354 | wait_queue_head_t waitq; |
| 355 | void *filter_value; |
| 356 | int (*filter_callback)(void *hdr, void *data, void *value); |
| 357 | u64 dcc_cfg; /* saved value of DCC Cfg register */ |
| 358 | }; |
| 359 | |
| 360 | /* snoop mode_flag values */ |
| 361 | #define HFI1_PORT_SNOOP_MODE 1U |
| 362 | #define HFI1_PORT_CAPTURE_MODE 2U |
| 363 | |
| 364 | struct hfi1_sge_state; |
| 365 | |
| 366 | /* |
| 367 | * Get/Set IB link-level config parameters for f_get/set_ib_cfg() |
| 368 | * Mostly for MADs that set or query link parameters, also ipath |
| 369 | * config interfaces |
| 370 | */ |
| 371 | #define HFI1_IB_CFG_LIDLMC 0 /* LID (LS16b) and Mask (MS16b) */ |
| 372 | #define HFI1_IB_CFG_LWID_DG_ENB 1 /* allowed Link-width downgrade */ |
| 373 | #define HFI1_IB_CFG_LWID_ENB 2 /* allowed Link-width */ |
| 374 | #define HFI1_IB_CFG_LWID 3 /* currently active Link-width */ |
| 375 | #define HFI1_IB_CFG_SPD_ENB 4 /* allowed Link speeds */ |
| 376 | #define HFI1_IB_CFG_SPD 5 /* current Link spd */ |
| 377 | #define HFI1_IB_CFG_RXPOL_ENB 6 /* Auto-RX-polarity enable */ |
| 378 | #define HFI1_IB_CFG_LREV_ENB 7 /* Auto-Lane-reversal enable */ |
| 379 | #define HFI1_IB_CFG_LINKLATENCY 8 /* Link Latency (IB1.2 only) */ |
| 380 | #define HFI1_IB_CFG_HRTBT 9 /* IB heartbeat off/enable/auto; DDR/QDR only */ |
| 381 | #define HFI1_IB_CFG_OP_VLS 10 /* operational VLs */ |
| 382 | #define HFI1_IB_CFG_VL_HIGH_CAP 11 /* num of VL high priority weights */ |
| 383 | #define HFI1_IB_CFG_VL_LOW_CAP 12 /* num of VL low priority weights */ |
| 384 | #define HFI1_IB_CFG_OVERRUN_THRESH 13 /* IB overrun threshold */ |
| 385 | #define HFI1_IB_CFG_PHYERR_THRESH 14 /* IB PHY error threshold */ |
| 386 | #define HFI1_IB_CFG_LINKDEFAULT 15 /* IB link default (sleep/poll) */ |
| 387 | #define HFI1_IB_CFG_PKEYS 16 /* update partition keys */ |
| 388 | #define HFI1_IB_CFG_MTU 17 /* update MTU in IBC */ |
| 389 | #define HFI1_IB_CFG_VL_HIGH_LIMIT 19 |
| 390 | #define HFI1_IB_CFG_PMA_TICKS 20 /* PMA sample tick resolution */ |
| 391 | #define HFI1_IB_CFG_PORT 21 /* switch port we are connected to */ |
| 392 | |
| 393 | /* |
| 394 | * HFI or Host Link States |
| 395 | * |
| 396 | * These describe the states the driver thinks the logical and physical |
| 397 | * states are in. Used as an argument to set_link_state(). Implemented |
| 398 | * as bits for easy multi-state checking. The actual state can only be |
| 399 | * one. |
| 400 | */ |
| 401 | #define __HLS_UP_INIT_BP 0 |
| 402 | #define __HLS_UP_ARMED_BP 1 |
| 403 | #define __HLS_UP_ACTIVE_BP 2 |
| 404 | #define __HLS_DN_DOWNDEF_BP 3 /* link down default */ |
| 405 | #define __HLS_DN_POLL_BP 4 |
| 406 | #define __HLS_DN_DISABLE_BP 5 |
| 407 | #define __HLS_DN_OFFLINE_BP 6 |
| 408 | #define __HLS_VERIFY_CAP_BP 7 |
| 409 | #define __HLS_GOING_UP_BP 8 |
| 410 | #define __HLS_GOING_OFFLINE_BP 9 |
| 411 | #define __HLS_LINK_COOLDOWN_BP 10 |
| 412 | |
| 413 | #define HLS_UP_INIT (1 << __HLS_UP_INIT_BP) |
| 414 | #define HLS_UP_ARMED (1 << __HLS_UP_ARMED_BP) |
| 415 | #define HLS_UP_ACTIVE (1 << __HLS_UP_ACTIVE_BP) |
| 416 | #define HLS_DN_DOWNDEF (1 << __HLS_DN_DOWNDEF_BP) /* link down default */ |
| 417 | #define HLS_DN_POLL (1 << __HLS_DN_POLL_BP) |
| 418 | #define HLS_DN_DISABLE (1 << __HLS_DN_DISABLE_BP) |
| 419 | #define HLS_DN_OFFLINE (1 << __HLS_DN_OFFLINE_BP) |
| 420 | #define HLS_VERIFY_CAP (1 << __HLS_VERIFY_CAP_BP) |
| 421 | #define HLS_GOING_UP (1 << __HLS_GOING_UP_BP) |
| 422 | #define HLS_GOING_OFFLINE (1 << __HLS_GOING_OFFLINE_BP) |
| 423 | #define HLS_LINK_COOLDOWN (1 << __HLS_LINK_COOLDOWN_BP) |
| 424 | |
| 425 | #define HLS_UP (HLS_UP_INIT | HLS_UP_ARMED | HLS_UP_ACTIVE) |
| 426 | |
| 427 | /* use this MTU size if none other is given */ |
| 428 | #define HFI1_DEFAULT_ACTIVE_MTU 8192 |
| 429 | /* use this MTU size as the default maximum */ |
| 430 | #define HFI1_DEFAULT_MAX_MTU 8192 |
| 431 | /* default partition key */ |
| 432 | #define DEFAULT_PKEY 0xffff |
| 433 | |
| 434 | /* |
| 435 | * Possible fabric manager config parameters for fm_{get,set}_table() |
| 436 | */ |
| 437 | #define FM_TBL_VL_HIGH_ARB 1 /* Get/set VL high prio weights */ |
| 438 | #define FM_TBL_VL_LOW_ARB 2 /* Get/set VL low prio weights */ |
| 439 | #define FM_TBL_BUFFER_CONTROL 3 /* Get/set Buffer Control */ |
| 440 | #define FM_TBL_SC2VLNT 4 /* Get/set SC->VLnt */ |
| 441 | #define FM_TBL_VL_PREEMPT_ELEMS 5 /* Get (no set) VL preempt elems */ |
| 442 | #define FM_TBL_VL_PREEMPT_MATRIX 6 /* Get (no set) VL preempt matrix */ |
| 443 | |
| 444 | /* |
| 445 | * Possible "operations" for f_rcvctrl(ppd, op, ctxt) |
| 446 | * these are bits so they can be combined, e.g. |
| 447 | * HFI1_RCVCTRL_INTRAVAIL_ENB | HFI1_RCVCTRL_CTXT_ENB |
| 448 | */ |
| 449 | #define HFI1_RCVCTRL_TAILUPD_ENB 0x01 |
| 450 | #define HFI1_RCVCTRL_TAILUPD_DIS 0x02 |
| 451 | #define HFI1_RCVCTRL_CTXT_ENB 0x04 |
| 452 | #define HFI1_RCVCTRL_CTXT_DIS 0x08 |
| 453 | #define HFI1_RCVCTRL_INTRAVAIL_ENB 0x10 |
| 454 | #define HFI1_RCVCTRL_INTRAVAIL_DIS 0x20 |
| 455 | #define HFI1_RCVCTRL_PKEY_ENB 0x40 /* Note, default is enabled */ |
| 456 | #define HFI1_RCVCTRL_PKEY_DIS 0x80 |
| 457 | #define HFI1_RCVCTRL_TIDFLOW_ENB 0x0400 |
| 458 | #define HFI1_RCVCTRL_TIDFLOW_DIS 0x0800 |
| 459 | #define HFI1_RCVCTRL_ONE_PKT_EGR_ENB 0x1000 |
| 460 | #define HFI1_RCVCTRL_ONE_PKT_EGR_DIS 0x2000 |
| 461 | #define HFI1_RCVCTRL_NO_RHQ_DROP_ENB 0x4000 |
| 462 | #define HFI1_RCVCTRL_NO_RHQ_DROP_DIS 0x8000 |
| 463 | #define HFI1_RCVCTRL_NO_EGR_DROP_ENB 0x10000 |
| 464 | #define HFI1_RCVCTRL_NO_EGR_DROP_DIS 0x20000 |
| 465 | |
| 466 | /* partition enforcement flags */ |
| 467 | #define HFI1_PART_ENFORCE_IN 0x1 |
| 468 | #define HFI1_PART_ENFORCE_OUT 0x2 |
| 469 | |
| 470 | /* how often we check for synthetic counter wrap around */ |
| 471 | #define SYNTH_CNT_TIME 2 |
| 472 | |
| 473 | /* Counter flags */ |
| 474 | #define CNTR_NORMAL 0x0 /* Normal counters, just read register */ |
| 475 | #define CNTR_SYNTH 0x1 /* Synthetic counters, saturate at all 1s */ |
| 476 | #define CNTR_DISABLED 0x2 /* Disable this counter */ |
| 477 | #define CNTR_32BIT 0x4 /* Simulate 64 bits for this counter */ |
| 478 | #define CNTR_VL 0x8 /* Per VL counter */ |
| 479 | #define CNTR_INVALID_VL -1 /* Specifies invalid VL */ |
| 480 | #define CNTR_MODE_W 0x0 |
| 481 | #define CNTR_MODE_R 0x1 |
| 482 | |
| 483 | /* VLs Supported/Operational */ |
| 484 | #define HFI1_MIN_VLS_SUPPORTED 1 |
| 485 | #define HFI1_MAX_VLS_SUPPORTED 8 |
| 486 | |
| 487 | static inline void incr_cntr64(u64 *cntr) |
| 488 | { |
| 489 | if (*cntr < (u64)-1LL) |
| 490 | (*cntr)++; |
| 491 | } |
| 492 | |
| 493 | static inline void incr_cntr32(u32 *cntr) |
| 494 | { |
| 495 | if (*cntr < (u32)-1LL) |
| 496 | (*cntr)++; |
| 497 | } |
| 498 | |
| 499 | #define MAX_NAME_SIZE 64 |
| 500 | struct hfi1_msix_entry { |
| 501 | struct msix_entry msix; |
| 502 | void *arg; |
| 503 | char name[MAX_NAME_SIZE]; |
| 504 | cpumask_var_t mask; |
| 505 | }; |
| 506 | |
| 507 | /* per-SL CCA information */ |
| 508 | struct cca_timer { |
| 509 | struct hrtimer hrtimer; |
| 510 | struct hfi1_pportdata *ppd; /* read-only */ |
| 511 | int sl; /* read-only */ |
| 512 | u16 ccti; /* read/write - current value of CCTI */ |
| 513 | }; |
| 514 | |
| 515 | struct link_down_reason { |
| 516 | /* |
| 517 | * SMA-facing value. Should be set from .latest when |
| 518 | * HLS_UP_* -> HLS_DN_* transition actually occurs. |
| 519 | */ |
| 520 | u8 sma; |
| 521 | u8 latest; |
| 522 | }; |
| 523 | |
| 524 | enum { |
| 525 | LO_PRIO_TABLE, |
| 526 | HI_PRIO_TABLE, |
| 527 | MAX_PRIO_TABLE |
| 528 | }; |
| 529 | |
| 530 | struct vl_arb_cache { |
| 531 | spinlock_t lock; |
| 532 | struct ib_vl_weight_elem table[VL_ARB_TABLE_SIZE]; |
| 533 | }; |
| 534 | |
| 535 | /* |
| 536 | * The structure below encapsulates data relevant to a physical IB Port. |
| 537 | * Current chips support only one such port, but the separation |
| 538 | * clarifies things a bit. Note that to conform to IB conventions, |
| 539 | * port-numbers are one-based. The first or only port is port1. |
| 540 | */ |
| 541 | struct hfi1_pportdata { |
| 542 | struct hfi1_ibport ibport_data; |
| 543 | |
| 544 | struct hfi1_devdata *dd; |
| 545 | struct kobject pport_cc_kobj; |
| 546 | struct kobject sc2vl_kobj; |
| 547 | struct kobject sl2sc_kobj; |
| 548 | struct kobject vl2mtu_kobj; |
| 549 | |
| 550 | /* QSFP support */ |
| 551 | struct qsfp_data qsfp_info; |
| 552 | |
| 553 | /* GUID for this interface, in host order */ |
| 554 | u64 guid; |
| 555 | /* GUID for peer interface, in host order */ |
| 556 | u64 neighbor_guid; |
| 557 | |
| 558 | /* up or down physical link state */ |
| 559 | u32 linkup; |
| 560 | |
| 561 | /* |
| 562 | * this address is mapped read-only into user processes so they can |
| 563 | * get status cheaply, whenever they want. One qword of status per port |
| 564 | */ |
| 565 | u64 *statusp; |
| 566 | |
| 567 | /* SendDMA related entries */ |
| 568 | |
| 569 | struct workqueue_struct *hfi1_wq; |
| 570 | |
| 571 | /* move out of interrupt context */ |
| 572 | struct work_struct link_vc_work; |
| 573 | struct work_struct link_up_work; |
| 574 | struct work_struct link_down_work; |
| 575 | struct work_struct sma_message_work; |
| 576 | struct work_struct freeze_work; |
| 577 | struct work_struct link_downgrade_work; |
| 578 | struct work_struct link_bounce_work; |
| 579 | /* host link state variables */ |
| 580 | struct mutex hls_lock; |
| 581 | u32 host_link_state; |
| 582 | |
| 583 | spinlock_t sdma_alllock ____cacheline_aligned_in_smp; |
| 584 | |
| 585 | u32 lstate; /* logical link state */ |
| 586 | |
| 587 | /* these are the "32 bit" regs */ |
| 588 | |
| 589 | u32 ibmtu; /* The MTU programmed for this unit */ |
| 590 | /* |
| 591 | * Current max size IB packet (in bytes) including IB headers, that |
| 592 | * we can send. Changes when ibmtu changes. |
| 593 | */ |
| 594 | u32 ibmaxlen; |
| 595 | u32 current_egress_rate; /* units [10^6 bits/sec] */ |
| 596 | /* LID programmed for this instance */ |
| 597 | u16 lid; |
| 598 | /* list of pkeys programmed; 0 if not set */ |
| 599 | u16 pkeys[MAX_PKEY_VALUES]; |
| 600 | u16 link_width_supported; |
| 601 | u16 link_width_downgrade_supported; |
| 602 | u16 link_speed_supported; |
| 603 | u16 link_width_enabled; |
| 604 | u16 link_width_downgrade_enabled; |
| 605 | u16 link_speed_enabled; |
| 606 | u16 link_width_active; |
| 607 | u16 link_width_downgrade_tx_active; |
| 608 | u16 link_width_downgrade_rx_active; |
| 609 | u16 link_speed_active; |
| 610 | u8 vls_supported; |
| 611 | u8 vls_operational; |
| 612 | /* LID mask control */ |
| 613 | u8 lmc; |
| 614 | /* Rx Polarity inversion (compensate for ~tx on partner) */ |
| 615 | u8 rx_pol_inv; |
| 616 | |
| 617 | u8 hw_pidx; /* physical port index */ |
| 618 | u8 port; /* IB port number and index into dd->pports - 1 */ |
| 619 | /* type of neighbor node */ |
| 620 | u8 neighbor_type; |
| 621 | u8 neighbor_normal; |
| 622 | u8 neighbor_fm_security; /* 1 if firmware checking is disabled */ |
| 623 | u8 neighbor_port_number; |
| 624 | u8 is_sm_config_started; |
| 625 | u8 offline_disabled_reason; |
| 626 | u8 is_active_optimize_enabled; |
| 627 | u8 driver_link_ready; /* driver ready for active link */ |
| 628 | u8 link_enabled; /* link enabled? */ |
| 629 | u8 linkinit_reason; |
| 630 | u8 local_tx_rate; /* rate given to 8051 firmware */ |
| 631 | |
| 632 | /* placeholders for IB MAD packet settings */ |
| 633 | u8 overrun_threshold; |
| 634 | u8 phy_error_threshold; |
| 635 | |
| 636 | /* used to override LED behavior */ |
| 637 | u8 led_override; /* Substituted for normal value, if non-zero */ |
| 638 | u16 led_override_timeoff; /* delta to next timer event */ |
| 639 | u8 led_override_vals[2]; /* Alternates per blink-frame */ |
| 640 | u8 led_override_phase; /* Just counts, LSB picks from vals[] */ |
| 641 | atomic_t led_override_timer_active; |
| 642 | /* Used to flash LEDs in override mode */ |
| 643 | struct timer_list led_override_timer; |
| 644 | u32 sm_trap_qp; |
| 645 | u32 sa_qp; |
| 646 | |
| 647 | /* |
| 648 | * cca_timer_lock protects access to the per-SL cca_timer |
| 649 | * structures (specifically the ccti member). |
| 650 | */ |
| 651 | spinlock_t cca_timer_lock ____cacheline_aligned_in_smp; |
| 652 | struct cca_timer cca_timer[OPA_MAX_SLS]; |
| 653 | |
| 654 | /* List of congestion control table entries */ |
| 655 | struct ib_cc_table_entry_shadow ccti_entries[CC_TABLE_SHADOW_MAX]; |
| 656 | |
| 657 | /* congestion entries, each entry corresponding to a SL */ |
| 658 | struct opa_congestion_setting_entry_shadow |
| 659 | congestion_entries[OPA_MAX_SLS]; |
| 660 | |
| 661 | /* |
| 662 | * cc_state_lock protects (write) access to the per-port |
| 663 | * struct cc_state. |
| 664 | */ |
| 665 | spinlock_t cc_state_lock ____cacheline_aligned_in_smp; |
| 666 | |
| 667 | struct cc_state __rcu *cc_state; |
| 668 | |
| 669 | /* Total number of congestion control table entries */ |
| 670 | u16 total_cct_entry; |
| 671 | |
| 672 | /* Bit map identifying service level */ |
| 673 | u32 cc_sl_control_map; |
| 674 | |
| 675 | /* CA's max number of 64 entry units in the congestion control table */ |
| 676 | u8 cc_max_table_entries; |
| 677 | |
| 678 | /* begin congestion log related entries |
| 679 | * cc_log_lock protects all congestion log related data */ |
| 680 | spinlock_t cc_log_lock ____cacheline_aligned_in_smp; |
| 681 | u8 threshold_cong_event_map[OPA_MAX_SLS/8]; |
| 682 | u16 threshold_event_counter; |
| 683 | struct opa_hfi1_cong_log_event_internal cc_events[OPA_CONG_LOG_ELEMS]; |
| 684 | int cc_log_idx; /* index for logging events */ |
| 685 | int cc_mad_idx; /* index for reporting events */ |
| 686 | /* end congestion log related entries */ |
| 687 | |
| 688 | struct vl_arb_cache vl_arb_cache[MAX_PRIO_TABLE]; |
| 689 | |
| 690 | /* port relative counter buffer */ |
| 691 | u64 *cntrs; |
| 692 | /* port relative synthetic counter buffer */ |
| 693 | u64 *scntrs; |
| 694 | /* we synthesize port_xmit_discards from several egress errors */ |
| 695 | u64 port_xmit_discards; |
| 696 | u64 port_xmit_constraint_errors; |
| 697 | u64 port_rcv_constraint_errors; |
| 698 | /* count of 'link_err' interrupts from DC */ |
| 699 | u64 link_downed; |
| 700 | /* number of times link retrained successfully */ |
| 701 | u64 link_up; |
| 702 | /* port_ltp_crc_mode is returned in 'portinfo' MADs */ |
| 703 | u16 port_ltp_crc_mode; |
| 704 | /* port_crc_mode_enabled is the crc we support */ |
| 705 | u8 port_crc_mode_enabled; |
| 706 | /* mgmt_allowed is also returned in 'portinfo' MADs */ |
| 707 | u8 mgmt_allowed; |
| 708 | u8 part_enforce; /* partition enforcement flags */ |
| 709 | struct link_down_reason local_link_down_reason; |
| 710 | struct link_down_reason neigh_link_down_reason; |
| 711 | /* Value to be sent to link peer on LinkDown .*/ |
| 712 | u8 remote_link_down_reason; |
| 713 | /* Error events that will cause a port bounce. */ |
| 714 | u32 port_error_action; |
| 715 | }; |
| 716 | |
| 717 | typedef int (*rhf_rcv_function_ptr)(struct hfi1_packet *packet); |
| 718 | |
| 719 | typedef void (*opcode_handler)(struct hfi1_packet *packet); |
| 720 | |
| 721 | /* return values for the RHF receive functions */ |
| 722 | #define RHF_RCV_CONTINUE 0 /* keep going */ |
| 723 | #define RHF_RCV_DONE 1 /* stop, this packet processed */ |
| 724 | #define RHF_RCV_REPROCESS 2 /* stop. retain this packet */ |
| 725 | |
| 726 | struct rcv_array_data { |
| 727 | u8 group_size; |
| 728 | u16 ngroups; |
| 729 | u16 nctxt_extra; |
| 730 | }; |
| 731 | |
| 732 | struct per_vl_data { |
| 733 | u16 mtu; |
| 734 | struct send_context *sc; |
| 735 | }; |
| 736 | |
| 737 | /* 16 to directly index */ |
| 738 | #define PER_VL_SEND_CONTEXTS 16 |
| 739 | |
| 740 | struct err_info_rcvport { |
| 741 | u8 status_and_code; |
| 742 | u64 packet_flit1; |
| 743 | u64 packet_flit2; |
| 744 | }; |
| 745 | |
| 746 | struct err_info_constraint { |
| 747 | u8 status; |
| 748 | u16 pkey; |
| 749 | u32 slid; |
| 750 | }; |
| 751 | |
| 752 | struct hfi1_temp { |
| 753 | unsigned int curr; /* current temperature */ |
| 754 | unsigned int lo_lim; /* low temperature limit */ |
| 755 | unsigned int hi_lim; /* high temperature limit */ |
| 756 | unsigned int crit_lim; /* critical temperature limit */ |
| 757 | u8 triggers; /* temperature triggers */ |
| 758 | }; |
| 759 | |
| 760 | /* device data struct now contains only "general per-device" info. |
| 761 | * fields related to a physical IB port are in a hfi1_pportdata struct. |
| 762 | */ |
| 763 | struct sdma_engine; |
| 764 | struct sdma_vl_map; |
| 765 | |
| 766 | #define BOARD_VERS_MAX 96 /* how long the version string can be */ |
| 767 | #define SERIAL_MAX 16 /* length of the serial number */ |
| 768 | |
| 769 | struct hfi1_devdata { |
| 770 | struct hfi1_ibdev verbs_dev; /* must be first */ |
| 771 | struct list_head list; |
| 772 | /* pointers to related structs for this device */ |
| 773 | /* pci access data structure */ |
| 774 | struct pci_dev *pcidev; |
| 775 | struct cdev user_cdev; |
| 776 | struct cdev diag_cdev; |
| 777 | struct cdev ui_cdev; |
| 778 | struct device *user_device; |
| 779 | struct device *diag_device; |
| 780 | struct device *ui_device; |
| 781 | |
| 782 | /* mem-mapped pointer to base of chip regs */ |
| 783 | u8 __iomem *kregbase; |
| 784 | /* end of mem-mapped chip space excluding sendbuf and user regs */ |
| 785 | u8 __iomem *kregend; |
| 786 | /* physical address of chip for io_remap, etc. */ |
| 787 | resource_size_t physaddr; |
| 788 | /* receive context data */ |
| 789 | struct hfi1_ctxtdata **rcd; |
| 790 | /* send context data */ |
| 791 | struct send_context_info *send_contexts; |
| 792 | /* map hardware send contexts to software index */ |
| 793 | u8 *hw_to_sw; |
| 794 | /* spinlock for allocating and releasing send context resources */ |
| 795 | spinlock_t sc_lock; |
| 796 | /* Per VL data. Enough for all VLs but not all elements are set/used. */ |
| 797 | struct per_vl_data vld[PER_VL_SEND_CONTEXTS]; |
| 798 | /* seqlock for sc2vl */ |
| 799 | seqlock_t sc2vl_lock; |
| 800 | u64 sc2vl[4]; |
| 801 | /* Send Context initialization lock. */ |
| 802 | spinlock_t sc_init_lock; |
| 803 | |
| 804 | /* fields common to all SDMA engines */ |
| 805 | |
| 806 | /* default flags to last descriptor */ |
| 807 | u64 default_desc1; |
| 808 | volatile __le64 *sdma_heads_dma; /* DMA'ed by chip */ |
| 809 | dma_addr_t sdma_heads_phys; |
| 810 | void *sdma_pad_dma; /* DMA'ed by chip */ |
| 811 | dma_addr_t sdma_pad_phys; |
| 812 | /* for deallocation */ |
| 813 | size_t sdma_heads_size; |
| 814 | /* number from the chip */ |
| 815 | u32 chip_sdma_engines; |
| 816 | /* num used */ |
| 817 | u32 num_sdma; |
| 818 | /* lock for sdma_map */ |
| 819 | spinlock_t sde_map_lock; |
| 820 | /* array of engines sized by num_sdma */ |
| 821 | struct sdma_engine *per_sdma; |
| 822 | /* array of vl maps */ |
| 823 | struct sdma_vl_map __rcu *sdma_map; |
| 824 | /* SPC freeze waitqueue and variable */ |
| 825 | wait_queue_head_t sdma_unfreeze_wq; |
| 826 | atomic_t sdma_unfreeze_count; |
| 827 | |
| 828 | |
| 829 | /* hfi1_pportdata, points to array of (physical) port-specific |
| 830 | * data structs, indexed by pidx (0..n-1) |
| 831 | */ |
| 832 | struct hfi1_pportdata *pport; |
| 833 | |
| 834 | /* mem-mapped pointer to base of PIO buffers */ |
| 835 | void __iomem *piobase; |
| 836 | /* |
| 837 | * write-combining mem-mapped pointer to base of RcvArray |
| 838 | * memory. |
| 839 | */ |
| 840 | void __iomem *rcvarray_wc; |
| 841 | /* |
| 842 | * credit return base - a per-NUMA range of DMA address that |
| 843 | * the chip will use to update the per-context free counter |
| 844 | */ |
| 845 | struct credit_return_base *cr_base; |
| 846 | |
| 847 | /* send context numbers and sizes for each type */ |
| 848 | struct sc_config_sizes sc_sizes[SC_MAX]; |
| 849 | |
| 850 | u32 lcb_access_count; /* count of LCB users */ |
| 851 | |
| 852 | char *boardname; /* human readable board info */ |
| 853 | |
| 854 | /* device (not port) flags, basically device capabilities */ |
| 855 | u32 flags; |
| 856 | |
| 857 | /* reset value */ |
| 858 | u64 z_int_counter; |
| 859 | u64 z_rcv_limit; |
| 860 | /* percpu int_counter */ |
| 861 | u64 __percpu *int_counter; |
| 862 | u64 __percpu *rcv_limit; |
| 863 | |
| 864 | /* number of receive contexts in use by the driver */ |
| 865 | u32 num_rcv_contexts; |
| 866 | /* number of pio send contexts in use by the driver */ |
| 867 | u32 num_send_contexts; |
| 868 | /* |
| 869 | * number of ctxts available for PSM open |
| 870 | */ |
| 871 | u32 freectxts; |
| 872 | /* base receive interrupt timeout, in CSR units */ |
| 873 | u32 rcv_intr_timeout_csr; |
| 874 | |
| 875 | u64 __iomem *egrtidbase; |
| 876 | spinlock_t sendctrl_lock; /* protect changes to SendCtrl */ |
| 877 | spinlock_t rcvctrl_lock; /* protect changes to RcvCtrl */ |
| 878 | /* around rcd and (user ctxts) ctxt_cnt use (intr vs free) */ |
| 879 | spinlock_t uctxt_lock; /* rcd and user context changes */ |
| 880 | /* exclusive access to 8051 */ |
| 881 | spinlock_t dc8051_lock; |
| 882 | /* exclusive access to 8051 memory */ |
| 883 | spinlock_t dc8051_memlock; |
| 884 | int dc8051_timed_out; /* remember if the 8051 timed out */ |
| 885 | /* |
| 886 | * A page that will hold event notification bitmaps for all |
| 887 | * contexts. This page will be mapped into all processes. |
| 888 | */ |
| 889 | unsigned long *events; |
| 890 | /* |
| 891 | * per unit status, see also portdata statusp |
| 892 | * mapped read-only into user processes so they can get unit and |
| 893 | * IB link status cheaply |
| 894 | */ |
| 895 | struct hfi1_status *status; |
| 896 | u32 freezelen; /* max length of freezemsg */ |
| 897 | |
| 898 | /* revision register shadow */ |
| 899 | u64 revision; |
| 900 | /* Base GUID for device (network order) */ |
| 901 | u64 base_guid; |
| 902 | |
| 903 | /* these are the "32 bit" regs */ |
| 904 | |
| 905 | /* value we put in kr_rcvhdrsize */ |
| 906 | u32 rcvhdrsize; |
| 907 | /* number of receive contexts the chip supports */ |
| 908 | u32 chip_rcv_contexts; |
| 909 | /* number of receive array entries */ |
| 910 | u32 chip_rcv_array_count; |
| 911 | /* number of PIO send contexts the chip supports */ |
| 912 | u32 chip_send_contexts; |
| 913 | /* number of bytes in the PIO memory buffer */ |
| 914 | u32 chip_pio_mem_size; |
| 915 | /* number of bytes in the SDMA memory buffer */ |
| 916 | u32 chip_sdma_mem_size; |
| 917 | |
| 918 | /* size of each rcvegrbuffer */ |
| 919 | u32 rcvegrbufsize; |
| 920 | /* log2 of above */ |
| 921 | u16 rcvegrbufsize_shift; |
| 922 | /* both sides of the PCIe link are gen3 capable */ |
| 923 | u8 link_gen3_capable; |
| 924 | /* localbus width (1, 2,4,8,16,32) from config space */ |
| 925 | u32 lbus_width; |
| 926 | /* localbus speed in MHz */ |
| 927 | u32 lbus_speed; |
| 928 | int unit; /* unit # of this chip */ |
| 929 | int node; /* home node of this chip */ |
| 930 | |
| 931 | /* save these PCI fields to restore after a reset */ |
| 932 | u32 pcibar0; |
| 933 | u32 pcibar1; |
| 934 | u32 pci_rom; |
| 935 | u16 pci_command; |
| 936 | u16 pcie_devctl; |
| 937 | u16 pcie_lnkctl; |
| 938 | u16 pcie_devctl2; |
| 939 | u32 pci_msix0; |
| 940 | u32 pci_lnkctl3; |
| 941 | u32 pci_tph2; |
| 942 | |
| 943 | /* |
| 944 | * ASCII serial number, from flash, large enough for original |
| 945 | * all digit strings, and longer serial number format |
| 946 | */ |
| 947 | u8 serial[SERIAL_MAX]; |
| 948 | /* human readable board version */ |
| 949 | u8 boardversion[BOARD_VERS_MAX]; |
| 950 | u8 lbus_info[32]; /* human readable localbus info */ |
| 951 | /* chip major rev, from CceRevision */ |
| 952 | u8 majrev; |
| 953 | /* chip minor rev, from CceRevision */ |
| 954 | u8 minrev; |
| 955 | /* hardware ID */ |
| 956 | u8 hfi1_id; |
| 957 | /* implementation code */ |
| 958 | u8 icode; |
| 959 | /* default link down value (poll/sleep) */ |
| 960 | u8 link_default; |
| 961 | /* vAU of this device */ |
| 962 | u8 vau; |
| 963 | /* vCU of this device */ |
| 964 | u8 vcu; |
| 965 | /* link credits of this device */ |
| 966 | u16 link_credits; |
| 967 | /* initial vl15 credits to use */ |
| 968 | u16 vl15_init; |
| 969 | |
| 970 | /* Misc small ints */ |
| 971 | /* Number of physical ports available */ |
| 972 | u8 num_pports; |
| 973 | /* Lowest context number which can be used by user processes */ |
| 974 | u8 first_user_ctxt; |
| 975 | u8 n_krcv_queues; |
| 976 | u8 qos_shift; |
| 977 | u8 qpn_mask; |
| 978 | |
| 979 | u16 rhf_offset; /* offset of RHF within receive header entry */ |
| 980 | u16 irev; /* implementation revision */ |
| 981 | u16 dc8051_ver; /* 8051 firmware version */ |
| 982 | |
| 983 | struct platform_config_cache pcfg_cache; |
| 984 | /* control high-level access to qsfp */ |
| 985 | struct mutex qsfp_i2c_mutex; |
| 986 | |
| 987 | struct diag_client *diag_client; |
| 988 | spinlock_t hfi1_diag_trans_lock; /* protect diag observer ops */ |
| 989 | |
| 990 | u8 psxmitwait_supported; |
| 991 | /* cycle length of PS* counters in HW (in picoseconds) */ |
| 992 | u16 psxmitwait_check_rate; |
| 993 | /* high volume overflow errors deferred to tasklet */ |
| 994 | struct tasklet_struct error_tasklet; |
| 995 | /* per device cq worker */ |
| 996 | struct kthread_worker *worker; |
| 997 | |
| 998 | /* MSI-X information */ |
| 999 | struct hfi1_msix_entry *msix_entries; |
| 1000 | u32 num_msix_entries; |
| 1001 | |
| 1002 | /* INTx information */ |
| 1003 | u32 requested_intx_irq; /* did we request one? */ |
| 1004 | char intx_name[MAX_NAME_SIZE]; /* INTx name */ |
| 1005 | |
| 1006 | /* general interrupt: mask of handled interrupts */ |
| 1007 | u64 gi_mask[CCE_NUM_INT_CSRS]; |
| 1008 | |
| 1009 | struct rcv_array_data rcv_entries; |
| 1010 | |
| 1011 | /* |
| 1012 | * 64 bit synthetic counters |
| 1013 | */ |
| 1014 | struct timer_list synth_stats_timer; |
| 1015 | |
| 1016 | /* |
| 1017 | * device counters |
| 1018 | */ |
| 1019 | char *cntrnames; |
| 1020 | size_t cntrnameslen; |
| 1021 | size_t ndevcntrs; |
| 1022 | u64 *cntrs; |
| 1023 | u64 *scntrs; |
| 1024 | |
| 1025 | /* |
| 1026 | * remembered values for synthetic counters |
| 1027 | */ |
| 1028 | u64 last_tx; |
| 1029 | u64 last_rx; |
| 1030 | |
| 1031 | /* |
| 1032 | * per-port counters |
| 1033 | */ |
| 1034 | size_t nportcntrs; |
| 1035 | char *portcntrnames; |
| 1036 | size_t portcntrnameslen; |
| 1037 | |
| 1038 | struct hfi1_snoop_data hfi1_snoop; |
| 1039 | |
| 1040 | struct err_info_rcvport err_info_rcvport; |
| 1041 | struct err_info_constraint err_info_rcv_constraint; |
| 1042 | struct err_info_constraint err_info_xmit_constraint; |
| 1043 | u8 err_info_uncorrectable; |
| 1044 | u8 err_info_fmconfig; |
| 1045 | |
| 1046 | atomic_t drop_packet; |
| 1047 | u8 do_drop; |
| 1048 | |
| 1049 | /* receive interrupt functions */ |
| 1050 | rhf_rcv_function_ptr *rhf_rcv_function_map; |
| 1051 | rhf_rcv_function_ptr normal_rhf_rcv_functions[8]; |
| 1052 | |
| 1053 | /* |
| 1054 | * Handlers for outgoing data so that snoop/capture does not |
| 1055 | * have to have its hooks in the send path |
| 1056 | */ |
Dennis Dalessandro | d46e514 | 2015-11-11 00:34:37 -0500 | [diff] [blame] | 1057 | int (*process_pio_send)(struct hfi1_qp *qp, struct hfi1_pkt_state *ps, |
| 1058 | u64 pbc); |
| 1059 | int (*process_dma_send)(struct hfi1_qp *qp, struct hfi1_pkt_state *ps, |
| 1060 | u64 pbc); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1061 | void (*pio_inline_send)(struct hfi1_devdata *dd, struct pio_buf *pbuf, |
| 1062 | u64 pbc, const void *from, size_t count); |
| 1063 | |
| 1064 | /* OUI comes from the HW. Used everywhere as 3 separate bytes. */ |
| 1065 | u8 oui1; |
| 1066 | u8 oui2; |
| 1067 | u8 oui3; |
| 1068 | /* Timer and counter used to detect RcvBufOvflCnt changes */ |
| 1069 | struct timer_list rcverr_timer; |
| 1070 | u32 rcv_ovfl_cnt; |
| 1071 | |
| 1072 | int assigned_node_id; |
| 1073 | wait_queue_head_t event_queue; |
| 1074 | |
| 1075 | /* Save the enabled LCB error bits */ |
| 1076 | u64 lcb_err_en; |
| 1077 | u8 dc_shutdown; |
Mark F. Brown | 46b010d | 2015-11-09 19:18:20 -0500 | [diff] [blame] | 1078 | |
| 1079 | /* receive context tail dummy address */ |
| 1080 | __le64 *rcvhdrtail_dummy_kvaddr; |
| 1081 | dma_addr_t rcvhdrtail_dummy_physaddr; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1082 | }; |
| 1083 | |
| 1084 | /* 8051 firmware version helper */ |
| 1085 | #define dc8051_ver(a, b) ((a) << 8 | (b)) |
| 1086 | |
| 1087 | /* f_put_tid types */ |
| 1088 | #define PT_EXPECTED 0 |
| 1089 | #define PT_EAGER 1 |
| 1090 | #define PT_INVALID 2 |
| 1091 | |
| 1092 | /* Private data for file operations */ |
| 1093 | struct hfi1_filedata { |
| 1094 | struct hfi1_ctxtdata *uctxt; |
| 1095 | unsigned subctxt; |
| 1096 | struct hfi1_user_sdma_comp_q *cq; |
| 1097 | struct hfi1_user_sdma_pkt_q *pq; |
| 1098 | /* for cpu affinity; -1 if none */ |
| 1099 | int rec_cpu_num; |
| 1100 | }; |
| 1101 | |
| 1102 | extern struct list_head hfi1_dev_list; |
| 1103 | extern spinlock_t hfi1_devs_lock; |
| 1104 | struct hfi1_devdata *hfi1_lookup(int unit); |
| 1105 | extern u32 hfi1_cpulist_count; |
| 1106 | extern unsigned long *hfi1_cpulist; |
| 1107 | |
| 1108 | extern unsigned int snoop_drop_send; |
| 1109 | extern unsigned int snoop_force_capture; |
| 1110 | int hfi1_init(struct hfi1_devdata *, int); |
| 1111 | int hfi1_count_units(int *npresentp, int *nupp); |
| 1112 | int hfi1_count_active_units(void); |
| 1113 | |
| 1114 | int hfi1_diag_add(struct hfi1_devdata *); |
| 1115 | void hfi1_diag_remove(struct hfi1_devdata *); |
| 1116 | void handle_linkup_change(struct hfi1_devdata *dd, u32 linkup); |
| 1117 | |
| 1118 | void handle_user_interrupt(struct hfi1_ctxtdata *rcd); |
| 1119 | |
| 1120 | int hfi1_create_rcvhdrq(struct hfi1_devdata *, struct hfi1_ctxtdata *); |
| 1121 | int hfi1_setup_eagerbufs(struct hfi1_ctxtdata *); |
| 1122 | int hfi1_create_ctxts(struct hfi1_devdata *dd); |
| 1123 | struct hfi1_ctxtdata *hfi1_create_ctxtdata(struct hfi1_pportdata *, u32); |
| 1124 | void hfi1_init_pportdata(struct pci_dev *, struct hfi1_pportdata *, |
| 1125 | struct hfi1_devdata *, u8, u8); |
| 1126 | void hfi1_free_ctxtdata(struct hfi1_devdata *, struct hfi1_ctxtdata *); |
| 1127 | |
Dean Luick | f4f30031c | 2015-10-26 10:28:44 -0400 | [diff] [blame] | 1128 | int handle_receive_interrupt(struct hfi1_ctxtdata *, int); |
| 1129 | int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *, int); |
| 1130 | int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *, int); |
| 1131 | |
| 1132 | /* receive packet handler dispositions */ |
| 1133 | #define RCV_PKT_OK 0x0 /* keep going */ |
| 1134 | #define RCV_PKT_LIMIT 0x1 /* stop, hit limit, start thread */ |
| 1135 | #define RCV_PKT_DONE 0x2 /* stop, no more packets detected */ |
| 1136 | |
| 1137 | /* calculate the current RHF address */ |
| 1138 | static inline __le32 *get_rhf_addr(struct hfi1_ctxtdata *rcd) |
| 1139 | { |
| 1140 | return (__le32 *)rcd->rcvhdrq + rcd->head + rcd->dd->rhf_offset; |
| 1141 | } |
| 1142 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1143 | int hfi1_reset_device(int); |
| 1144 | |
| 1145 | /* return the driver's idea of the logical OPA port state */ |
| 1146 | static inline u32 driver_lstate(struct hfi1_pportdata *ppd) |
| 1147 | { |
| 1148 | return ppd->lstate; /* use the cached value */ |
| 1149 | } |
| 1150 | |
| 1151 | static inline u16 generate_jkey(kuid_t uid) |
| 1152 | { |
| 1153 | return from_kuid(current_user_ns(), uid) & 0xffff; |
| 1154 | } |
| 1155 | |
| 1156 | /* |
| 1157 | * active_egress_rate |
| 1158 | * |
| 1159 | * returns the active egress rate in units of [10^6 bits/sec] |
| 1160 | */ |
| 1161 | static inline u32 active_egress_rate(struct hfi1_pportdata *ppd) |
| 1162 | { |
| 1163 | u16 link_speed = ppd->link_speed_active; |
| 1164 | u16 link_width = ppd->link_width_active; |
| 1165 | u32 egress_rate; |
| 1166 | |
| 1167 | if (link_speed == OPA_LINK_SPEED_25G) |
| 1168 | egress_rate = 25000; |
| 1169 | else /* assume OPA_LINK_SPEED_12_5G */ |
| 1170 | egress_rate = 12500; |
| 1171 | |
| 1172 | switch (link_width) { |
| 1173 | case OPA_LINK_WIDTH_4X: |
| 1174 | egress_rate *= 4; |
| 1175 | break; |
| 1176 | case OPA_LINK_WIDTH_3X: |
| 1177 | egress_rate *= 3; |
| 1178 | break; |
| 1179 | case OPA_LINK_WIDTH_2X: |
| 1180 | egress_rate *= 2; |
| 1181 | break; |
| 1182 | default: |
| 1183 | /* assume IB_WIDTH_1X */ |
| 1184 | break; |
| 1185 | } |
| 1186 | |
| 1187 | return egress_rate; |
| 1188 | } |
| 1189 | |
| 1190 | /* |
| 1191 | * egress_cycles |
| 1192 | * |
| 1193 | * Returns the number of 'fabric clock cycles' to egress a packet |
| 1194 | * of length 'len' bytes, at 'rate' Mbit/s. Since the fabric clock |
| 1195 | * rate is (approximately) 805 MHz, the units of the returned value |
| 1196 | * are (1/805 MHz). |
| 1197 | */ |
| 1198 | static inline u32 egress_cycles(u32 len, u32 rate) |
| 1199 | { |
| 1200 | u32 cycles; |
| 1201 | |
| 1202 | /* |
| 1203 | * cycles is: |
| 1204 | * |
| 1205 | * (length) [bits] / (rate) [bits/sec] |
| 1206 | * --------------------------------------------------- |
| 1207 | * fabric_clock_period == 1 /(805 * 10^6) [cycles/sec] |
| 1208 | */ |
| 1209 | |
| 1210 | cycles = len * 8; /* bits */ |
| 1211 | cycles *= 805; |
| 1212 | cycles /= rate; |
| 1213 | |
| 1214 | return cycles; |
| 1215 | } |
| 1216 | |
| 1217 | void set_link_ipg(struct hfi1_pportdata *ppd); |
| 1218 | void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn, |
| 1219 | u32 rqpn, u8 svc_type); |
| 1220 | void return_cnp(struct hfi1_ibport *ibp, struct hfi1_qp *qp, u32 remote_qpn, |
| 1221 | u32 pkey, u32 slid, u32 dlid, u8 sc5, |
| 1222 | const struct ib_grh *old_grh); |
| 1223 | |
| 1224 | #define PACKET_EGRESS_TIMEOUT 350 |
| 1225 | static inline void pause_for_credit_return(struct hfi1_devdata *dd) |
| 1226 | { |
| 1227 | /* Pause at least 1us, to ensure chip returns all credits */ |
| 1228 | u32 usec = cclock_to_ns(dd, PACKET_EGRESS_TIMEOUT) / 1000; |
| 1229 | |
| 1230 | udelay(usec ? usec : 1); |
| 1231 | } |
| 1232 | |
| 1233 | /** |
| 1234 | * sc_to_vlt() reverse lookup sc to vl |
| 1235 | * @dd - devdata |
| 1236 | * @sc5 - 5 bit sc |
| 1237 | */ |
| 1238 | static inline u8 sc_to_vlt(struct hfi1_devdata *dd, u8 sc5) |
| 1239 | { |
| 1240 | unsigned seq; |
| 1241 | u8 rval; |
| 1242 | |
| 1243 | if (sc5 >= OPA_MAX_SCS) |
| 1244 | return (u8)(0xff); |
| 1245 | |
| 1246 | do { |
| 1247 | seq = read_seqbegin(&dd->sc2vl_lock); |
| 1248 | rval = *(((u8 *)dd->sc2vl) + sc5); |
| 1249 | } while (read_seqretry(&dd->sc2vl_lock, seq)); |
| 1250 | |
| 1251 | return rval; |
| 1252 | } |
| 1253 | |
| 1254 | #define PKEY_MEMBER_MASK 0x8000 |
| 1255 | #define PKEY_LOW_15_MASK 0x7fff |
| 1256 | |
| 1257 | /* |
| 1258 | * ingress_pkey_matches_entry - return 1 if the pkey matches ent (ent |
| 1259 | * being an entry from the ingress partition key table), return 0 |
| 1260 | * otherwise. Use the matching criteria for ingress partition keys |
| 1261 | * specified in the OPAv1 spec., section 9.10.14. |
| 1262 | */ |
| 1263 | static inline int ingress_pkey_matches_entry(u16 pkey, u16 ent) |
| 1264 | { |
| 1265 | u16 mkey = pkey & PKEY_LOW_15_MASK; |
| 1266 | u16 ment = ent & PKEY_LOW_15_MASK; |
| 1267 | |
| 1268 | if (mkey == ment) { |
| 1269 | /* |
| 1270 | * If pkey[15] is clear (limited partition member), |
| 1271 | * is bit 15 in the corresponding table element |
| 1272 | * clear (limited member)? |
| 1273 | */ |
| 1274 | if (!(pkey & PKEY_MEMBER_MASK)) |
| 1275 | return !!(ent & PKEY_MEMBER_MASK); |
| 1276 | return 1; |
| 1277 | } |
| 1278 | return 0; |
| 1279 | } |
| 1280 | |
| 1281 | /* |
| 1282 | * ingress_pkey_table_search - search the entire pkey table for |
| 1283 | * an entry which matches 'pkey'. return 0 if a match is found, |
| 1284 | * and 1 otherwise. |
| 1285 | */ |
| 1286 | static int ingress_pkey_table_search(struct hfi1_pportdata *ppd, u16 pkey) |
| 1287 | { |
| 1288 | int i; |
| 1289 | |
| 1290 | for (i = 0; i < MAX_PKEY_VALUES; i++) { |
| 1291 | if (ingress_pkey_matches_entry(pkey, ppd->pkeys[i])) |
| 1292 | return 0; |
| 1293 | } |
| 1294 | return 1; |
| 1295 | } |
| 1296 | |
| 1297 | /* |
| 1298 | * ingress_pkey_table_fail - record a failure of ingress pkey validation, |
| 1299 | * i.e., increment port_rcv_constraint_errors for the port, and record |
| 1300 | * the 'error info' for this failure. |
| 1301 | */ |
| 1302 | static void ingress_pkey_table_fail(struct hfi1_pportdata *ppd, u16 pkey, |
| 1303 | u16 slid) |
| 1304 | { |
| 1305 | struct hfi1_devdata *dd = ppd->dd; |
| 1306 | |
| 1307 | incr_cntr64(&ppd->port_rcv_constraint_errors); |
| 1308 | if (!(dd->err_info_rcv_constraint.status & OPA_EI_STATUS_SMASK)) { |
| 1309 | dd->err_info_rcv_constraint.status |= OPA_EI_STATUS_SMASK; |
| 1310 | dd->err_info_rcv_constraint.slid = slid; |
| 1311 | dd->err_info_rcv_constraint.pkey = pkey; |
| 1312 | } |
| 1313 | } |
| 1314 | |
| 1315 | /* |
| 1316 | * ingress_pkey_check - Return 0 if the ingress pkey is valid, return 1 |
| 1317 | * otherwise. Use the criteria in the OPAv1 spec, section 9.10.14. idx |
| 1318 | * is a hint as to the best place in the partition key table to begin |
| 1319 | * searching. This function should not be called on the data path because |
| 1320 | * of performance reasons. On datapath pkey check is expected to be done |
| 1321 | * by HW and rcv_pkey_check function should be called instead. |
| 1322 | */ |
| 1323 | static inline int ingress_pkey_check(struct hfi1_pportdata *ppd, u16 pkey, |
| 1324 | u8 sc5, u8 idx, u16 slid) |
| 1325 | { |
| 1326 | if (!(ppd->part_enforce & HFI1_PART_ENFORCE_IN)) |
| 1327 | return 0; |
| 1328 | |
| 1329 | /* If SC15, pkey[0:14] must be 0x7fff */ |
| 1330 | if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK)) |
| 1331 | goto bad; |
| 1332 | |
| 1333 | /* Is the pkey = 0x0, or 0x8000? */ |
| 1334 | if ((pkey & PKEY_LOW_15_MASK) == 0) |
| 1335 | goto bad; |
| 1336 | |
| 1337 | /* The most likely matching pkey has index 'idx' */ |
| 1338 | if (ingress_pkey_matches_entry(pkey, ppd->pkeys[idx])) |
| 1339 | return 0; |
| 1340 | |
| 1341 | /* no match - try the whole table */ |
| 1342 | if (!ingress_pkey_table_search(ppd, pkey)) |
| 1343 | return 0; |
| 1344 | |
| 1345 | bad: |
| 1346 | ingress_pkey_table_fail(ppd, pkey, slid); |
| 1347 | return 1; |
| 1348 | } |
| 1349 | |
| 1350 | /* |
| 1351 | * rcv_pkey_check - Return 0 if the ingress pkey is valid, return 1 |
| 1352 | * otherwise. It only ensures pkey is vlid for QP0. This function |
| 1353 | * should be called on the data path instead of ingress_pkey_check |
| 1354 | * as on data path, pkey check is done by HW (except for QP0). |
| 1355 | */ |
| 1356 | static inline int rcv_pkey_check(struct hfi1_pportdata *ppd, u16 pkey, |
| 1357 | u8 sc5, u16 slid) |
| 1358 | { |
| 1359 | if (!(ppd->part_enforce & HFI1_PART_ENFORCE_IN)) |
| 1360 | return 0; |
| 1361 | |
| 1362 | /* If SC15, pkey[0:14] must be 0x7fff */ |
| 1363 | if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK)) |
| 1364 | goto bad; |
| 1365 | |
| 1366 | return 0; |
| 1367 | bad: |
| 1368 | ingress_pkey_table_fail(ppd, pkey, slid); |
| 1369 | return 1; |
| 1370 | } |
| 1371 | |
| 1372 | /* MTU handling */ |
| 1373 | |
| 1374 | /* MTU enumeration, 256-4k match IB */ |
| 1375 | #define OPA_MTU_0 0 |
| 1376 | #define OPA_MTU_256 1 |
| 1377 | #define OPA_MTU_512 2 |
| 1378 | #define OPA_MTU_1024 3 |
| 1379 | #define OPA_MTU_2048 4 |
| 1380 | #define OPA_MTU_4096 5 |
| 1381 | |
| 1382 | u32 lrh_max_header_bytes(struct hfi1_devdata *dd); |
| 1383 | int mtu_to_enum(u32 mtu, int default_if_bad); |
| 1384 | u16 enum_to_mtu(int); |
| 1385 | static inline int valid_ib_mtu(unsigned int mtu) |
| 1386 | { |
| 1387 | return mtu == 256 || mtu == 512 || |
| 1388 | mtu == 1024 || mtu == 2048 || |
| 1389 | mtu == 4096; |
| 1390 | } |
| 1391 | static inline int valid_opa_max_mtu(unsigned int mtu) |
| 1392 | { |
| 1393 | return mtu >= 2048 && |
| 1394 | (valid_ib_mtu(mtu) || mtu == 8192 || mtu == 10240); |
| 1395 | } |
| 1396 | |
| 1397 | int set_mtu(struct hfi1_pportdata *); |
| 1398 | |
| 1399 | int hfi1_set_lid(struct hfi1_pportdata *, u32, u8); |
| 1400 | void hfi1_disable_after_error(struct hfi1_devdata *); |
| 1401 | int hfi1_set_uevent_bits(struct hfi1_pportdata *, const int); |
| 1402 | int hfi1_rcvbuf_validate(u32, u8, u16 *); |
| 1403 | |
| 1404 | int fm_get_table(struct hfi1_pportdata *, int, void *); |
| 1405 | int fm_set_table(struct hfi1_pportdata *, int, void *); |
| 1406 | |
| 1407 | void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf); |
| 1408 | void reset_link_credits(struct hfi1_devdata *dd); |
| 1409 | void assign_remote_cm_au_table(struct hfi1_devdata *dd, u8 vcu); |
| 1410 | |
| 1411 | int snoop_recv_handler(struct hfi1_packet *packet); |
Dennis Dalessandro | d46e514 | 2015-11-11 00:34:37 -0500 | [diff] [blame] | 1412 | int snoop_send_dma_handler(struct hfi1_qp *qp, struct hfi1_pkt_state *ps, |
| 1413 | u64 pbc); |
| 1414 | int snoop_send_pio_handler(struct hfi1_qp *qp, struct hfi1_pkt_state *ps, |
| 1415 | u64 pbc); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1416 | void snoop_inline_pio_send(struct hfi1_devdata *dd, struct pio_buf *pbuf, |
| 1417 | u64 pbc, const void *from, size_t count); |
| 1418 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1419 | static inline struct hfi1_devdata *dd_from_ppd(struct hfi1_pportdata *ppd) |
| 1420 | { |
| 1421 | return ppd->dd; |
| 1422 | } |
| 1423 | |
| 1424 | static inline struct hfi1_devdata *dd_from_dev(struct hfi1_ibdev *dev) |
| 1425 | { |
| 1426 | return container_of(dev, struct hfi1_devdata, verbs_dev); |
| 1427 | } |
| 1428 | |
| 1429 | static inline struct hfi1_devdata *dd_from_ibdev(struct ib_device *ibdev) |
| 1430 | { |
| 1431 | return dd_from_dev(to_idev(ibdev)); |
| 1432 | } |
| 1433 | |
| 1434 | static inline struct hfi1_pportdata *ppd_from_ibp(struct hfi1_ibport *ibp) |
| 1435 | { |
| 1436 | return container_of(ibp, struct hfi1_pportdata, ibport_data); |
| 1437 | } |
| 1438 | |
| 1439 | static inline struct hfi1_ibport *to_iport(struct ib_device *ibdev, u8 port) |
| 1440 | { |
| 1441 | struct hfi1_devdata *dd = dd_from_ibdev(ibdev); |
| 1442 | unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ |
| 1443 | |
| 1444 | WARN_ON(pidx >= dd->num_pports); |
| 1445 | return &dd->pport[pidx].ibport_data; |
| 1446 | } |
| 1447 | |
| 1448 | /* |
| 1449 | * Return the indexed PKEY from the port PKEY table. |
| 1450 | */ |
| 1451 | static inline u16 hfi1_get_pkey(struct hfi1_ibport *ibp, unsigned index) |
| 1452 | { |
| 1453 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); |
| 1454 | u16 ret; |
| 1455 | |
| 1456 | if (index >= ARRAY_SIZE(ppd->pkeys)) |
| 1457 | ret = 0; |
| 1458 | else |
| 1459 | ret = ppd->pkeys[index]; |
| 1460 | |
| 1461 | return ret; |
| 1462 | } |
| 1463 | |
| 1464 | /* |
| 1465 | * Readers of cc_state must call get_cc_state() under rcu_read_lock(). |
| 1466 | * Writers of cc_state must call get_cc_state() under cc_state_lock. |
| 1467 | */ |
| 1468 | static inline struct cc_state *get_cc_state(struct hfi1_pportdata *ppd) |
| 1469 | { |
| 1470 | return rcu_dereference(ppd->cc_state); |
| 1471 | } |
| 1472 | |
| 1473 | /* |
| 1474 | * values for dd->flags (_device_ related flags) |
| 1475 | */ |
| 1476 | #define HFI1_INITTED 0x1 /* chip and driver up and initted */ |
| 1477 | #define HFI1_PRESENT 0x2 /* chip accesses can be done */ |
| 1478 | #define HFI1_FROZEN 0x4 /* chip in SPC freeze */ |
| 1479 | #define HFI1_HAS_SDMA_TIMEOUT 0x8 |
| 1480 | #define HFI1_HAS_SEND_DMA 0x10 /* Supports Send DMA */ |
| 1481 | #define HFI1_FORCED_FREEZE 0x80 /* driver forced freeze mode */ |
| 1482 | #define HFI1_DO_INIT_ASIC 0x100 /* This device will init the ASIC */ |
| 1483 | |
| 1484 | /* IB dword length mask in PBC (lower 11 bits); same for all chips */ |
| 1485 | #define HFI1_PBC_LENGTH_MASK ((1 << 11) - 1) |
| 1486 | |
| 1487 | |
| 1488 | /* ctxt_flag bit offsets */ |
| 1489 | /* context has been setup */ |
| 1490 | #define HFI1_CTXT_SETUP_DONE 1 |
| 1491 | /* waiting for a packet to arrive */ |
| 1492 | #define HFI1_CTXT_WAITING_RCV 2 |
| 1493 | /* master has not finished initializing */ |
| 1494 | #define HFI1_CTXT_MASTER_UNINIT 4 |
| 1495 | /* waiting for an urgent packet to arrive */ |
| 1496 | #define HFI1_CTXT_WAITING_URG 5 |
| 1497 | |
| 1498 | /* free up any allocated data at closes */ |
| 1499 | struct hfi1_devdata *hfi1_init_dd(struct pci_dev *, |
| 1500 | const struct pci_device_id *); |
| 1501 | void hfi1_free_devdata(struct hfi1_devdata *); |
| 1502 | void cc_state_reclaim(struct rcu_head *rcu); |
| 1503 | struct hfi1_devdata *hfi1_alloc_devdata(struct pci_dev *pdev, size_t extra); |
| 1504 | |
| 1505 | /* |
| 1506 | * Set LED override, only the two LSBs have "public" meaning, but |
| 1507 | * any non-zero value substitutes them for the Link and LinkTrain |
| 1508 | * LED states. |
| 1509 | */ |
| 1510 | #define HFI1_LED_PHYS 1 /* Physical (linktraining) GREEN LED */ |
| 1511 | #define HFI1_LED_LOG 2 /* Logical (link) YELLOW LED */ |
| 1512 | void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val); |
| 1513 | |
| 1514 | #define HFI1_CREDIT_RETURN_RATE (100) |
| 1515 | |
| 1516 | /* |
| 1517 | * The number of words for the KDETH protocol field. If this is |
| 1518 | * larger then the actual field used, then part of the payload |
| 1519 | * will be in the header. |
| 1520 | * |
| 1521 | * Optimally, we want this sized so that a typical case will |
| 1522 | * use full cache lines. The typical local KDETH header would |
| 1523 | * be: |
| 1524 | * |
| 1525 | * Bytes Field |
| 1526 | * 8 LRH |
| 1527 | * 12 BHT |
| 1528 | * ?? KDETH |
| 1529 | * 8 RHF |
| 1530 | * --- |
| 1531 | * 28 + KDETH |
| 1532 | * |
| 1533 | * For a 64-byte cache line, KDETH would need to be 36 bytes or 9 DWORDS |
| 1534 | */ |
| 1535 | #define DEFAULT_RCVHDRSIZE 9 |
| 1536 | |
| 1537 | /* |
| 1538 | * Maximal header byte count: |
| 1539 | * |
| 1540 | * Bytes Field |
| 1541 | * 8 LRH |
| 1542 | * 40 GRH (optional) |
| 1543 | * 12 BTH |
| 1544 | * ?? KDETH |
| 1545 | * 8 RHF |
| 1546 | * --- |
| 1547 | * 68 + KDETH |
| 1548 | * |
| 1549 | * We also want to maintain a cache line alignment to assist DMA'ing |
| 1550 | * of the header bytes. Round up to a good size. |
| 1551 | */ |
| 1552 | #define DEFAULT_RCVHDR_ENTSIZE 32 |
| 1553 | |
| 1554 | int hfi1_get_user_pages(unsigned long, size_t, struct page **); |
| 1555 | void hfi1_release_user_pages(struct page **, size_t); |
| 1556 | |
| 1557 | static inline void clear_rcvhdrtail(const struct hfi1_ctxtdata *rcd) |
| 1558 | { |
| 1559 | *((u64 *) rcd->rcvhdrtail_kvaddr) = 0ULL; |
| 1560 | } |
| 1561 | |
| 1562 | static inline u32 get_rcvhdrtail(const struct hfi1_ctxtdata *rcd) |
| 1563 | { |
| 1564 | /* |
| 1565 | * volatile because it's a DMA target from the chip, routine is |
| 1566 | * inlined, and don't want register caching or reordering. |
| 1567 | */ |
| 1568 | return (u32) le64_to_cpu(*rcd->rcvhdrtail_kvaddr); |
| 1569 | } |
| 1570 | |
| 1571 | /* |
| 1572 | * sysfs interface. |
| 1573 | */ |
| 1574 | |
| 1575 | extern const char ib_hfi1_version[]; |
| 1576 | |
| 1577 | int hfi1_device_create(struct hfi1_devdata *); |
| 1578 | void hfi1_device_remove(struct hfi1_devdata *); |
| 1579 | |
| 1580 | int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num, |
| 1581 | struct kobject *kobj); |
| 1582 | int hfi1_verbs_register_sysfs(struct hfi1_devdata *); |
| 1583 | void hfi1_verbs_unregister_sysfs(struct hfi1_devdata *); |
| 1584 | /* Hook for sysfs read of QSFP */ |
| 1585 | int qsfp_dump(struct hfi1_pportdata *ppd, char *buf, int len); |
| 1586 | |
| 1587 | int hfi1_pcie_init(struct pci_dev *, const struct pci_device_id *); |
| 1588 | void hfi1_pcie_cleanup(struct pci_dev *); |
| 1589 | int hfi1_pcie_ddinit(struct hfi1_devdata *, struct pci_dev *, |
| 1590 | const struct pci_device_id *); |
| 1591 | void hfi1_pcie_ddcleanup(struct hfi1_devdata *); |
| 1592 | void hfi1_pcie_flr(struct hfi1_devdata *); |
| 1593 | int pcie_speeds(struct hfi1_devdata *); |
| 1594 | void request_msix(struct hfi1_devdata *, u32 *, struct hfi1_msix_entry *); |
| 1595 | void hfi1_enable_intx(struct pci_dev *); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1596 | void restore_pci_variables(struct hfi1_devdata *dd); |
| 1597 | int do_pcie_gen3_transition(struct hfi1_devdata *dd); |
| 1598 | int parse_platform_config(struct hfi1_devdata *dd); |
| 1599 | int get_platform_config_field(struct hfi1_devdata *dd, |
| 1600 | enum platform_config_table_type_encoding table_type, |
| 1601 | int table_index, int field_index, u32 *data, u32 len); |
| 1602 | |
| 1603 | dma_addr_t hfi1_map_page(struct pci_dev *, struct page *, unsigned long, |
| 1604 | size_t, int); |
| 1605 | const char *get_unit_name(int unit); |
| 1606 | |
| 1607 | /* |
| 1608 | * Flush write combining store buffers (if present) and perform a write |
| 1609 | * barrier. |
| 1610 | */ |
| 1611 | static inline void flush_wc(void) |
| 1612 | { |
| 1613 | asm volatile("sfence" : : : "memory"); |
| 1614 | } |
| 1615 | |
| 1616 | void handle_eflags(struct hfi1_packet *packet); |
| 1617 | int process_receive_ib(struct hfi1_packet *packet); |
| 1618 | int process_receive_bypass(struct hfi1_packet *packet); |
| 1619 | int process_receive_error(struct hfi1_packet *packet); |
| 1620 | int kdeth_process_expected(struct hfi1_packet *packet); |
| 1621 | int kdeth_process_eager(struct hfi1_packet *packet); |
| 1622 | int process_receive_invalid(struct hfi1_packet *packet); |
| 1623 | |
| 1624 | extern rhf_rcv_function_ptr snoop_rhf_rcv_functions[8]; |
| 1625 | |
| 1626 | void update_sge(struct hfi1_sge_state *ss, u32 length); |
| 1627 | |
| 1628 | /* global module parameter variables */ |
| 1629 | extern unsigned int hfi1_max_mtu; |
| 1630 | extern unsigned int hfi1_cu; |
| 1631 | extern unsigned int user_credit_return_threshold; |
| 1632 | extern uint num_rcv_contexts; |
| 1633 | extern unsigned n_krcvqs; |
| 1634 | extern u8 krcvqs[]; |
| 1635 | extern int krcvqsset; |
| 1636 | extern uint kdeth_qp; |
| 1637 | extern uint loopback; |
| 1638 | extern uint quick_linkup; |
| 1639 | extern uint rcv_intr_timeout; |
| 1640 | extern uint rcv_intr_count; |
| 1641 | extern uint rcv_intr_dynamic; |
| 1642 | extern ushort link_crc_mask; |
| 1643 | |
| 1644 | extern struct mutex hfi1_mutex; |
| 1645 | |
| 1646 | /* Number of seconds before our card status check... */ |
| 1647 | #define STATUS_TIMEOUT 60 |
| 1648 | |
| 1649 | #define DRIVER_NAME "hfi1" |
| 1650 | #define HFI1_USER_MINOR_BASE 0 |
| 1651 | #define HFI1_TRACE_MINOR 127 |
| 1652 | #define HFI1_DIAGPKT_MINOR 128 |
| 1653 | #define HFI1_DIAG_MINOR_BASE 129 |
| 1654 | #define HFI1_SNOOP_CAPTURE_BASE 200 |
| 1655 | #define HFI1_NMINORS 255 |
| 1656 | |
| 1657 | #define PCI_VENDOR_ID_INTEL 0x8086 |
| 1658 | #define PCI_DEVICE_ID_INTEL0 0x24f0 |
| 1659 | #define PCI_DEVICE_ID_INTEL1 0x24f1 |
| 1660 | |
| 1661 | #define HFI1_PKT_USER_SC_INTEGRITY \ |
| 1662 | (SEND_CTXT_CHECK_ENABLE_DISALLOW_NON_KDETH_PACKETS_SMASK \ |
| 1663 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_SMASK \ |
| 1664 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_GRH_SMASK) |
| 1665 | |
| 1666 | #define HFI1_PKT_KERNEL_SC_INTEGRITY \ |
| 1667 | (SEND_CTXT_CHECK_ENABLE_DISALLOW_KDETH_PACKETS_SMASK) |
| 1668 | |
| 1669 | static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd, |
| 1670 | u16 ctxt_type) |
| 1671 | { |
| 1672 | u64 base_sc_integrity = |
| 1673 | SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK |
| 1674 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK |
| 1675 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK |
| 1676 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK |
| 1677 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK |
| 1678 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_TEST_SMASK |
| 1679 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK |
| 1680 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK |
| 1681 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK |
| 1682 | | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_SMASK |
| 1683 | | SEND_CTXT_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK |
| 1684 | | SEND_CTXT_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK |
| 1685 | | SEND_CTXT_CHECK_ENABLE_CHECK_OPCODE_SMASK |
| 1686 | | SEND_CTXT_CHECK_ENABLE_CHECK_SLID_SMASK |
| 1687 | | SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK |
| 1688 | | SEND_CTXT_CHECK_ENABLE_CHECK_VL_SMASK |
| 1689 | | SEND_CTXT_CHECK_ENABLE_CHECK_ENABLE_SMASK; |
| 1690 | |
| 1691 | if (ctxt_type == SC_USER) |
| 1692 | base_sc_integrity |= HFI1_PKT_USER_SC_INTEGRITY; |
| 1693 | else |
| 1694 | base_sc_integrity |= HFI1_PKT_KERNEL_SC_INTEGRITY; |
| 1695 | |
Mike Marciniszyn | 995deaf | 2015-11-16 21:59:29 -0500 | [diff] [blame^] | 1696 | if (is_ax(dd)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1697 | /* turn off send-side job key checks - A0 erratum */ |
| 1698 | return base_sc_integrity & |
| 1699 | ~SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK; |
| 1700 | return base_sc_integrity; |
| 1701 | } |
| 1702 | |
| 1703 | static inline u64 hfi1_pkt_base_sdma_integrity(struct hfi1_devdata *dd) |
| 1704 | { |
| 1705 | u64 base_sdma_integrity = |
| 1706 | SEND_DMA_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK |
| 1707 | | SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK |
| 1708 | | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK |
| 1709 | | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK |
| 1710 | | SEND_DMA_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK |
| 1711 | | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK |
| 1712 | | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK |
| 1713 | | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK |
| 1714 | | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_SMASK |
| 1715 | | SEND_DMA_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK |
| 1716 | | SEND_DMA_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK |
| 1717 | | SEND_DMA_CHECK_ENABLE_CHECK_OPCODE_SMASK |
| 1718 | | SEND_DMA_CHECK_ENABLE_CHECK_SLID_SMASK |
| 1719 | | SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK |
| 1720 | | SEND_DMA_CHECK_ENABLE_CHECK_VL_SMASK |
| 1721 | | SEND_DMA_CHECK_ENABLE_CHECK_ENABLE_SMASK; |
| 1722 | |
Mike Marciniszyn | 995deaf | 2015-11-16 21:59:29 -0500 | [diff] [blame^] | 1723 | if (is_ax(dd)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1724 | /* turn off send-side job key checks - A0 erratum */ |
| 1725 | return base_sdma_integrity & |
| 1726 | ~SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK; |
| 1727 | return base_sdma_integrity; |
| 1728 | } |
| 1729 | |
| 1730 | /* |
| 1731 | * hfi1_early_err is used (only!) to print early errors before devdata is |
| 1732 | * allocated, or when dd->pcidev may not be valid, and at the tail end of |
| 1733 | * cleanup when devdata may have been freed, etc. hfi1_dev_porterr is |
| 1734 | * the same as dd_dev_err, but is used when the message really needs |
| 1735 | * the IB port# to be definitive as to what's happening.. |
| 1736 | */ |
| 1737 | #define hfi1_early_err(dev, fmt, ...) \ |
| 1738 | dev_err(dev, fmt, ##__VA_ARGS__) |
| 1739 | |
| 1740 | #define hfi1_early_info(dev, fmt, ...) \ |
| 1741 | dev_info(dev, fmt, ##__VA_ARGS__) |
| 1742 | |
| 1743 | #define dd_dev_emerg(dd, fmt, ...) \ |
| 1744 | dev_emerg(&(dd)->pcidev->dev, "%s: " fmt, \ |
| 1745 | get_unit_name((dd)->unit), ##__VA_ARGS__) |
| 1746 | #define dd_dev_err(dd, fmt, ...) \ |
| 1747 | dev_err(&(dd)->pcidev->dev, "%s: " fmt, \ |
| 1748 | get_unit_name((dd)->unit), ##__VA_ARGS__) |
| 1749 | #define dd_dev_warn(dd, fmt, ...) \ |
| 1750 | dev_warn(&(dd)->pcidev->dev, "%s: " fmt, \ |
| 1751 | get_unit_name((dd)->unit), ##__VA_ARGS__) |
| 1752 | |
| 1753 | #define dd_dev_warn_ratelimited(dd, fmt, ...) \ |
| 1754 | dev_warn_ratelimited(&(dd)->pcidev->dev, "%s: " fmt, \ |
| 1755 | get_unit_name((dd)->unit), ##__VA_ARGS__) |
| 1756 | |
| 1757 | #define dd_dev_info(dd, fmt, ...) \ |
| 1758 | dev_info(&(dd)->pcidev->dev, "%s: " fmt, \ |
| 1759 | get_unit_name((dd)->unit), ##__VA_ARGS__) |
| 1760 | |
| 1761 | #define hfi1_dev_porterr(dd, port, fmt, ...) \ |
| 1762 | dev_err(&(dd)->pcidev->dev, "%s: IB%u:%u " fmt, \ |
| 1763 | get_unit_name((dd)->unit), (dd)->unit, (port), \ |
| 1764 | ##__VA_ARGS__) |
| 1765 | |
| 1766 | /* |
| 1767 | * this is used for formatting hw error messages... |
| 1768 | */ |
| 1769 | struct hfi1_hwerror_msgs { |
| 1770 | u64 mask; |
| 1771 | const char *msg; |
| 1772 | size_t sz; |
| 1773 | }; |
| 1774 | |
| 1775 | /* in intr.c... */ |
| 1776 | void hfi1_format_hwerrors(u64 hwerrs, |
| 1777 | const struct hfi1_hwerror_msgs *hwerrmsgs, |
| 1778 | size_t nhwerrmsgs, char *msg, size_t lmsg); |
| 1779 | |
| 1780 | #define USER_OPCODE_CHECK_VAL 0xC0 |
| 1781 | #define USER_OPCODE_CHECK_MASK 0xC0 |
| 1782 | #define OPCODE_CHECK_VAL_DISABLED 0x0 |
| 1783 | #define OPCODE_CHECK_MASK_DISABLED 0x0 |
| 1784 | |
| 1785 | static inline void hfi1_reset_cpu_counters(struct hfi1_devdata *dd) |
| 1786 | { |
| 1787 | struct hfi1_pportdata *ppd; |
| 1788 | int i; |
| 1789 | |
| 1790 | dd->z_int_counter = get_all_cpu_total(dd->int_counter); |
| 1791 | dd->z_rcv_limit = get_all_cpu_total(dd->rcv_limit); |
| 1792 | |
| 1793 | ppd = (struct hfi1_pportdata *)(dd + 1); |
| 1794 | for (i = 0; i < dd->num_pports; i++, ppd++) { |
| 1795 | ppd->ibport_data.z_rc_acks = |
| 1796 | get_all_cpu_total(ppd->ibport_data.rc_acks); |
| 1797 | ppd->ibport_data.z_rc_qacks = |
| 1798 | get_all_cpu_total(ppd->ibport_data.rc_qacks); |
| 1799 | } |
| 1800 | } |
| 1801 | |
| 1802 | /* Control LED state */ |
| 1803 | static inline void setextled(struct hfi1_devdata *dd, u32 on) |
| 1804 | { |
| 1805 | if (on) |
| 1806 | write_csr(dd, DCC_CFG_LED_CNTRL, 0x1F); |
| 1807 | else |
| 1808 | write_csr(dd, DCC_CFG_LED_CNTRL, 0x10); |
| 1809 | } |
| 1810 | |
| 1811 | int hfi1_tempsense_rd(struct hfi1_devdata *dd, struct hfi1_temp *temp); |
| 1812 | |
| 1813 | #endif /* _HFI1_KERNEL_H */ |