Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Silicon Motion SM712 frame buffer device |
| 3 | * |
| 4 | * Copyright (C) 2006 Silicon Motion Technology Corp. |
| 5 | * Authors: Ge Wang, gewang@siliconmotion.com |
| 6 | * Boyod boyod.yang@siliconmotion.com.cn |
| 7 | * |
| 8 | * Copyright (C) 2009 Lemote, Inc. |
| 9 | * Author: Wu Zhangjin, wuzhangjin@gmail.com |
| 10 | * |
| 11 | * This file is subject to the terms and conditions of the GNU General Public |
| 12 | * License. See the file COPYING in the main directory of this archive for |
| 13 | * more details. |
| 14 | */ |
| 15 | |
| 16 | #define NR_PALETTE 256 |
| 17 | |
| 18 | #define FB_ACCEL_SMI_LYNX 88 |
| 19 | |
| 20 | #define SCREEN_X_RES 1024 |
| 21 | #define SCREEN_Y_RES 600 |
| 22 | #define SCREEN_BPP 16 |
| 23 | |
| 24 | /*Assume SM712 graphics chip has 4MB VRAM */ |
| 25 | #define SM712_VIDEOMEMORYSIZE 0x00400000 |
| 26 | /*Assume SM722 graphics chip has 8MB VRAM */ |
| 27 | #define SM722_VIDEOMEMORYSIZE 0x00800000 |
| 28 | |
| 29 | #define dac_reg (0x3c8) |
| 30 | #define dac_val (0x3c9) |
| 31 | |
Sudip Mukherjee | 7412189 | 2015-02-03 20:23:33 +0530 | [diff] [blame] | 32 | extern void __iomem *smtc_regbaseaddress; |
| 33 | #define smtc_mmiowb(dat, reg) writeb(dat, smtc_regbaseaddress + reg) |
| 34 | #define smtc_mmioww(dat, reg) writew(dat, smtc_regbaseaddress + reg) |
| 35 | #define smtc_mmiowl(dat, reg) writel(dat, smtc_regbaseaddress + reg) |
Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 36 | |
Sudip Mukherjee | 7412189 | 2015-02-03 20:23:33 +0530 | [diff] [blame] | 37 | #define smtc_mmiorb(reg) readb(smtc_regbaseaddress + reg) |
| 38 | #define smtc_mmiorw(reg) readw(smtc_regbaseaddress + reg) |
| 39 | #define smtc_mmiorl(reg) readl(smtc_regbaseaddress + reg) |
Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 40 | |
| 41 | #define SIZE_SR00_SR04 (0x04 - 0x00 + 1) |
| 42 | #define SIZE_SR10_SR24 (0x24 - 0x10 + 1) |
| 43 | #define SIZE_SR30_SR75 (0x75 - 0x30 + 1) |
| 44 | #define SIZE_SR80_SR93 (0x93 - 0x80 + 1) |
| 45 | #define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1) |
| 46 | #define SIZE_GR00_GR08 (0x08 - 0x00 + 1) |
| 47 | #define SIZE_AR00_AR14 (0x14 - 0x00 + 1) |
| 48 | #define SIZE_CR00_CR18 (0x18 - 0x00 + 1) |
| 49 | #define SIZE_CR30_CR4D (0x4D - 0x30 + 1) |
| 50 | #define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1) |
| 51 | #define SIZE_VPR (0x6C + 1) |
| 52 | #define SIZE_DPR (0x44 + 1) |
| 53 | |
| 54 | static inline void smtc_crtcw(int reg, int val) |
| 55 | { |
| 56 | smtc_mmiowb(reg, 0x3d4); |
| 57 | smtc_mmiowb(val, 0x3d5); |
| 58 | } |
| 59 | |
| 60 | static inline unsigned int smtc_crtcr(int reg) |
| 61 | { |
| 62 | smtc_mmiowb(reg, 0x3d4); |
| 63 | return smtc_mmiorb(0x3d5); |
| 64 | } |
| 65 | |
| 66 | static inline void smtc_grphw(int reg, int val) |
| 67 | { |
| 68 | smtc_mmiowb(reg, 0x3ce); |
| 69 | smtc_mmiowb(val, 0x3cf); |
| 70 | } |
| 71 | |
| 72 | static inline unsigned int smtc_grphr(int reg) |
| 73 | { |
| 74 | smtc_mmiowb(reg, 0x3ce); |
| 75 | return smtc_mmiorb(0x3cf); |
| 76 | } |
| 77 | |
| 78 | static inline void smtc_attrw(int reg, int val) |
| 79 | { |
| 80 | smtc_mmiorb(0x3da); |
| 81 | smtc_mmiowb(reg, 0x3c0); |
| 82 | smtc_mmiorb(0x3c1); |
| 83 | smtc_mmiowb(val, 0x3c0); |
| 84 | } |
| 85 | |
| 86 | static inline void smtc_seqw(int reg, int val) |
| 87 | { |
| 88 | smtc_mmiowb(reg, 0x3c4); |
| 89 | smtc_mmiowb(val, 0x3c5); |
| 90 | } |
| 91 | |
| 92 | static inline unsigned int smtc_seqr(int reg) |
| 93 | { |
| 94 | smtc_mmiowb(reg, 0x3c4); |
| 95 | return smtc_mmiorb(0x3c5); |
| 96 | } |
| 97 | |
| 98 | /* The next structure holds all information relevant for a specific video mode. |
| 99 | */ |
| 100 | |
| 101 | struct ModeInit { |
Sudip Mukherjee | c4d5076 | 2015-02-03 20:23:34 +0530 | [diff] [blame] | 102 | int mmsizex; |
| 103 | int mmsizey; |
Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 104 | int bpp; |
| 105 | int hz; |
Sudip Mukherjee | c4d5076 | 2015-02-03 20:23:34 +0530 | [diff] [blame] | 106 | unsigned char init_misc; |
| 107 | unsigned char init_sr00_sr04[SIZE_SR00_SR04]; |
| 108 | unsigned char init_sr10_sr24[SIZE_SR10_SR24]; |
| 109 | unsigned char init_sr30_sr75[SIZE_SR30_SR75]; |
| 110 | unsigned char init_sr80_sr93[SIZE_SR80_SR93]; |
| 111 | unsigned char init_sra0_sraf[SIZE_SRA0_SRAF]; |
| 112 | unsigned char init_gr00_gr08[SIZE_GR00_GR08]; |
| 113 | unsigned char init_ar00_ar14[SIZE_AR00_AR14]; |
| 114 | unsigned char init_cr00_cr18[SIZE_CR00_CR18]; |
| 115 | unsigned char init_cr30_cr4d[SIZE_CR30_CR4D]; |
| 116 | unsigned char init_cr90_cra7[SIZE_CR90_CRA7]; |
Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 117 | }; |
| 118 | |
| 119 | /********************************************************************** |
| 120 | SM712 Mode table. |
| 121 | **********************************************************************/ |
Sudip Mukherjee | c3d6047 | 2015-02-10 17:38:40 +0530 | [diff] [blame] | 122 | static struct ModeInit vgamode[] = { |
Sudip Mukherjee | a8e8f89 | 2015-01-19 13:41:00 +0530 | [diff] [blame] | 123 | { |
| 124 | /* mode#0: 640 x 480 16Bpp 60Hz */ |
| 125 | 640, 480, 16, 60, |
| 126 | /* Init_MISC */ |
| 127 | 0xE3, |
| 128 | { /* Init_SR0_SR4 */ |
| 129 | 0x03, 0x01, 0x0F, 0x00, 0x0E, |
| 130 | }, |
| 131 | { /* Init_SR10_SR24 */ |
| 132 | 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 133 | 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 134 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 135 | }, |
| 136 | { /* Init_SR30_SR75 */ |
| 137 | 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32, |
| 138 | 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF, |
| 139 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 140 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32, |
| 141 | 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA, |
| 142 | 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32, |
| 143 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 144 | 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04, |
| 145 | 0x00, 0x45, 0x30, 0x30, 0x40, 0x30, |
| 146 | }, |
| 147 | { /* Init_SR80_SR93 */ |
| 148 | 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32, |
| 149 | 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32, |
| 150 | 0x00, 0x00, 0x00, 0x00, |
| 151 | }, |
| 152 | { /* Init_SRA0_SRAF */ |
| 153 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 154 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF, |
| 155 | }, |
| 156 | { /* Init_GR00_GR08 */ |
| 157 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 158 | 0xFF, |
| 159 | }, |
| 160 | { /* Init_AR00_AR14 */ |
| 161 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 162 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 163 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 164 | }, |
| 165 | { /* Init_CR00_CR18 */ |
| 166 | 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E, |
| 167 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 168 | 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3, |
| 169 | 0xFF, |
| 170 | }, |
| 171 | { /* Init_CR30_CR4D */ |
| 172 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20, |
| 173 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD, |
| 174 | 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00, |
| 175 | 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF, |
| 176 | }, |
| 177 | { /* Init_CR90_CRA7 */ |
| 178 | 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55, |
| 179 | 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00, |
| 180 | 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00, |
| 181 | }, |
| 182 | }, |
| 183 | { |
| 184 | /* mode#1: 640 x 480 24Bpp 60Hz */ |
| 185 | 640, 480, 24, 60, |
| 186 | /* Init_MISC */ |
| 187 | 0xE3, |
| 188 | { /* Init_SR0_SR4 */ |
| 189 | 0x03, 0x01, 0x0F, 0x00, 0x0E, |
| 190 | }, |
| 191 | { /* Init_SR10_SR24 */ |
| 192 | 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 193 | 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 194 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 195 | }, |
| 196 | { /* Init_SR30_SR75 */ |
| 197 | 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32, |
| 198 | 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF, |
| 199 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 200 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32, |
| 201 | 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA, |
| 202 | 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32, |
| 203 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 204 | 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04, |
| 205 | 0x00, 0x45, 0x30, 0x30, 0x40, 0x30, |
| 206 | }, |
| 207 | { /* Init_SR80_SR93 */ |
| 208 | 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32, |
| 209 | 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32, |
| 210 | 0x00, 0x00, 0x00, 0x00, |
| 211 | }, |
| 212 | { /* Init_SRA0_SRAF */ |
| 213 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 214 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF, |
| 215 | }, |
| 216 | { /* Init_GR00_GR08 */ |
| 217 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 218 | 0xFF, |
| 219 | }, |
| 220 | { /* Init_AR00_AR14 */ |
| 221 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 222 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 223 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 224 | }, |
| 225 | { /* Init_CR00_CR18 */ |
| 226 | 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E, |
| 227 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 228 | 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3, |
| 229 | 0xFF, |
| 230 | }, |
| 231 | { /* Init_CR30_CR4D */ |
| 232 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20, |
| 233 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD, |
| 234 | 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00, |
| 235 | 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF, |
| 236 | }, |
| 237 | { /* Init_CR90_CRA7 */ |
| 238 | 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55, |
| 239 | 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00, |
| 240 | 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00, |
| 241 | }, |
| 242 | }, |
| 243 | { |
| 244 | /* mode#0: 640 x 480 32Bpp 60Hz */ |
| 245 | 640, 480, 32, 60, |
| 246 | /* Init_MISC */ |
| 247 | 0xE3, |
| 248 | { /* Init_SR0_SR4 */ |
| 249 | 0x03, 0x01, 0x0F, 0x00, 0x0E, |
| 250 | }, |
| 251 | { /* Init_SR10_SR24 */ |
| 252 | 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 253 | 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 254 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 255 | }, |
| 256 | { /* Init_SR30_SR75 */ |
| 257 | 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32, |
| 258 | 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF, |
| 259 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 260 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32, |
| 261 | 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA, |
| 262 | 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32, |
| 263 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 264 | 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04, |
| 265 | 0x00, 0x45, 0x30, 0x30, 0x40, 0x30, |
| 266 | }, |
| 267 | { /* Init_SR80_SR93 */ |
| 268 | 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32, |
| 269 | 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32, |
| 270 | 0x00, 0x00, 0x00, 0x00, |
| 271 | }, |
| 272 | { /* Init_SRA0_SRAF */ |
| 273 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 274 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF, |
| 275 | }, |
| 276 | { /* Init_GR00_GR08 */ |
| 277 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 278 | 0xFF, |
| 279 | }, |
| 280 | { /* Init_AR00_AR14 */ |
| 281 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 282 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 283 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 284 | }, |
| 285 | { /* Init_CR00_CR18 */ |
| 286 | 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E, |
| 287 | 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 288 | 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3, |
| 289 | 0xFF, |
| 290 | }, |
| 291 | { /* Init_CR30_CR4D */ |
| 292 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20, |
| 293 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD, |
| 294 | 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00, |
| 295 | 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF, |
| 296 | }, |
| 297 | { /* Init_CR90_CRA7 */ |
| 298 | 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55, |
| 299 | 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00, |
| 300 | 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00, |
| 301 | }, |
| 302 | }, |
| 303 | |
| 304 | { /* mode#2: 800 x 600 16Bpp 60Hz */ |
| 305 | 800, 600, 16, 60, |
| 306 | /* Init_MISC */ |
| 307 | 0x2B, |
| 308 | { /* Init_SR0_SR4 */ |
| 309 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 310 | }, |
| 311 | { /* Init_SR10_SR24 */ |
| 312 | 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 313 | 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 314 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 315 | }, |
| 316 | { /* Init_SR30_SR75 */ |
| 317 | 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24, |
| 318 | 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF, |
| 319 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC, |
| 320 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24, |
| 321 | 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58, |
| 322 | 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24, |
| 323 | 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 324 | 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13, |
| 325 | 0x02, 0x45, 0x30, 0x35, 0x40, 0x20, |
| 326 | }, |
| 327 | { /* Init_SR80_SR93 */ |
| 328 | 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24, |
| 329 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24, |
| 330 | 0x00, 0x00, 0x00, 0x00, |
| 331 | }, |
| 332 | { /* Init_SRA0_SRAF */ |
| 333 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 334 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF, |
| 335 | }, |
| 336 | { /* Init_GR00_GR08 */ |
| 337 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 338 | 0xFF, |
| 339 | }, |
| 340 | { /* Init_AR00_AR14 */ |
| 341 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 342 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 343 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 344 | }, |
| 345 | { /* Init_CR00_CR18 */ |
| 346 | 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0, |
| 347 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 348 | 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3, |
| 349 | 0xFF, |
| 350 | }, |
| 351 | { /* Init_CR30_CR4D */ |
| 352 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20, |
| 353 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD, |
| 354 | 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00, |
| 355 | 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57, |
| 356 | }, |
| 357 | { /* Init_CR90_CRA7 */ |
| 358 | 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA, |
| 359 | 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00, |
| 360 | 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00, |
| 361 | }, |
| 362 | }, |
| 363 | { /* mode#3: 800 x 600 24Bpp 60Hz */ |
| 364 | 800, 600, 24, 60, |
| 365 | 0x2B, |
| 366 | { /* Init_SR0_SR4 */ |
| 367 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 368 | }, |
| 369 | { /* Init_SR10_SR24 */ |
| 370 | 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 371 | 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 372 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 373 | }, |
| 374 | { /* Init_SR30_SR75 */ |
| 375 | 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36, |
| 376 | 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF, |
| 377 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 378 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36, |
| 379 | 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58, |
| 380 | 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36, |
| 381 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 382 | 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13, |
| 383 | 0x02, 0x45, 0x30, 0x30, 0x40, 0x20, |
| 384 | }, |
| 385 | { /* Init_SR80_SR93 */ |
| 386 | 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36, |
| 387 | 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36, |
| 388 | 0x00, 0x00, 0x00, 0x00, |
| 389 | }, |
| 390 | { /* Init_SRA0_SRAF */ |
| 391 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 392 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF, |
| 393 | }, |
| 394 | { /* Init_GR00_GR08 */ |
| 395 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 396 | 0xFF, |
| 397 | }, |
| 398 | { /* Init_AR00_AR14 */ |
| 399 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 400 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 401 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 402 | }, |
| 403 | { /* Init_CR00_CR18 */ |
| 404 | 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0, |
| 405 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 406 | 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3, |
| 407 | 0xFF, |
| 408 | }, |
| 409 | { /* Init_CR30_CR4D */ |
| 410 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20, |
| 411 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD, |
| 412 | 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00, |
| 413 | 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57, |
| 414 | }, |
| 415 | { /* Init_CR90_CRA7 */ |
| 416 | 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA, |
| 417 | 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00, |
| 418 | 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00, |
| 419 | }, |
| 420 | }, |
| 421 | { /* mode#7: 800 x 600 32Bpp 60Hz */ |
| 422 | 800, 600, 32, 60, |
| 423 | /* Init_MISC */ |
| 424 | 0x2B, |
| 425 | { /* Init_SR0_SR4 */ |
| 426 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 427 | }, |
| 428 | { /* Init_SR10_SR24 */ |
| 429 | 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C, |
| 430 | 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 431 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 432 | }, |
| 433 | { /* Init_SR30_SR75 */ |
| 434 | 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24, |
| 435 | 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF, |
| 436 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC, |
| 437 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24, |
| 438 | 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58, |
| 439 | 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24, |
| 440 | 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 441 | 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13, |
| 442 | 0x02, 0x45, 0x30, 0x35, 0x40, 0x20, |
| 443 | }, |
| 444 | { /* Init_SR80_SR93 */ |
| 445 | 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24, |
| 446 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24, |
| 447 | 0x00, 0x00, 0x00, 0x00, |
| 448 | }, |
| 449 | { /* Init_SRA0_SRAF */ |
| 450 | 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED, |
| 451 | 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF, |
| 452 | }, |
| 453 | { /* Init_GR00_GR08 */ |
| 454 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 455 | 0xFF, |
| 456 | }, |
| 457 | { /* Init_AR00_AR14 */ |
| 458 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 459 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 460 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 461 | }, |
| 462 | { /* Init_CR00_CR18 */ |
| 463 | 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0, |
| 464 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 465 | 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3, |
| 466 | 0xFF, |
| 467 | }, |
| 468 | { /* Init_CR30_CR4D */ |
| 469 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20, |
| 470 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD, |
| 471 | 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00, |
| 472 | 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57, |
| 473 | }, |
| 474 | { /* Init_CR90_CRA7 */ |
| 475 | 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA, |
| 476 | 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00, |
| 477 | 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00, |
| 478 | }, |
| 479 | }, |
| 480 | /* We use 1024x768 table to light 1024x600 panel for lemote */ |
| 481 | { /* mode#4: 1024 x 600 16Bpp 60Hz */ |
| 482 | 1024, 600, 16, 60, |
| 483 | /* Init_MISC */ |
| 484 | 0xEB, |
| 485 | { /* Init_SR0_SR4 */ |
| 486 | 0x03, 0x01, 0x0F, 0x00, 0x0E, |
| 487 | }, |
| 488 | { /* Init_SR10_SR24 */ |
| 489 | 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20, |
| 490 | 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 491 | 0xC4, 0x30, 0x02, 0x00, 0x01, |
| 492 | }, |
| 493 | { /* Init_SR30_SR75 */ |
| 494 | 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22, |
| 495 | 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF, |
| 496 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 497 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22, |
| 498 | 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, |
| 499 | 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22, |
| 500 | 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 501 | 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02, |
| 502 | 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20, |
| 503 | }, |
| 504 | { /* Init_SR80_SR93 */ |
| 505 | 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, |
| 506 | 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, |
| 507 | 0x00, 0x00, 0x00, 0x00, |
| 508 | }, |
| 509 | { /* Init_SRA0_SRAF */ |
| 510 | 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, |
| 511 | 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, |
| 512 | }, |
| 513 | { /* Init_GR00_GR08 */ |
| 514 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 515 | 0xFF, |
| 516 | }, |
| 517 | { /* Init_AR00_AR14 */ |
| 518 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 519 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 520 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 521 | }, |
| 522 | { /* Init_CR00_CR18 */ |
| 523 | 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, |
| 524 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 525 | 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, |
| 526 | 0xFF, |
| 527 | }, |
| 528 | { /* Init_CR30_CR4D */ |
| 529 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, |
| 530 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, |
| 531 | 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00, |
| 532 | 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57, |
| 533 | }, |
| 534 | { /* Init_CR90_CRA7 */ |
| 535 | 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, |
| 536 | 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, |
| 537 | 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, |
| 538 | }, |
| 539 | }, |
| 540 | { /* mode#5: 1024 x 768 24Bpp 60Hz */ |
| 541 | 1024, 768, 24, 60, |
| 542 | /* Init_MISC */ |
| 543 | 0xEB, |
| 544 | { /* Init_SR0_SR4 */ |
| 545 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 546 | }, |
| 547 | { /* Init_SR10_SR24 */ |
| 548 | 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, |
| 549 | 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 550 | 0xC4, 0x30, 0x02, 0x01, 0x01, |
| 551 | }, |
| 552 | { /* Init_SR30_SR75 */ |
| 553 | 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, |
| 554 | 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, |
| 555 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 556 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, |
| 557 | 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, |
| 558 | 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, |
| 559 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 560 | 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02, |
| 561 | 0x04, 0x45, 0x30, 0x30, 0x40, 0x20, |
| 562 | }, |
| 563 | { /* Init_SR80_SR93 */ |
| 564 | 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, |
| 565 | 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, |
| 566 | 0x00, 0x00, 0x00, 0x00, |
| 567 | }, |
| 568 | { /* Init_SRA0_SRAF */ |
| 569 | 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, |
| 570 | 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, |
| 571 | }, |
| 572 | { /* Init_GR00_GR08 */ |
| 573 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 574 | 0xFF, |
| 575 | }, |
| 576 | { /* Init_AR00_AR14 */ |
| 577 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 578 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 579 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 580 | }, |
| 581 | { /* Init_CR00_CR18 */ |
| 582 | 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, |
| 583 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 584 | 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, |
| 585 | 0xFF, |
| 586 | }, |
| 587 | { /* Init_CR30_CR4D */ |
| 588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, |
| 589 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, |
| 590 | 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00, |
| 591 | 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF, |
| 592 | }, |
| 593 | { /* Init_CR90_CRA7 */ |
| 594 | 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, |
| 595 | 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, |
| 596 | 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, |
| 597 | }, |
| 598 | }, |
| 599 | { /* mode#4: 1024 x 768 32Bpp 60Hz */ |
| 600 | 1024, 768, 32, 60, |
| 601 | /* Init_MISC */ |
| 602 | 0xEB, |
| 603 | { /* Init_SR0_SR4 */ |
| 604 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 605 | }, |
| 606 | { /* Init_SR10_SR24 */ |
| 607 | 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, |
| 608 | 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 609 | 0xC4, 0x32, 0x02, 0x01, 0x01, |
| 610 | }, |
| 611 | { /* Init_SR30_SR75 */ |
| 612 | 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, |
| 613 | 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, |
| 614 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 615 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, |
| 616 | 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, |
| 617 | 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, |
| 618 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 619 | 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02, |
| 620 | 0x04, 0x45, 0x30, 0x30, 0x40, 0x20, |
| 621 | }, |
| 622 | { /* Init_SR80_SR93 */ |
| 623 | 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, |
| 624 | 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, |
| 625 | 0x00, 0x00, 0x00, 0x00, |
| 626 | }, |
| 627 | { /* Init_SRA0_SRAF */ |
| 628 | 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, |
| 629 | 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, |
| 630 | }, |
| 631 | { /* Init_GR00_GR08 */ |
| 632 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 633 | 0xFF, |
| 634 | }, |
| 635 | { /* Init_AR00_AR14 */ |
| 636 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 637 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 638 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 639 | }, |
| 640 | { /* Init_CR00_CR18 */ |
| 641 | 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, |
| 642 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 643 | 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, |
| 644 | 0xFF, |
| 645 | }, |
| 646 | { /* Init_CR30_CR4D */ |
| 647 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, |
| 648 | 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, |
| 649 | 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00, |
| 650 | 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF, |
| 651 | }, |
| 652 | { /* Init_CR90_CRA7 */ |
| 653 | 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, |
| 654 | 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, |
| 655 | 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, |
| 656 | }, |
| 657 | }, |
| 658 | { /* mode#6: 320 x 240 16Bpp 60Hz */ |
| 659 | 320, 240, 16, 60, |
| 660 | /* Init_MISC */ |
| 661 | 0xEB, |
| 662 | { /* Init_SR0_SR4 */ |
| 663 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 664 | }, |
| 665 | { /* Init_SR10_SR24 */ |
| 666 | 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, |
| 667 | 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 668 | 0xC4, 0x32, 0x02, 0x01, 0x01, |
| 669 | }, |
| 670 | { /* Init_SR30_SR75 */ |
| 671 | 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, |
| 672 | 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, |
| 673 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 674 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, |
| 675 | 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, |
| 676 | 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, |
| 677 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 678 | 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43, |
| 679 | 0x04, 0x45, 0x30, 0x30, 0x40, 0x20, |
| 680 | }, |
| 681 | { /* Init_SR80_SR93 */ |
| 682 | 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, |
| 683 | 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, |
| 684 | 0x00, 0x00, 0x00, 0x00, |
| 685 | }, |
| 686 | { /* Init_SRA0_SRAF */ |
| 687 | 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, |
| 688 | 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, |
| 689 | }, |
| 690 | { /* Init_GR00_GR08 */ |
| 691 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 692 | 0xFF, |
| 693 | }, |
| 694 | { /* Init_AR00_AR14 */ |
| 695 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 696 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 697 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 698 | }, |
| 699 | { /* Init_CR00_CR18 */ |
| 700 | 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, |
| 701 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 702 | 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, |
| 703 | 0xFF, |
| 704 | }, |
| 705 | { /* Init_CR30_CR4D */ |
| 706 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, |
| 707 | 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF, |
| 708 | 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00, |
| 709 | 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF, |
| 710 | }, |
| 711 | { /* Init_CR90_CRA7 */ |
| 712 | 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, |
| 713 | 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, |
| 714 | 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, |
| 715 | }, |
| 716 | }, |
| 717 | |
| 718 | { /* mode#8: 320 x 240 32Bpp 60Hz */ |
| 719 | 320, 240, 32, 60, |
| 720 | /* Init_MISC */ |
| 721 | 0xEB, |
| 722 | { /* Init_SR0_SR4 */ |
| 723 | 0x03, 0x01, 0x0F, 0x03, 0x0E, |
| 724 | }, |
| 725 | { /* Init_SR10_SR24 */ |
| 726 | 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, |
| 727 | 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 728 | 0xC4, 0x32, 0x02, 0x01, 0x01, |
| 729 | }, |
| 730 | { /* Init_SR30_SR75 */ |
| 731 | 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, |
| 732 | 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, |
| 733 | 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, |
| 734 | 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, |
| 735 | 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, |
| 736 | 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, |
| 737 | 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, |
| 738 | 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43, |
| 739 | 0x04, 0x45, 0x30, 0x30, 0x40, 0x20, |
| 740 | }, |
| 741 | { /* Init_SR80_SR93 */ |
| 742 | 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, |
| 743 | 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, |
| 744 | 0x00, 0x00, 0x00, 0x00, |
| 745 | }, |
| 746 | { /* Init_SRA0_SRAF */ |
| 747 | 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, |
| 748 | 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, |
| 749 | }, |
| 750 | { /* Init_GR00_GR08 */ |
| 751 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, |
| 752 | 0xFF, |
| 753 | }, |
| 754 | { /* Init_AR00_AR14 */ |
| 755 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, |
| 756 | 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, |
| 757 | 0x41, 0x00, 0x0F, 0x00, 0x00, |
| 758 | }, |
| 759 | { /* Init_CR00_CR18 */ |
| 760 | 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, |
| 761 | 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 762 | 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, |
| 763 | 0xFF, |
| 764 | }, |
| 765 | { /* Init_CR30_CR4D */ |
| 766 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, |
| 767 | 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF, |
| 768 | 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00, |
| 769 | 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF, |
| 770 | }, |
| 771 | { /* Init_CR90_CRA7 */ |
| 772 | 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, |
| 773 | 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, |
| 774 | 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, |
| 775 | }, |
| 776 | }, |
| 777 | }; |
| 778 | |
Sudip Mukherjee | c4d5076 | 2015-02-03 20:23:34 +0530 | [diff] [blame] | 779 | #define numvgamodes ARRAY_SIZE(vgamode) |