Shrenuj Bansal | a419c79 | 2016-10-20 14:05:11 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2013-2014, 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ADRENO_IB_PARSER__ |
| 14 | #define __ADRENO_IB_PARSER__ |
| 15 | |
| 16 | #include "adreno.h" |
| 17 | |
| 18 | extern const unsigned int a3xx_cp_addr_regs[]; |
| 19 | extern const unsigned int a4xx_cp_addr_regs[]; |
| 20 | |
| 21 | /* |
| 22 | * struct adreno_ib_object - Structure containing information about an |
| 23 | * address range found in an IB |
| 24 | * @gpuaddr: The starting gpuaddress of the range |
| 25 | * @size: Size of the range |
| 26 | * @snapshot_obj_type - Type of range used in snapshot |
| 27 | * @entry: The memory entry in which this range is found |
| 28 | */ |
| 29 | struct adreno_ib_object { |
| 30 | uint64_t gpuaddr; |
| 31 | uint64_t size; |
| 32 | int snapshot_obj_type; |
| 33 | struct kgsl_mem_entry *entry; |
| 34 | }; |
| 35 | |
| 36 | /* |
| 37 | * struct adreno_ib_object_list - List of address ranges found in IB |
| 38 | * @obj_list: The address range list |
| 39 | * @num_objs: Number of objects in list |
| 40 | */ |
| 41 | struct adreno_ib_object_list { |
| 42 | struct adreno_ib_object *obj_list; |
| 43 | int num_objs; |
| 44 | }; |
| 45 | |
| 46 | /* |
| 47 | * adreno registers used during IB parsing, there contain addresses |
| 48 | * and sizes of the addresses that present in an IB |
| 49 | */ |
| 50 | enum adreno_cp_addr_regs { |
| 51 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_0 = 0, |
| 52 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_0, |
| 53 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_1, |
| 54 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_1, |
| 55 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_2, |
| 56 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_2, |
| 57 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_3, |
| 58 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_3, |
| 59 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_4, |
| 60 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_4, |
| 61 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_5, |
| 62 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_5, |
| 63 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_6, |
| 64 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_6, |
| 65 | ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_7, |
| 66 | ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_7, |
| 67 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_0, |
| 68 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_1, |
| 69 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_2, |
| 70 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_3, |
| 71 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_4, |
| 72 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_5, |
| 73 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_6, |
| 74 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_7, |
| 75 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_8, |
| 76 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_9, |
| 77 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_10, |
| 78 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_11, |
| 79 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_12, |
| 80 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_13, |
| 81 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_14, |
| 82 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_15, |
| 83 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_16, |
| 84 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_17, |
| 85 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_18, |
| 86 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_19, |
| 87 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_20, |
| 88 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_21, |
| 89 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_22, |
| 90 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_23, |
| 91 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_24, |
| 92 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_25, |
| 93 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_26, |
| 94 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_27, |
| 95 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_28, |
| 96 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_29, |
| 97 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_30, |
| 98 | ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_31, |
| 99 | ADRENO_CP_ADDR_VSC_SIZE_ADDRESS, |
| 100 | ADRENO_CP_ADDR_SP_VS_PVT_MEM_ADDR, |
| 101 | ADRENO_CP_ADDR_SP_FS_PVT_MEM_ADDR, |
| 102 | ADRENO_CP_ADDR_SP_VS_OBJ_START_REG, |
| 103 | ADRENO_CP_ADDR_SP_FS_OBJ_START_REG, |
| 104 | ADRENO_CP_UCHE_INVALIDATE0, |
| 105 | ADRENO_CP_UCHE_INVALIDATE1, |
| 106 | ADRENO_CP_ADDR_MAX, |
| 107 | }; |
| 108 | |
| 109 | /* |
| 110 | * adreno_ib_init_ib_obj() - Create an ib object structure and initialize it |
| 111 | * with gpuaddress and size |
| 112 | * @gpuaddr: gpuaddr with which to initialize the object with |
| 113 | * @size: Size in bytes with which the object is initialized |
| 114 | * @ib_type: The IB type used by snapshot |
| 115 | * |
| 116 | * Returns the object pointer on success else error code in the pointer |
| 117 | */ |
| 118 | static inline void adreno_ib_init_ib_obj(uint64_t gpuaddr, |
| 119 | uint64_t size, int obj_type, |
| 120 | struct kgsl_mem_entry *entry, |
| 121 | struct adreno_ib_object *ib_obj) |
| 122 | { |
| 123 | ib_obj->gpuaddr = gpuaddr; |
| 124 | ib_obj->size = size; |
| 125 | ib_obj->snapshot_obj_type = obj_type; |
| 126 | ib_obj->entry = entry; |
| 127 | } |
| 128 | |
| 129 | /* |
| 130 | * adreno_cp_parser_getreg() - Returns the value of register offset |
| 131 | * @adreno_dev: The adreno device being operated upon |
| 132 | * @reg_enum: Enum index of the register whose offset is returned |
| 133 | */ |
| 134 | static inline int adreno_cp_parser_getreg(struct adreno_device *adreno_dev, |
| 135 | enum adreno_cp_addr_regs reg_enum) |
| 136 | { |
| 137 | if (reg_enum == ADRENO_CP_ADDR_MAX) |
| 138 | return -EEXIST; |
| 139 | |
| 140 | if (adreno_is_a3xx(adreno_dev)) |
| 141 | return a3xx_cp_addr_regs[reg_enum]; |
| 142 | else if (adreno_is_a4xx(adreno_dev)) |
| 143 | return a4xx_cp_addr_regs[reg_enum]; |
| 144 | else |
| 145 | return -EEXIST; |
| 146 | } |
| 147 | |
| 148 | /* |
| 149 | * adreno_cp_parser_regindex() - Returns enum index for a given register offset |
| 150 | * @adreno_dev: The adreno device being operated upon |
| 151 | * @offset: Register offset |
| 152 | * @start: The start index to search from |
| 153 | * @end: The last index to search |
| 154 | * |
| 155 | * Checks the list of registers defined for the device and returns the index |
| 156 | * whose offset value matches offset parameter. |
| 157 | */ |
| 158 | static inline int adreno_cp_parser_regindex(struct adreno_device *adreno_dev, |
| 159 | unsigned int offset, |
| 160 | enum adreno_cp_addr_regs start, |
| 161 | enum adreno_cp_addr_regs end) |
| 162 | { |
| 163 | int i; |
| 164 | const unsigned int *regs; |
| 165 | |
| 166 | if (adreno_is_a4xx(adreno_dev)) |
| 167 | regs = a4xx_cp_addr_regs; |
| 168 | else if (adreno_is_a3xx(adreno_dev)) |
| 169 | regs = a3xx_cp_addr_regs; |
| 170 | else |
| 171 | return -EEXIST; |
| 172 | |
| 173 | for (i = start; i <= end && i < ADRENO_CP_ADDR_MAX; i++) |
| 174 | if (regs[i] == offset) |
| 175 | return i; |
| 176 | return -EEXIST; |
| 177 | } |
| 178 | |
| 179 | int adreno_ib_create_object_list( |
| 180 | struct kgsl_device *device, |
| 181 | struct kgsl_process_private *process, |
Hareesh Gundu | 9c6b1fa | 2017-01-06 15:37:09 +0530 | [diff] [blame] | 182 | uint64_t gpuaddr, uint64_t dwords, uint64_t ib2base, |
Shrenuj Bansal | a419c79 | 2016-10-20 14:05:11 -0700 | [diff] [blame] | 183 | struct adreno_ib_object_list **out_ib_obj_list); |
| 184 | |
| 185 | void adreno_ib_destroy_obj_list(struct adreno_ib_object_list *ib_obj_list); |
| 186 | |
| 187 | #endif |