Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/pci/setup-res.c |
| 3 | * |
| 4 | * Extruded from code written by |
| 5 | * Dave Rusling (david.rusling@reo.mts.dec.com) |
| 6 | * David Mosberger (davidm@cs.arizona.edu) |
| 7 | * David Miller (davem@redhat.com) |
| 8 | * |
| 9 | * Support routines for initializing a PCI subsystem. |
| 10 | */ |
| 11 | |
| 12 | /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */ |
| 13 | |
| 14 | /* |
| 15 | * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| 16 | * Resource sorting |
| 17 | */ |
| 18 | |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/kernel.h> |
Paul Gortmaker | 363c75d | 2011-05-27 09:37:25 -0400 | [diff] [blame] | 21 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/pci.h> |
| 23 | #include <linux/errno.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/cache.h> |
| 26 | #include <linux/slab.h> |
| 27 | #include "pci.h" |
| 28 | |
| 29 | |
Yu Zhao | 14add80 | 2008-11-22 02:38:52 +0800 | [diff] [blame] | 30 | void pci_update_resource(struct pci_dev *dev, int resno) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | { |
| 32 | struct pci_bus_region region; |
Bjorn Helgaas | 9aac537 | 2012-07-09 19:49:37 -0600 | [diff] [blame^] | 33 | bool disable; |
| 34 | u16 cmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | u32 new, check, mask; |
| 36 | int reg; |
Yu Zhao | 613e7ed | 2008-11-22 02:41:27 +0800 | [diff] [blame] | 37 | enum pci_bar_type type; |
Yu Zhao | 14add80 | 2008-11-22 02:38:52 +0800 | [diff] [blame] | 38 | struct resource *res = dev->resource + resno; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | |
Ralf Baechle | fb0f2b4 | 2006-12-19 13:12:08 -0800 | [diff] [blame] | 40 | /* |
| 41 | * Ignore resources for unimplemented BARs and unused resource slots |
| 42 | * for 64 bit BARs. |
| 43 | */ |
Ivan Kokshaysky | cf7bee5 | 2005-08-07 13:49:59 +0400 | [diff] [blame] | 44 | if (!res->flags) |
| 45 | return; |
| 46 | |
Ralf Baechle | fb0f2b4 | 2006-12-19 13:12:08 -0800 | [diff] [blame] | 47 | /* |
| 48 | * Ignore non-moveable resources. This might be legacy resources for |
| 49 | * which no functional BAR register exists or another important |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 50 | * system resource we shouldn't move around. |
Ralf Baechle | fb0f2b4 | 2006-12-19 13:12:08 -0800 | [diff] [blame] | 51 | */ |
| 52 | if (res->flags & IORESOURCE_PCI_FIXED) |
| 53 | return; |
| 54 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | pcibios_resource_to_bus(dev, ®ion, res); |
| 56 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | new = region.start | (res->flags & PCI_REGION_FLAG_MASK); |
| 58 | if (res->flags & IORESOURCE_IO) |
| 59 | mask = (u32)PCI_BASE_ADDRESS_IO_MASK; |
| 60 | else |
| 61 | mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; |
| 62 | |
Yu Zhao | 613e7ed | 2008-11-22 02:41:27 +0800 | [diff] [blame] | 63 | reg = pci_resource_bar(dev, resno, &type); |
| 64 | if (!reg) |
| 65 | return; |
| 66 | if (type != pci_bar_unknown) { |
Linus Torvalds | 755528c | 2005-08-26 10:49:22 -0700 | [diff] [blame] | 67 | if (!(res->flags & IORESOURCE_ROM_ENABLE)) |
| 68 | return; |
| 69 | new |= PCI_ROM_ADDRESS_ENABLE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | } |
| 71 | |
Bjorn Helgaas | 9aac537 | 2012-07-09 19:49:37 -0600 | [diff] [blame^] | 72 | /* |
| 73 | * We can't update a 64-bit BAR atomically, so when possible, |
| 74 | * disable decoding so that a half-updated BAR won't conflict |
| 75 | * with another device. |
| 76 | */ |
| 77 | disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on; |
| 78 | if (disable) { |
| 79 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 80 | pci_write_config_word(dev, PCI_COMMAND, |
| 81 | cmd & ~PCI_COMMAND_MEMORY); |
| 82 | } |
| 83 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | pci_write_config_dword(dev, reg, new); |
| 85 | pci_read_config_dword(dev, reg, &check); |
| 86 | |
| 87 | if ((new ^ check) & mask) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 88 | dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n", |
| 89 | resno, new, check); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | } |
| 91 | |
Bjorn Helgaas | 28c6821 | 2011-06-14 13:04:35 -0600 | [diff] [blame] | 92 | if (res->flags & IORESOURCE_MEM_64) { |
Ivan Kokshaysky | cf7bee5 | 2005-08-07 13:49:59 +0400 | [diff] [blame] | 93 | new = region.start >> 16 >> 16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | pci_write_config_dword(dev, reg + 4, new); |
| 95 | pci_read_config_dword(dev, reg + 4, &check); |
| 96 | if (check != new) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 97 | dev_err(&dev->dev, "BAR %d: error updating " |
| 98 | "(high %#08x != %#08x)\n", resno, new, check); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | } |
| 100 | } |
Bjorn Helgaas | 9aac537 | 2012-07-09 19:49:37 -0600 | [diff] [blame^] | 101 | |
| 102 | if (disable) |
| 103 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 104 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | res->flags &= ~IORESOURCE_UNSET; |
Vincent Palatin | 85b8582 | 2011-12-05 11:51:18 -0800 | [diff] [blame] | 106 | dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n", |
| 107 | resno, res, (unsigned long long)region.start, |
| 108 | (unsigned long long)region.end); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | } |
| 110 | |
Sam Ravnborg | 96bde06 | 2007-03-26 21:53:30 -0800 | [diff] [blame] | 111 | int pci_claim_resource(struct pci_dev *dev, int resource) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | { |
| 113 | struct resource *res = &dev->resource[resource]; |
Bjorn Helgaas | 966f3a7 | 2010-03-11 17:01:19 -0700 | [diff] [blame] | 114 | struct resource *root, *conflict; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | |
Matthew Wilcox | cebd78a | 2009-06-17 16:33:33 -0400 | [diff] [blame] | 116 | root = pci_find_parent_resource(dev, res); |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 117 | if (!root) { |
Bjorn Helgaas | f6d440d | 2010-06-03 13:47:18 -0600 | [diff] [blame] | 118 | dev_info(&dev->dev, "no compatible bridge window for %pR\n", |
| 119 | res); |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 120 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | } |
| 122 | |
Bjorn Helgaas | 966f3a7 | 2010-03-11 17:01:19 -0700 | [diff] [blame] | 123 | conflict = request_resource_conflict(root, res); |
| 124 | if (conflict) { |
Bjorn Helgaas | f6d440d | 2010-06-03 13:47:18 -0600 | [diff] [blame] | 125 | dev_info(&dev->dev, |
| 126 | "address space collision: %pR conflicts with %s %pR\n", |
| 127 | res, conflict->name, conflict); |
Bjorn Helgaas | 966f3a7 | 2010-03-11 17:01:19 -0700 | [diff] [blame] | 128 | return -EBUSY; |
| 129 | } |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 130 | |
Bjorn Helgaas | 966f3a7 | 2010-03-11 17:01:19 -0700 | [diff] [blame] | 131 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | } |
Jesse Barnes | eaa959d | 2009-06-30 21:45:44 -0700 | [diff] [blame] | 133 | EXPORT_SYMBOL(pci_claim_resource); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | |
Yuji Shimada | 32a9a682 | 2009-03-16 17:13:39 +0900 | [diff] [blame] | 135 | void pci_disable_bridge_window(struct pci_dev *dev) |
| 136 | { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 137 | dev_info(&dev->dev, "disabling bridge mem windows\n"); |
Yuji Shimada | 32a9a682 | 2009-03-16 17:13:39 +0900 | [diff] [blame] | 138 | |
| 139 | /* MMIO Base/Limit */ |
| 140 | pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0); |
| 141 | |
| 142 | /* Prefetchable MMIO Base/Limit */ |
| 143 | pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0); |
| 144 | pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0); |
| 145 | pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff); |
| 146 | } |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 147 | |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 148 | static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev, |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 149 | int resno, resource_size_t size, resource_size_t align) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | struct resource *res = dev->resource + resno; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 152 | resource_size_t min; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | int ret; |
| 154 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | |
| 157 | /* First, try exact prefetching match.. */ |
| 158 | ret = pci_bus_alloc_resource(bus, res, size, align, min, |
| 159 | IORESOURCE_PREFETCH, |
| 160 | pcibios_align_resource, dev); |
| 161 | |
| 162 | if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) { |
| 163 | /* |
| 164 | * That failed. |
| 165 | * |
| 166 | * But a prefetching area can handle a non-prefetching |
| 167 | * window (it will just not perform as well). |
| 168 | */ |
| 169 | ret = pci_bus_alloc_resource(bus, res, size, align, min, 0, |
| 170 | pcibios_align_resource, dev); |
| 171 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | return ret; |
| 173 | } |
| 174 | |
Myron Stowe | 6535943f | 2011-11-21 11:54:19 -0700 | [diff] [blame] | 175 | /* |
| 176 | * Generic function that returns a value indicating that the device's |
| 177 | * original BIOS BAR address was not saved and so is not available for |
| 178 | * reinstatement. |
| 179 | * |
| 180 | * Can be over-ridden by architecture specific code that implements |
| 181 | * reinstatement functionality rather than leaving it disabled when |
| 182 | * normal allocation attempts fail. |
| 183 | */ |
| 184 | resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx) |
| 185 | { |
| 186 | return 0; |
| 187 | } |
| 188 | |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 189 | static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev, |
| 190 | int resno, resource_size_t size) |
| 191 | { |
| 192 | struct resource *root, *conflict; |
Myron Stowe | 6535943f | 2011-11-21 11:54:19 -0700 | [diff] [blame] | 193 | resource_size_t fw_addr, start, end; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 194 | int ret = 0; |
| 195 | |
Myron Stowe | 6535943f | 2011-11-21 11:54:19 -0700 | [diff] [blame] | 196 | fw_addr = pcibios_retrieve_fw_addr(dev, resno); |
| 197 | if (!fw_addr) |
| 198 | return 1; |
| 199 | |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 200 | start = res->start; |
| 201 | end = res->end; |
Myron Stowe | 6535943f | 2011-11-21 11:54:19 -0700 | [diff] [blame] | 202 | res->start = fw_addr; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 203 | res->end = res->start + size - 1; |
Myron Stowe | 351fc6d | 2011-11-21 11:54:07 -0700 | [diff] [blame] | 204 | |
| 205 | root = pci_find_parent_resource(dev, res); |
| 206 | if (!root) { |
| 207 | if (res->flags & IORESOURCE_IO) |
| 208 | root = &ioport_resource; |
| 209 | else |
| 210 | root = &iomem_resource; |
| 211 | } |
| 212 | |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 213 | dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n", |
| 214 | resno, res); |
| 215 | conflict = request_resource_conflict(root, res); |
| 216 | if (conflict) { |
| 217 | dev_info(&dev->dev, |
| 218 | "BAR %d: %pR conflicts with %s %pR\n", resno, |
| 219 | res, conflict->name, conflict); |
| 220 | res->start = start; |
| 221 | res->end = end; |
| 222 | ret = 1; |
| 223 | } |
| 224 | return ret; |
| 225 | } |
| 226 | |
| 227 | static int _pci_assign_resource(struct pci_dev *dev, int resno, int size, resource_size_t min_align) |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 228 | { |
| 229 | struct resource *res = dev->resource + resno; |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 230 | struct pci_bus *bus; |
| 231 | int ret; |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 232 | char *type; |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 233 | |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 234 | bus = dev->bus; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 235 | while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) { |
| 236 | if (!bus->parent || !bus->self->transparent) |
| 237 | break; |
| 238 | bus = bus->parent; |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 239 | } |
| 240 | |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 241 | if (ret) { |
| 242 | if (res->flags & IORESOURCE_MEM) |
| 243 | if (res->flags & IORESOURCE_PREFETCH) |
| 244 | type = "mem pref"; |
| 245 | else |
| 246 | type = "mem"; |
| 247 | else if (res->flags & IORESOURCE_IO) |
| 248 | type = "io"; |
| 249 | else |
| 250 | type = "unknown"; |
| 251 | dev_info(&dev->dev, |
| 252 | "BAR %d: can't assign %s (size %#llx)\n", |
| 253 | resno, type, (unsigned long long) resource_size(res)); |
| 254 | } |
Yinghai Lu | d09ee96 | 2009-04-23 20:49:25 -0700 | [diff] [blame] | 255 | |
| 256 | return ret; |
| 257 | } |
| 258 | |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 259 | int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize, |
| 260 | resource_size_t min_align) |
| 261 | { |
| 262 | struct resource *res = dev->resource + resno; |
| 263 | resource_size_t new_size; |
| 264 | int ret; |
| 265 | |
| 266 | if (!res->parent) { |
Masanari Iida | 0dea210 | 2012-01-26 23:45:47 +0900 | [diff] [blame] | 267 | dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR " |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 268 | "\n", resno, res); |
| 269 | return -EINVAL; |
| 270 | } |
| 271 | |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 272 | /* already aligned with min_align */ |
| 273 | new_size = resource_size(res) + addsize; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 274 | ret = _pci_assign_resource(dev, resno, new_size, min_align); |
| 275 | if (!ret) { |
| 276 | res->flags &= ~IORESOURCE_STARTALIGN; |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 277 | dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res); |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 278 | if (resno < PCI_BRIDGE_RESOURCES) |
| 279 | pci_update_resource(dev, resno); |
| 280 | } |
| 281 | return ret; |
| 282 | } |
| 283 | |
| 284 | int pci_assign_resource(struct pci_dev *dev, int resno) |
| 285 | { |
| 286 | struct resource *res = dev->resource + resno; |
| 287 | resource_size_t align, size; |
| 288 | struct pci_bus *bus; |
| 289 | int ret; |
| 290 | |
| 291 | align = pci_resource_alignment(dev, res); |
| 292 | if (!align) { |
| 293 | dev_info(&dev->dev, "BAR %d: can't assign %pR " |
| 294 | "(bogus alignment)\n", resno, res); |
| 295 | return -EINVAL; |
| 296 | } |
| 297 | |
| 298 | bus = dev->bus; |
| 299 | size = resource_size(res); |
| 300 | ret = _pci_assign_resource(dev, resno, size, align); |
| 301 | |
| 302 | /* |
| 303 | * If we failed to assign anything, let's try the address |
| 304 | * where firmware left it. That at least has a chance of |
| 305 | * working, which is better than just leaving it disabled. |
| 306 | */ |
Myron Stowe | 6535943f | 2011-11-21 11:54:19 -0700 | [diff] [blame] | 307 | if (ret < 0) |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 308 | ret = pci_revert_fw_address(res, dev, resno, size); |
| 309 | |
| 310 | if (!ret) { |
| 311 | res->flags &= ~IORESOURCE_STARTALIGN; |
| 312 | dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res); |
| 313 | if (resno < PCI_BRIDGE_RESOURCES) |
| 314 | pci_update_resource(dev, resno); |
| 315 | } |
| 316 | return ret; |
| 317 | } |
| 318 | |
Bjorn Helgaas | 842de40 | 2008-03-04 11:56:47 -0700 | [diff] [blame] | 319 | int pci_enable_resources(struct pci_dev *dev, int mask) |
| 320 | { |
| 321 | u16 cmd, old_cmd; |
| 322 | int i; |
| 323 | struct resource *r; |
| 324 | |
| 325 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 326 | old_cmd = cmd; |
| 327 | |
| 328 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 329 | if (!(mask & (1 << i))) |
| 330 | continue; |
| 331 | |
| 332 | r = &dev->resource[i]; |
| 333 | |
| 334 | if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) |
| 335 | continue; |
| 336 | if ((i == PCI_ROM_RESOURCE) && |
| 337 | (!(r->flags & IORESOURCE_ROM_ENABLE))) |
| 338 | continue; |
| 339 | |
| 340 | if (!r->parent) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 341 | dev_err(&dev->dev, "device not available " |
| 342 | "(can't reserve %pR)\n", r); |
Bjorn Helgaas | 842de40 | 2008-03-04 11:56:47 -0700 | [diff] [blame] | 343 | return -EINVAL; |
| 344 | } |
| 345 | |
| 346 | if (r->flags & IORESOURCE_IO) |
| 347 | cmd |= PCI_COMMAND_IO; |
| 348 | if (r->flags & IORESOURCE_MEM) |
| 349 | cmd |= PCI_COMMAND_MEMORY; |
| 350 | } |
| 351 | |
| 352 | if (cmd != old_cmd) { |
| 353 | dev_info(&dev->dev, "enabling device (%04x -> %04x)\n", |
| 354 | old_cmd, cmd); |
| 355 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 356 | } |
| 357 | return 0; |
| 358 | } |