Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 1 | /* Load firmware into Core B on a BF561 |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 2 | * |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 3 | * Copyright 2004-2009 Analog Devices Inc. |
| 4 | * Licensed under the GPL-2 or later. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 7 | /* The Core B reset func requires code in the application that is loaded into |
| 8 | * Core B. In order to reset, the application needs to install an interrupt |
| 9 | * handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and |
| 10 | * writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. This causes Core |
| 11 | * B to stall when Supplemental Interrupt 0 is set, and will reset PC to |
| 12 | * 0xff600000 when COREB_SRAM_INIT is cleared. |
| 13 | */ |
| 14 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 15 | #include <linux/device.h> |
Enrik Berkhan | 76a7f40 | 2007-12-24 19:51:31 +0800 | [diff] [blame] | 16 | #include <linux/fs.h> |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/miscdevice.h> |
| 19 | #include <linux/module.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 20 | |
Mike Frysinger | 7696eec | 2010-10-06 06:33:08 +0000 | [diff] [blame] | 21 | #define CMD_COREB_START _IO('b', 0) |
| 22 | #define CMD_COREB_STOP _IO('b', 1) |
| 23 | #define CMD_COREB_RESET _IO('b', 2) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 24 | |
Mike Frysinger | 17a1b5e | 2009-10-13 12:50:05 +0000 | [diff] [blame] | 25 | static long |
| 26 | coreb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 27 | { |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 28 | int ret = 0; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 29 | |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 30 | switch (cmd) { |
| 31 | case CMD_COREB_START: |
Mike Frysinger | 39c9996 | 2010-10-19 18:44:23 +0000 | [diff] [blame] | 32 | bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 33 | break; |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 34 | case CMD_COREB_STOP: |
Mike Frysinger | 39c9996 | 2010-10-19 18:44:23 +0000 | [diff] [blame] | 35 | bfin_write_SYSCR(bfin_read_SYSCR() | 0x0020); |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 36 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); |
| 37 | break; |
| 38 | case CMD_COREB_RESET: |
| 39 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); |
| 40 | break; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 41 | default: |
| 42 | ret = -EINVAL; |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 43 | break; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 44 | } |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 45 | |
| 46 | CSYNC(); |
| 47 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 48 | return ret; |
| 49 | } |
| 50 | |
Alexey Dobriyan | 828c095 | 2009-10-01 15:43:56 -0700 | [diff] [blame] | 51 | static const struct file_operations coreb_fops = { |
Mike Frysinger | 17a1b5e | 2009-10-13 12:50:05 +0000 | [diff] [blame] | 52 | .owner = THIS_MODULE, |
| 53 | .unlocked_ioctl = coreb_ioctl, |
Arnd Bergmann | 6038f37 | 2010-08-15 18:52:59 +0200 | [diff] [blame] | 54 | .llseek = noop_llseek, |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 55 | }; |
| 56 | |
| 57 | static struct miscdevice coreb_dev = { |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 58 | .minor = MISC_DYNAMIC_MINOR, |
| 59 | .name = "coreb", |
| 60 | .fops = &coreb_fops, |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 61 | }; |
| 62 | |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 63 | static int __init bf561_coreb_init(void) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 64 | { |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 65 | return misc_register(&coreb_dev); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 66 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 67 | module_init(bf561_coreb_init); |
Mike Frysinger | c8f36dc | 2009-05-14 14:55:50 +0000 | [diff] [blame] | 68 | |
| 69 | static void __exit bf561_coreb_exit(void) |
| 70 | { |
| 71 | misc_deregister(&coreb_dev); |
| 72 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 73 | module_exit(bf561_coreb_exit); |
| 74 | |
| 75 | MODULE_AUTHOR("Bas Vermeulen <bvermeul@blackstar.xs4all.nl>"); |
| 76 | MODULE_DESCRIPTION("BF561 Core B Support"); |
Mike Frysinger | 6cf4d0f | 2010-10-06 06:30:04 +0000 | [diff] [blame] | 77 | MODULE_LICENSE("GPL"); |