Ben Dooks | e198168 | 2006-02-10 22:40:51 +0000 | [diff] [blame] | 1 | /* linux/include/asm-arm/arch-s3c2410/h1940-latch.h |
| 2 | * |
Ben Dooks | 9d6be12 | 2006-12-17 20:02:01 +0100 | [diff] [blame] | 3 | * Copyright (c) 2005 Simtec Electronics |
Ben Dooks | e198168 | 2006-02-10 22:40:51 +0000 | [diff] [blame] | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * iPAQ H1940 series - latch definitions |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __ASM_ARCH_H1940_LATCH_H |
| 15 | #define __ASM_ARCH_H1940_LATCH_H |
| 16 | |
| 17 | |
| 18 | #ifndef __ASSEMBLY__ |
Ben Dooks | 2d8c1ce | 2006-12-17 20:18:40 +0100 | [diff] [blame] | 19 | #define H1940_LATCH ((void __force __iomem *)0xF8000000) |
Ben Dooks | e198168 | 2006-02-10 22:40:51 +0000 | [diff] [blame] | 20 | #else |
| 21 | #define H1940_LATCH 0xF8000000 |
| 22 | #endif |
| 23 | |
| 24 | #define H1940_PA_LATCH (S3C2410_CS2) |
| 25 | |
| 26 | /* SD layer latch */ |
| 27 | |
| 28 | #define H1940_LATCH_SDQ1 (1<<16) |
| 29 | #define H1940_LATCH_LCD_P1 (1<<17) |
| 30 | #define H1940_LATCH_LCD_P2 (1<<18) |
| 31 | #define H1940_LATCH_LCD_P3 (1<<19) |
| 32 | #define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ |
| 33 | #define H1940_LATCH_LED_RED (1<<21) |
| 34 | #define H1940_LATCH_SDQ7 (1<<22) |
| 35 | #define H1940_LATCH_USB_DP (1<<23) |
| 36 | |
| 37 | /* CPU layer latch */ |
| 38 | |
| 39 | #define H1940_LATCH_UDA_POWER (1<<24) |
| 40 | #define H1940_LATCH_AUDIO_POWER (1<<25) |
| 41 | #define H1940_LATCH_SM803_ENABLE (1<<26) |
| 42 | #define H1940_LATCH_LCD_P4 (1<<27) |
| 43 | #define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ |
| 44 | #define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ |
| 45 | #define H1940_LATCH_LED_GREEN (1<<30) |
| 46 | #define H1940_LATCH_LED_FLASH (1<<31) |
| 47 | |
| 48 | /* default settings */ |
| 49 | |
| 50 | #define H1940_LATCH_DEFAULT \ |
| 51 | H1940_LATCH_LCD_P4 | \ |
| 52 | H1940_LATCH_SM803_ENABLE | \ |
| 53 | H1940_LATCH_SDQ1 | \ |
| 54 | H1940_LATCH_LCD_P1 | \ |
| 55 | H1940_LATCH_LCD_P2 | \ |
| 56 | H1940_LATCH_LCD_P3 | \ |
| 57 | H1940_LATCH_MAX1698_nSHUTDOWN | \ |
| 58 | H1940_LATCH_CPUQ5 |
| 59 | |
| 60 | /* control functions */ |
| 61 | |
| 62 | extern void h1940_latch_control(unsigned int clear, unsigned int set); |
| 63 | |
| 64 | #endif /* __ASM_ARCH_H1940_LATCH_H */ |