Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Toradex AG |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | */ |
| 9 | |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 10 | #include "vf610.dtsi" |
| 11 | |
| 12 | / { |
| 13 | model = "Toradex Colibri VF61 COM"; |
Stefan Agner | 10f34a1 | 2014-07-18 16:25:18 +0200 | [diff] [blame] | 14 | compatible = "toradex,vf610-colibri_vf61", "fsl,vf610"; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 15 | |
| 16 | memory { |
| 17 | reg = <0x80000000 0x10000000>; |
| 18 | }; |
| 19 | |
| 20 | clocks { |
| 21 | enet_ext { |
| 22 | compatible = "fixed-clock"; |
| 23 | #clock-cells = <0>; |
| 24 | clock-frequency = <50000000>; |
| 25 | }; |
| 26 | }; |
| 27 | |
| 28 | }; |
| 29 | |
| 30 | &esdhc1 { |
| 31 | pinctrl-names = "default"; |
| 32 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 33 | bus-width = <4>; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 34 | }; |
| 35 | |
| 36 | &fec1 { |
| 37 | phy-mode = "rmii"; |
| 38 | pinctrl-names = "default"; |
| 39 | pinctrl-0 = <&pinctrl_fec1>; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | &L2 { |
| 43 | arm,data-latency = <2 1 2>; |
| 44 | arm,tag-latency = <3 2 3>; |
| 45 | }; |
| 46 | |
Bhuvanchandra DV | 9c42fa1 | 2014-09-22 15:38:11 +0530 | [diff] [blame^] | 47 | &pwm0 { |
| 48 | pinctrl-names = "default"; |
| 49 | pinctrl-0 = <&pinctrl_pwm0>; |
| 50 | }; |
| 51 | |
| 52 | &pwm1 { |
| 53 | pinctrl-names = "default"; |
| 54 | pinctrl-0 = <&pinctrl_pwm1>; |
| 55 | }; |
| 56 | |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 57 | &uart0 { |
| 58 | pinctrl-names = "default"; |
| 59 | pinctrl-0 = <&pinctrl_uart0>; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | &uart1 { |
| 63 | pinctrl-names = "default"; |
| 64 | pinctrl-0 = <&pinctrl_uart1>; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 65 | }; |
| 66 | |
| 67 | &uart2 { |
| 68 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&pinctrl_uart2>; |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 70 | }; |
| 71 | |
Stefan Agner | 0500953 | 2014-08-18 22:07:16 +0200 | [diff] [blame] | 72 | &usbdev0 { |
| 73 | disable-over-current; |
| 74 | status = "okay"; |
| 75 | }; |
| 76 | |
| 77 | &usbh1 { |
| 78 | disable-over-current; |
| 79 | status = "okay"; |
| 80 | }; |
| 81 | |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 82 | &iomuxc { |
| 83 | vf610-colibri { |
| 84 | pinctrl_esdhc1: esdhc1grp { |
Stefan Agner | 10f34a1 | 2014-07-18 16:25:18 +0200 | [diff] [blame] | 85 | fsl,pins = < |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 86 | VF610_PAD_PTA24__ESDHC1_CLK 0x31ef |
| 87 | VF610_PAD_PTA25__ESDHC1_CMD 0x31ef |
| 88 | VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef |
| 89 | VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef |
| 90 | VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef |
| 91 | VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef |
| 92 | VF610_PAD_PTB20__GPIO_42 0x219d |
| 93 | >; |
| 94 | }; |
| 95 | |
| 96 | pinctrl_fec1: fec1grp { |
| 97 | fsl,pins = < |
| 98 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
| 99 | VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 |
| 100 | VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |
| 101 | VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1 |
| 102 | VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 |
| 103 | VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 |
| 104 | VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 |
| 105 | VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 |
| 106 | VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 |
| 107 | >; |
| 108 | }; |
| 109 | |
Bhuvanchandra DV | 9c42fa1 | 2014-09-22 15:38:11 +0530 | [diff] [blame^] | 110 | pinctrl_pwm0: pwm0grp { |
| 111 | fsl,pins = < |
| 112 | VF610_PAD_PTB0__FTM0_CH0 0x1182 |
| 113 | VF610_PAD_PTB1__FTM0_CH1 0x1182 |
| 114 | >; |
| 115 | }; |
| 116 | |
| 117 | pinctrl_pwm1: pwm1grp { |
| 118 | fsl,pins = < |
| 119 | VF610_PAD_PTB8__FTM1_CH0 0x1182 |
| 120 | VF610_PAD_PTB9__FTM1_CH1 0x1182 |
| 121 | >; |
| 122 | }; |
| 123 | |
Stefan Agner | 99db398 | 2014-04-03 17:47:10 +0200 | [diff] [blame] | 124 | pinctrl_uart0: uart0grp { |
| 125 | fsl,pins = < |
| 126 | VF610_PAD_PTB10__UART0_TX 0x21a2 |
| 127 | VF610_PAD_PTB11__UART0_RX 0x21a1 |
| 128 | >; |
| 129 | }; |
| 130 | |
| 131 | pinctrl_uart1: uart1grp { |
| 132 | fsl,pins = < |
| 133 | VF610_PAD_PTB4__UART1_TX 0x21a2 |
| 134 | VF610_PAD_PTB5__UART1_RX 0x21a1 |
| 135 | >; |
| 136 | }; |
| 137 | |
| 138 | pinctrl_uart2: uart2grp { |
| 139 | fsl,pins = < |
| 140 | VF610_PAD_PTD0__UART2_TX 0x21a2 |
| 141 | VF610_PAD_PTD1__UART2_RX 0x21a1 |
| 142 | VF610_PAD_PTD2__UART2_RTS 0x21a2 |
| 143 | VF610_PAD_PTD3__UART2_CTS 0x21a1 |
| 144 | >; |
| 145 | }; |
| 146 | }; |
| 147 | }; |