blob: 6b46edfba811f8f138bfbc2b6940ee11863ee560 [file] [log] [blame]
Jack Lee9c6712c2007-02-07 18:19:09 +01001#include <linux/kernel.h>
2#include <linux/types.h>
3#include <linux/module.h>
4#include <linux/pci.h>
5#include <linux/delay.h>
6#include <linux/hdreg.h>
7#include <linux/ide.h>
8#include <linux/init.h>
9
10#include <asm/io.h>
11
12/*
13 * it8213_ratemask - Compute available modes
14 * @drive: IDE drive
15 *
16 * Compute the available speeds for the devices on the interface. This
17 * is all modes to ATA100 clipped by drive cable setup.
18 */
19
20static u8 it8213_ratemask (ide_drive_t *drive)
21{
22 u8 mode = 4;
23 if (!eighty_ninty_three(drive))
24 mode = min(mode, (u8)1);
25 return mode;
26}
27
28/**
29 * it8213_dma_2_pio - return the PIO mode matching DMA
30 * @xfer_rate: transfer speed
31 *
32 * Returns the nearest equivalent PIO timing for the PIO or DMA
33 * mode requested by the controller.
34 */
35
36static u8 it8213_dma_2_pio (u8 xfer_rate) {
37 switch(xfer_rate) {
38 case XFER_UDMA_6:
39 case XFER_UDMA_5:
40 case XFER_UDMA_4:
41 case XFER_UDMA_3:
42 case XFER_UDMA_2:
43 case XFER_UDMA_1:
44 case XFER_UDMA_0:
45 case XFER_MW_DMA_2:
46 case XFER_PIO_4:
47 return 4;
48 case XFER_MW_DMA_1:
49 case XFER_PIO_3:
50 return 3;
51 case XFER_SW_DMA_2:
52 case XFER_PIO_2:
53 return 2;
54 case XFER_MW_DMA_0:
55 case XFER_SW_DMA_1:
56 case XFER_SW_DMA_0:
57 case XFER_PIO_1:
58 case XFER_PIO_0:
59 case XFER_PIO_SLOW:
60 default:
61 return 0;
62 }
63}
64
65static spinlock_t tune_lock = SPIN_LOCK_UNLOCKED;
66
67/*
68 * it8213_tuneproc - tune a drive
69 * @drive: drive to tune
70 * @mode_wanted: the target operating mode
71 *
72 * Load the timing settings for this device mode into the
73 * controller. By the time we are called the mode has been
74 * modified as neccessary to handle the absence of seperate
75 * master/slave timers for MWDMA/PIO.
76 *
77 * This code is only used in pass through mode.
78 */
79
80static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
81{
82 ide_hwif_t *hwif = HWIF(drive);
83 struct pci_dev *dev = hwif->pci_dev;
84 int is_slave = (&hwif->drives[1] == drive);
85 int master_port = 0x40;
86 int slave_port = 0x44;
87 unsigned long flags;
88 u16 master_data;
89 u8 slave_data;
90
91 u8 timings[][2] = { { 0, 0 },
92 { 0, 0 },
93 { 1, 0 },
94 { 2, 1 },
95 { 2, 3 }, };
96
97 pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
98
99 spin_lock_irqsave(&tune_lock, flags);
100 pci_read_config_word(dev, master_port, &master_data);
101 if (is_slave) {
102 master_data = master_data | 0x4000;
103 if (pio > 1)
104
105 master_data = master_data | 0x0070;
106 pci_read_config_byte(dev, slave_port, &slave_data);
107 slave_data = slave_data & 0xf0;
108 slave_data = slave_data | (((timings[pio][0] << 2) | (timings[pio][1]) << 0));
109 } else {
110 master_data = master_data & 0xccf8;
111 if (pio > 1)
112
113 master_data = master_data | 0x0007;
114 master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
115 }
116 pci_write_config_word(dev, master_port, master_data);
117 if (is_slave)
118 pci_write_config_byte(dev, slave_port, slave_data);
119 spin_unlock_irqrestore(&tune_lock, flags);
120}
121
122
123/**
124 * it8213_tune_chipset - set controller timings
125 * @drive: Drive to set up
126 * @xferspeed: speed we want to achieve
127 *
128 * Tune the ITE chipset for the desired mode. If we can't achieve
129 * the desired mode then tune for a lower one, but ultimately
130 * make the thing work.
131 */
132
133static int it8213_tune_chipset (ide_drive_t *drive, byte xferspeed)
134{
135
136 ide_hwif_t *hwif = HWIF(drive);
137 struct pci_dev *dev = hwif->pci_dev;
138 u8 maslave = 0x40;
139 u8 speed = ide_rate_filter(it8213_ratemask(drive), xferspeed);
140 int a_speed = 3 << (drive->dn * 4);
141 int u_flag = 1 << drive->dn;
142 int v_flag = 0x01 << drive->dn;
143 int w_flag = 0x10 << drive->dn;
144 int u_speed = 0;
145 u16 reg4042, reg4a;
146 u8 reg48, reg54, reg55;
147
148 pci_read_config_word(dev, maslave, &reg4042);
149 pci_read_config_byte(dev, 0x48, &reg48);
150 pci_read_config_word(dev, 0x4a, &reg4a);
151 pci_read_config_byte(dev, 0x54, &reg54);
152 pci_read_config_byte(dev, 0x55, &reg55);
153
154 switch(speed) {
155 case XFER_UDMA_6:
156 case XFER_UDMA_4:
157 case XFER_UDMA_2:u_speed = 2 << (drive->dn * 4); break;
158 case XFER_UDMA_5:
159 case XFER_UDMA_3:
160 case XFER_UDMA_1:u_speed = 1 << (drive->dn * 4); break;
161 case XFER_UDMA_0:u_speed = 0 << (drive->dn * 4); break;
162 break;
163 case XFER_MW_DMA_2:
164 case XFER_MW_DMA_1:
165 case XFER_MW_DMA_0:
166 break;
167 case XFER_PIO_4:
168 case XFER_PIO_3:
169 case XFER_PIO_2:
170 case XFER_PIO_1:
171 case XFER_PIO_0:
172 break;
173 default:
174 return -1;
175 }
176
177 if (speed >= XFER_UDMA_0)
178 {
179 if (!(reg48 & u_flag))
180 pci_write_config_byte(dev, 0x48, reg48 | u_flag);
181 if (speed >= XFER_UDMA_5) {
182 pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
183 } else {
184 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
185 }
186
187 if ((reg4a & a_speed) != u_speed)
188 pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
189 if (speed > XFER_UDMA_2)
190 {
191 if (!(reg54 & v_flag))
192 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
193 } else
194 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
195 } else /*if(speed >= XFER_UDMA_0)*/
196 {
197 if (reg48 & u_flag)
198 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
199 if (reg4a & a_speed)
200 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
201 if (reg54 & v_flag)
202 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
203 if (reg55 & w_flag)
204 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
205 }
206 it8213_tuneproc(drive, it8213_dma_2_pio(speed));
207 return ide_config_drive_speed(drive, speed);
208 }
209
210
211/*
212 * config_chipset_for_dma - configure for DMA
213 * @drive: drive to configure
214 *
215 * Called by the IDE layer when it wants the timings set up.
216 */
217
218static int config_chipset_for_dma (ide_drive_t *drive)
219{
220 u8 speed = ide_dma_speed(drive, it8213_ratemask(drive));
221 if (!speed)
222 {
223 u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
224 speed = it8213_dma_2_pio(XFER_PIO_0 + tspeed);
225 }
226// config_it8213_chipset_for_pio(drive, !speed);
227 it8213_tune_chipset(drive, speed);
228 return ide_dma_enable(drive);
229}
230
231/**
232 * config_it8213_chipset_for_pio - set drive timings
233 * @drive: drive to tune
234 * @speed we want
235 *
236 * Compute the best pio mode we can for a given device. We must
237 * pick a speed that does not cause problems with the other device
238 * on the cable.
239 */
240/*
241static void config_it8213_chipset_for_pio (ide_drive_t *drive, byte set_speed)
242{
243 ide_hwif_t *hwif = HWIF(drive);
244// u8 unit = drive->select.b.unit;
245 ide_hwif_t *hwif = drive->hwif;
246 ide_drive_t *pair = &hwif->drives[1-unit];
247 u8 speed = 0, set_pio = ide_get_best_pio_mode(drive, 255, 5, NULL);
248 u8 pair_pio;
249
250 if(pair != NULL) {
251 pair_pio = ide_get_best_pio_mode(pair, 255, 5, NULL);
252 if(pair_pio < set_pio)
253 set_pio = pair_pio;
254 }
255 it8213_tuneproc(drive, set_pio);
256 speed = XFER_PIO_0 + set_pio;
257 if (set_speed)
258 (void) ide_config_drive_speed(drive, speed);
259}
260*/
261/**
262 * it8213_configure_drive_for_dma - set up for DMA transfers
263 * @drive: drive we are going to set up
264 *
265 * Set up the drive for DMA, tune the controller and drive as
266 * required. If the drive isn't suitable for DMA or we hit
267 * other problems then we will drop down to PIO and set up
268 * PIO appropriately
269 */
270
271static int it8213_config_drive_for_dma (ide_drive_t *drive)
272{
273// ide_hwif_t *hwif = drive->hwif;
274// struct hd_driveid *id = drive->id;
275 ide_hwif_t *hwif = HWIF(drive);
276 if (ide_use_dma(drive)) {
277 if (config_chipset_for_dma(drive))
278 return hwif->ide_dma_on(drive);
279 }
280// config_it8213_chipset_for_pio(drive, 1);
281 hwif->tuneproc(drive, 255);
282 return hwif->ide_dma_off_quietly(drive);
283}
284
285
286static unsigned int __devinit init_chipset_it8213(struct pci_dev *dev, const char *name)
287{
288 printk(KERN_INFO "it8213: controller in IDE mode.\n");
289 return 0;
290}
291
292
293/**
294 * init_hwif_it8213 - set up hwif structs
295 * @hwif: interface to set up
296 *
297 * We do the basic set up of the interface structure. The IT8212
298 * requires several custom handlers so we override the default
299 * ide DMA handlers appropriately
300 */
301
302static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
303{
304 u8 reg42h = 0, ata66 = 0;
305 u8 mask = 0x02;
306
307 hwif->atapi_dma = 1;
308
309 hwif->speedproc = &it8213_tune_chipset;
310 hwif->tuneproc = &it8213_tuneproc;
311
312 hwif->autodma = 0;
313
314 hwif->drives[0].autotune = 1;
315 hwif->drives[1].autotune = 1;
316
317 if (!hwif->dma_base)
318 goto fallback;
319 hwif->atapi_dma = 1;
320 hwif->ultra_mask = 0x7f;
321 hwif->mwdma_mask = 0x07;
322 hwif->swdma_mask = 0x07;
323
324 pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
325 ata66 = (reg42h & mask) ? 0 : 1;
326
327 hwif->ide_dma_check = &it8213_config_drive_for_dma;
328 if (!(hwif->udma_four))
329 hwif->udma_four = ata66;
330// hwif->udma_four = 0;
331
332 /*
333 * The BIOS often doesn't set up DMA on this controller
334 * so we always do it.
335 */
336 if (!noautodma)
337 hwif->autodma = 1;
338
339 hwif->drives[0].autodma = hwif->autodma;
340 hwif->drives[1].autodma = hwif->autodma;
341 return;
342fallback:
343 hwif->autodma = 0;
344 return;
345}
346
347
348#define DECLARE_ITE_DEV(name_str) \
349 { \
350 .name = name_str, \
351 .init_chipset = init_chipset_it8213, \
352 .init_hwif = init_hwif_it8213, \
353 .channels = 1, \
354 .autodma = AUTODMA, \
355 .enablebits = {{0x41,0x80,0x80}}, \
356 .bootable = ON_BOARD, \
357 }
358
359static ide_pci_device_t it8213_chipsets[] __devinitdata = {
360 /* 0 */ DECLARE_ITE_DEV("IT8213"),
361};
362
363
364/**
365 * it8213_init_one - pci layer discovery entry
366 * @dev: PCI device
367 * @id: ident table entry
368 *
369 * Called by the PCI code when it finds an ITE8213 controller. As
370 * this device follows the standard interfaces we can use the
371 * standard helper functions to do almost all the work for us.
372 */
373
374static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
375{
376 ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
377 return 0;
378}
379
380
381static struct pci_device_id it8213_pci_tbl[] = {
382 { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
383 { 0, },
384};
385
386MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
387
388static struct pci_driver driver = {
389 .name = "ITE8213_IDE",
390 .id_table = it8213_pci_tbl,
391 .probe = it8213_init_one,
392};
393
394static int __init it8213_ide_init(void)
395{
396 return ide_pci_register_driver(&driver); }
397
398module_init(it8213_ide_init);
399
400MODULE_AUTHOR("Jack and Alan Cox"); /* Update this */
401MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
402MODULE_LICENSE("GPL");