blob: b7a4aa8476fb48b095819276b4e6732fe7e83ac4 [file] [log] [blame]
Roland Dreier225c7b12007-05-08 18:00:38 -07001/*
2 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
3 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/init.h>
35#include <linux/errno.h>
Al Viro9cbe05c2007-05-15 20:36:30 +010036#include <linux/mm.h>
Roland Dreier225c7b12007-05-08 18:00:38 -070037
38#include <linux/mlx4/cmd.h>
39
40#include "mlx4.h"
41#include "icm.h"
42#include "fw.h"
43
44/*
45 * We allocate in as big chunks as we can, up to a maximum of 256 KB
46 * per chunk.
47 */
48enum {
49 MLX4_ICM_ALLOC_SIZE = 1 << 18,
50 MLX4_TABLE_CHUNK_SIZE = 1 << 18
51};
52
53void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm)
54{
55 struct mlx4_icm_chunk *chunk, *tmp;
56 int i;
57
58 list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
59 if (chunk->nsg > 0)
60 pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
61 PCI_DMA_BIDIRECTIONAL);
62
63 for (i = 0; i < chunk->npages; ++i)
64 __free_pages(chunk->mem[i].page,
65 get_order(chunk->mem[i].length));
66
67 kfree(chunk);
68 }
69
70 kfree(icm);
71}
72
73struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
74 gfp_t gfp_mask)
75{
76 struct mlx4_icm *icm;
77 struct mlx4_icm_chunk *chunk = NULL;
78 int cur_order;
79
80 icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
81 if (!icm)
82 return icm;
83
84 icm->refcount = 0;
85 INIT_LIST_HEAD(&icm->chunk_list);
86
87 cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
88
89 while (npages > 0) {
90 if (!chunk) {
91 chunk = kmalloc(sizeof *chunk,
92 gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
93 if (!chunk)
94 goto fail;
95
96 chunk->npages = 0;
97 chunk->nsg = 0;
98 list_add_tail(&chunk->list, &icm->chunk_list);
99 }
100
101 while (1 << cur_order > npages)
102 --cur_order;
103
104 chunk->mem[chunk->npages].page = alloc_pages(gfp_mask, cur_order);
105 if (chunk->mem[chunk->npages].page) {
106 chunk->mem[chunk->npages].length = PAGE_SIZE << cur_order;
107 chunk->mem[chunk->npages].offset = 0;
108
109 if (++chunk->npages == MLX4_ICM_CHUNK_LEN) {
110 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
111 chunk->npages,
112 PCI_DMA_BIDIRECTIONAL);
113
114 if (chunk->nsg <= 0)
115 goto fail;
116
117 chunk = NULL;
118 }
119
120 npages -= 1 << cur_order;
121 } else {
122 --cur_order;
123 if (cur_order < 0)
124 goto fail;
125 }
126 }
127
128 if (chunk) {
129 chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
130 chunk->npages,
131 PCI_DMA_BIDIRECTIONAL);
132
133 if (chunk->nsg <= 0)
134 goto fail;
135 }
136
137 return icm;
138
139fail:
140 mlx4_free_icm(dev, icm);
141 return NULL;
142}
143
144static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
145{
146 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
147}
148
149int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
150{
151 return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
152 MLX4_CMD_TIME_CLASS_B);
153}
154
155int mlx4_MAP_ICM_page(struct mlx4_dev *dev, u64 dma_addr, u64 virt)
156{
157 struct mlx4_cmd_mailbox *mailbox;
158 __be64 *inbox;
159 int err;
160
161 mailbox = mlx4_alloc_cmd_mailbox(dev);
162 if (IS_ERR(mailbox))
163 return PTR_ERR(mailbox);
164 inbox = mailbox->buf;
165
166 inbox[0] = cpu_to_be64(virt);
167 inbox[1] = cpu_to_be64(dma_addr);
168
169 err = mlx4_cmd(dev, mailbox->dma, 1, 0, MLX4_CMD_MAP_ICM,
170 MLX4_CMD_TIME_CLASS_B);
171
172 mlx4_free_cmd_mailbox(dev, mailbox);
173
174 if (!err)
175 mlx4_dbg(dev, "Mapped page at %llx to %llx for ICM.\n",
176 (unsigned long long) dma_addr, (unsigned long long) virt);
177
178 return err;
179}
180
181int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
182{
183 return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
184}
185
186int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
187{
188 return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX, MLX4_CMD_TIME_CLASS_B);
189}
190
191int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj)
192{
193 int i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
194 int ret = 0;
195
196 mutex_lock(&table->mutex);
197
198 if (table->icm[i]) {
199 ++table->icm[i]->refcount;
200 goto out;
201 }
202
203 table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
204 (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
205 __GFP_NOWARN);
206 if (!table->icm[i]) {
207 ret = -ENOMEM;
208 goto out;
209 }
210
211 if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
212 (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
213 mlx4_free_icm(dev, table->icm[i]);
214 table->icm[i] = NULL;
215 ret = -ENOMEM;
216 goto out;
217 }
218
219 ++table->icm[i]->refcount;
220
221out:
222 mutex_unlock(&table->mutex);
223 return ret;
224}
225
226void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj)
227{
228 int i;
229
230 i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
231
232 mutex_lock(&table->mutex);
233
234 if (--table->icm[i]->refcount == 0) {
235 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
236 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
237 mlx4_free_icm(dev, table->icm[i]);
238 table->icm[i] = NULL;
239 }
240
241 mutex_unlock(&table->mutex);
242}
243
244void *mlx4_table_find(struct mlx4_icm_table *table, int obj)
245{
246 int idx, offset, i;
247 struct mlx4_icm_chunk *chunk;
248 struct mlx4_icm *icm;
249 struct page *page = NULL;
250
251 if (!table->lowmem)
252 return NULL;
253
254 mutex_lock(&table->mutex);
255
256 idx = obj & (table->num_obj - 1);
257 icm = table->icm[idx / (MLX4_TABLE_CHUNK_SIZE / table->obj_size)];
258 offset = idx % (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
259
260 if (!icm)
261 goto out;
262
263 list_for_each_entry(chunk, &icm->chunk_list, list) {
264 for (i = 0; i < chunk->npages; ++i) {
265 if (chunk->mem[i].length > offset) {
266 page = chunk->mem[i].page;
267 goto out;
268 }
269 offset -= chunk->mem[i].length;
270 }
271 }
272
273out:
274 mutex_unlock(&table->mutex);
275 return page ? lowmem_page_address(page) + offset : NULL;
276}
277
278int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
279 int start, int end)
280{
281 int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
282 int i, err;
283
284 for (i = start; i <= end; i += inc) {
285 err = mlx4_table_get(dev, table, i);
286 if (err)
287 goto fail;
288 }
289
290 return 0;
291
292fail:
293 while (i > start) {
294 i -= inc;
295 mlx4_table_put(dev, table, i);
296 }
297
298 return err;
299}
300
301void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
302 int start, int end)
303{
304 int i;
305
306 for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
307 mlx4_table_put(dev, table, i);
308}
309
310int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
311 u64 virt, int obj_size, int nobj, int reserved,
312 int use_lowmem)
313{
314 int obj_per_chunk;
315 int num_icm;
316 unsigned chunk_size;
317 int i;
318
319 obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
320 num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
321
322 table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
323 if (!table->icm)
324 return -ENOMEM;
325 table->virt = virt;
326 table->num_icm = num_icm;
327 table->num_obj = nobj;
328 table->obj_size = obj_size;
329 table->lowmem = use_lowmem;
330 mutex_init(&table->mutex);
331
332 for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
333 chunk_size = MLX4_TABLE_CHUNK_SIZE;
334 if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > nobj * obj_size)
335 chunk_size = PAGE_ALIGN(nobj * obj_size - i * MLX4_TABLE_CHUNK_SIZE);
336
337 table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
338 (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
339 __GFP_NOWARN);
340 if (!table->icm[i])
341 goto err;
342 if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
343 mlx4_free_icm(dev, table->icm[i]);
344 table->icm[i] = NULL;
345 goto err;
346 }
347
348 /*
349 * Add a reference to this ICM chunk so that it never
350 * gets freed (since it contains reserved firmware objects).
351 */
352 ++table->icm[i]->refcount;
353 }
354
355 return 0;
356
357err:
358 for (i = 0; i < num_icm; ++i)
359 if (table->icm[i]) {
360 mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
361 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
362 mlx4_free_icm(dev, table->icm[i]);
363 }
364
365 return -ENOMEM;
366}
367
368void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
369{
370 int i;
371
372 for (i = 0; i < table->num_icm; ++i)
373 if (table->icm[i]) {
374 mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
375 MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
376 mlx4_free_icm(dev, table->icm[i]);
377 }
378
379 kfree(table->icm);
380}