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Russell King05c45ca2005-09-11 10:26:31 +01001/*
2 * linux/drivers/mfd/ucb1x00.h
3 *
4 * Copyright (C) 2001 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
9 */
10#ifndef UCB1200_H
11#define UCB1200_H
12
13#define UCB_IO_DATA 0x00
14#define UCB_IO_DIR 0x01
15
16#define UCB_IO_0 (1 << 0)
17#define UCB_IO_1 (1 << 1)
18#define UCB_IO_2 (1 << 2)
19#define UCB_IO_3 (1 << 3)
20#define UCB_IO_4 (1 << 4)
21#define UCB_IO_5 (1 << 5)
22#define UCB_IO_6 (1 << 6)
23#define UCB_IO_7 (1 << 7)
24#define UCB_IO_8 (1 << 8)
25#define UCB_IO_9 (1 << 9)
26
27#define UCB_IE_RIS 0x02
28#define UCB_IE_FAL 0x03
29#define UCB_IE_STATUS 0x04
30#define UCB_IE_CLEAR 0x04
31#define UCB_IE_ADC (1 << 11)
32#define UCB_IE_TSPX (1 << 12)
33#define UCB_IE_TSMX (1 << 13)
34#define UCB_IE_TCLIP (1 << 14)
35#define UCB_IE_ACLIP (1 << 15)
36
37#define UCB_IRQ_TSPX 12
38
39#define UCB_TC_A 0x05
40#define UCB_TC_A_LOOP (1 << 7) /* UCB1200 */
41#define UCB_TC_A_AMPL (1 << 7) /* UCB1300 */
42
43#define UCB_TC_B 0x06
44#define UCB_TC_B_VOICE_ENA (1 << 3)
45#define UCB_TC_B_CLIP (1 << 4)
46#define UCB_TC_B_ATT (1 << 6)
47#define UCB_TC_B_SIDE_ENA (1 << 11)
48#define UCB_TC_B_MUTE (1 << 13)
49#define UCB_TC_B_IN_ENA (1 << 14)
50#define UCB_TC_B_OUT_ENA (1 << 15)
51
52#define UCB_AC_A 0x07
53#define UCB_AC_B 0x08
54#define UCB_AC_B_LOOP (1 << 8)
55#define UCB_AC_B_MUTE (1 << 13)
56#define UCB_AC_B_IN_ENA (1 << 14)
57#define UCB_AC_B_OUT_ENA (1 << 15)
58
59#define UCB_TS_CR 0x09
60#define UCB_TS_CR_TSMX_POW (1 << 0)
61#define UCB_TS_CR_TSPX_POW (1 << 1)
62#define UCB_TS_CR_TSMY_POW (1 << 2)
63#define UCB_TS_CR_TSPY_POW (1 << 3)
64#define UCB_TS_CR_TSMX_GND (1 << 4)
65#define UCB_TS_CR_TSPX_GND (1 << 5)
66#define UCB_TS_CR_TSMY_GND (1 << 6)
67#define UCB_TS_CR_TSPY_GND (1 << 7)
68#define UCB_TS_CR_MODE_INT (0 << 8)
69#define UCB_TS_CR_MODE_PRES (1 << 8)
70#define UCB_TS_CR_MODE_POS (2 << 8)
71#define UCB_TS_CR_BIAS_ENA (1 << 11)
72#define UCB_TS_CR_TSPX_LOW (1 << 12)
73#define UCB_TS_CR_TSMX_LOW (1 << 13)
74
75#define UCB_ADC_CR 0x0a
76#define UCB_ADC_SYNC_ENA (1 << 0)
77#define UCB_ADC_VREFBYP_CON (1 << 1)
78#define UCB_ADC_INP_TSPX (0 << 2)
79#define UCB_ADC_INP_TSMX (1 << 2)
80#define UCB_ADC_INP_TSPY (2 << 2)
81#define UCB_ADC_INP_TSMY (3 << 2)
82#define UCB_ADC_INP_AD0 (4 << 2)
83#define UCB_ADC_INP_AD1 (5 << 2)
84#define UCB_ADC_INP_AD2 (6 << 2)
85#define UCB_ADC_INP_AD3 (7 << 2)
86#define UCB_ADC_EXT_REF (1 << 5)
87#define UCB_ADC_START (1 << 7)
88#define UCB_ADC_ENA (1 << 15)
89
90#define UCB_ADC_DATA 0x0b
91#define UCB_ADC_DAT_VAL (1 << 15)
92#define UCB_ADC_DAT(x) (((x) & 0x7fe0) >> 5)
93
94#define UCB_ID 0x0c
95#define UCB_ID_1200 0x1004
96#define UCB_ID_1300 0x1005
97
98#define UCB_MODE 0x0d
99#define UCB_MODE_DYN_VFLAG_ENA (1 << 12)
100#define UCB_MODE_AUD_OFF_CAN (1 << 13)
101
102#include "mcp.h"
103
104struct ucb1x00_irq {
105 void *devid;
106 void (*fn)(int, void *);
107};
108
Russell King05c45ca2005-09-11 10:26:31 +0100109struct ucb1x00 {
110 spinlock_t lock;
111 struct mcp *mcp;
112 unsigned int irq;
113 struct semaphore adc_sem;
114 spinlock_t io_lock;
115 u16 id;
116 u16 io_dir;
117 u16 io_out;
118 u16 adc_cr;
119 u16 irq_fal_enbl;
120 u16 irq_ris_enbl;
121 struct ucb1x00_irq irq_handler[16];
122 struct class_device cdev;
123 struct list_head node;
124 struct list_head devs;
125};
126
127struct ucb1x00_driver;
128
129struct ucb1x00_dev {
130 struct list_head dev_node;
131 struct list_head drv_node;
132 struct ucb1x00 *ucb;
133 struct ucb1x00_driver *drv;
134 void *priv;
135};
136
137struct ucb1x00_driver {
138 struct list_head node;
139 struct list_head devs;
140 int (*add)(struct ucb1x00_dev *dev);
141 void (*remove)(struct ucb1x00_dev *dev);
142 int (*suspend)(struct ucb1x00_dev *dev, pm_message_t state);
143 int (*resume)(struct ucb1x00_dev *dev);
144};
145
146#define classdev_to_ucb1x00(cd) container_of(cd, struct ucb1x00, cdev)
147
148int ucb1x00_register_driver(struct ucb1x00_driver *);
149void ucb1x00_unregister_driver(struct ucb1x00_driver *);
150
151/**
152 * ucb1x00_clkrate - return the UCB1x00 SIB clock rate
153 * @ucb: UCB1x00 structure describing chip
154 *
155 * Return the SIB clock rate in Hz.
156 */
157static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb)
158{
159 return mcp_get_sclk_rate(ucb->mcp);
160}
161
162/**
163 * ucb1x00_enable - enable the UCB1x00 SIB clock
164 * @ucb: UCB1x00 structure describing chip
165 *
166 * Enable the SIB clock. This can be called multiple times.
167 */
168static inline void ucb1x00_enable(struct ucb1x00 *ucb)
169{
170 mcp_enable(ucb->mcp);
171}
172
173/**
174 * ucb1x00_disable - disable the UCB1x00 SIB clock
175 * @ucb: UCB1x00 structure describing chip
176 *
177 * Disable the SIB clock. The SIB clock will only be disabled
178 * when the number of ucb1x00_enable calls match the number of
179 * ucb1x00_disable calls.
180 */
181static inline void ucb1x00_disable(struct ucb1x00 *ucb)
182{
183 mcp_disable(ucb->mcp);
184}
185
186/**
187 * ucb1x00_reg_write - write a UCB1x00 register
188 * @ucb: UCB1x00 structure describing chip
189 * @reg: UCB1x00 4-bit register index to write
190 * @val: UCB1x00 16-bit value to write
191 *
192 * Write the UCB1x00 register @reg with value @val. The SIB
193 * clock must be running for this function to return.
194 */
195static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val)
196{
197 mcp_reg_write(ucb->mcp, reg, val);
198}
199
200/**
201 * ucb1x00_reg_read - read a UCB1x00 register
202 * @ucb: UCB1x00 structure describing chip
203 * @reg: UCB1x00 4-bit register index to write
204 *
205 * Read the UCB1x00 register @reg and return its value. The SIB
206 * clock must be running for this function to return.
207 */
208static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg)
209{
210 return mcp_reg_read(ucb->mcp, reg);
211}
212/**
213 * ucb1x00_set_audio_divisor -
214 * @ucb: UCB1x00 structure describing chip
215 * @div: SIB clock divisor
216 */
217static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div)
218{
219 mcp_set_audio_divisor(ucb->mcp, div);
220}
221
222/**
223 * ucb1x00_set_telecom_divisor -
224 * @ucb: UCB1x00 structure describing chip
225 * @div: SIB clock divisor
226 */
227static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div)
228{
229 mcp_set_telecom_divisor(ucb->mcp, div);
230}
231
232void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int);
233void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int);
234unsigned int ucb1x00_io_read(struct ucb1x00 *ucb);
235
236#define UCB_NOSYNC (0)
237#define UCB_SYNC (1)
238
239unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync);
240void ucb1x00_adc_enable(struct ucb1x00 *ucb);
241void ucb1x00_adc_disable(struct ucb1x00 *ucb);
242
243/*
244 * Which edges of the IRQ do you want to control today?
245 */
246#define UCB_RISING (1 << 0)
247#define UCB_FALLING (1 << 1)
248
249int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid);
250void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
251void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
252int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid);
253
254#endif