Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> |
| 16 | * |
| 17 | * Derived from book3s_interrupts.S, which is: |
| 18 | * Copyright SUSE Linux Products GmbH 2009 |
| 19 | * |
| 20 | * Authors: Alexander Graf <agraf@suse.de> |
| 21 | */ |
| 22 | |
| 23 | #include <asm/ppc_asm.h> |
| 24 | #include <asm/kvm_asm.h> |
| 25 | #include <asm/reg.h> |
| 26 | #include <asm/page.h> |
| 27 | #include <asm/asm-offsets.h> |
| 28 | #include <asm/exception-64s.h> |
| 29 | #include <asm/ppc-opcode.h> |
| 30 | |
| 31 | /***************************************************************************** |
| 32 | * * |
| 33 | * Guest entry / exit code that is in kernel module memory (vmalloc) * |
| 34 | * * |
| 35 | ****************************************************************************/ |
| 36 | |
| 37 | /* Registers: |
| 38 | * r4: vcpu pointer |
| 39 | */ |
| 40 | _GLOBAL(__kvmppc_vcore_entry) |
| 41 | |
| 42 | /* Write correct stack frame */ |
| 43 | mflr r0 |
| 44 | std r0,PPC_LR_STKOFF(r1) |
| 45 | |
| 46 | /* Save host state to the stack */ |
| 47 | stdu r1, -SWITCH_FRAME_SIZE(r1) |
| 48 | |
| 49 | /* Save non-volatile registers (r14 - r31) */ |
| 50 | SAVE_NVGPRS(r1) |
| 51 | |
| 52 | /* Save host DSCR */ |
Paul Mackerras | 9e368f2 | 2011-06-29 00:40:08 +0000 | [diff] [blame^] | 53 | BEGIN_FTR_SECTION |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 54 | mfspr r3, SPRN_DSCR |
| 55 | std r3, HSTATE_DSCR(r13) |
Paul Mackerras | 9e368f2 | 2011-06-29 00:40:08 +0000 | [diff] [blame^] | 56 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206) |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 57 | |
| 58 | /* Save host DABR */ |
| 59 | mfspr r3, SPRN_DABR |
| 60 | std r3, HSTATE_DABR(r13) |
| 61 | |
| 62 | /* Hard-disable interrupts */ |
| 63 | mfmsr r10 |
| 64 | std r10, HSTATE_HOST_MSR(r13) |
| 65 | rldicl r10,r10,48,1 |
| 66 | rotldi r10,r10,16 |
| 67 | mtmsrd r10,1 |
| 68 | |
| 69 | /* Save host PMU registers and load guest PMU registers */ |
| 70 | /* R4 is live here (vcpu pointer) but not r3 or r5 */ |
| 71 | li r3, 1 |
| 72 | sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */ |
| 73 | mfspr r7, SPRN_MMCR0 /* save MMCR0 */ |
| 74 | mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */ |
| 75 | isync |
| 76 | ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */ |
| 77 | lbz r5, LPPACA_PMCINUSE(r3) |
| 78 | cmpwi r5, 0 |
| 79 | beq 31f /* skip if not */ |
| 80 | mfspr r5, SPRN_MMCR1 |
| 81 | mfspr r6, SPRN_MMCRA |
| 82 | std r7, HSTATE_MMCR(r13) |
| 83 | std r5, HSTATE_MMCR + 8(r13) |
| 84 | std r6, HSTATE_MMCR + 16(r13) |
| 85 | mfspr r3, SPRN_PMC1 |
| 86 | mfspr r5, SPRN_PMC2 |
| 87 | mfspr r6, SPRN_PMC3 |
| 88 | mfspr r7, SPRN_PMC4 |
| 89 | mfspr r8, SPRN_PMC5 |
| 90 | mfspr r9, SPRN_PMC6 |
Paul Mackerras | 9e368f2 | 2011-06-29 00:40:08 +0000 | [diff] [blame^] | 91 | BEGIN_FTR_SECTION |
| 92 | mfspr r10, SPRN_PMC7 |
| 93 | mfspr r11, SPRN_PMC8 |
| 94 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 95 | stw r3, HSTATE_PMC(r13) |
| 96 | stw r5, HSTATE_PMC + 4(r13) |
| 97 | stw r6, HSTATE_PMC + 8(r13) |
| 98 | stw r7, HSTATE_PMC + 12(r13) |
| 99 | stw r8, HSTATE_PMC + 16(r13) |
| 100 | stw r9, HSTATE_PMC + 20(r13) |
Paul Mackerras | 9e368f2 | 2011-06-29 00:40:08 +0000 | [diff] [blame^] | 101 | BEGIN_FTR_SECTION |
| 102 | stw r10, HSTATE_PMC + 24(r13) |
| 103 | stw r11, HSTATE_PMC + 28(r13) |
| 104 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 105 | 31: |
| 106 | |
| 107 | /* |
| 108 | * Put whatever is in the decrementer into the |
| 109 | * hypervisor decrementer. |
| 110 | */ |
| 111 | mfspr r8,SPRN_DEC |
| 112 | mftb r7 |
| 113 | mtspr SPRN_HDEC,r8 |
| 114 | extsw r8,r8 |
| 115 | add r8,r8,r7 |
| 116 | std r8,HSTATE_DECEXP(r13) |
| 117 | |
Paul Mackerras | 9e368f2 | 2011-06-29 00:40:08 +0000 | [diff] [blame^] | 118 | /* |
| 119 | * On PPC970, if the guest vcpu has an external interrupt pending, |
| 120 | * send ourselves an IPI so as to interrupt the guest once it |
| 121 | * enables interrupts. (It must have interrupts disabled, |
| 122 | * otherwise we would already have delivered the interrupt.) |
| 123 | */ |
| 124 | BEGIN_FTR_SECTION |
| 125 | ld r0, VCPU_PENDING_EXC(r4) |
| 126 | li r7, (1 << BOOK3S_IRQPRIO_EXTERNAL) |
| 127 | oris r7, r7, (1 << BOOK3S_IRQPRIO_EXTERNAL_LEVEL)@h |
| 128 | and. r0, r0, r7 |
| 129 | beq 32f |
| 130 | mr r31, r4 |
| 131 | lhz r3, PACAPACAINDEX(r13) |
| 132 | bl smp_send_reschedule |
| 133 | nop |
| 134 | mr r4, r31 |
| 135 | 32: |
| 136 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) |
| 137 | |
Paul Mackerras | de56a94 | 2011-06-29 00:21:34 +0000 | [diff] [blame] | 138 | /* Jump to partition switch code */ |
| 139 | bl .kvmppc_hv_entry_trampoline |
| 140 | nop |
| 141 | |
| 142 | /* |
| 143 | * We return here in virtual mode after the guest exits |
| 144 | * with something that we can't handle in real mode. |
| 145 | * Interrupts are enabled again at this point. |
| 146 | */ |
| 147 | |
| 148 | .global kvmppc_handler_highmem |
| 149 | kvmppc_handler_highmem: |
| 150 | |
| 151 | /* |
| 152 | * Register usage at this point: |
| 153 | * |
| 154 | * R1 = host R1 |
| 155 | * R2 = host R2 |
| 156 | * R12 = exit handler id |
| 157 | * R13 = PACA |
| 158 | */ |
| 159 | |
| 160 | /* Restore non-volatile host registers (r14 - r31) */ |
| 161 | REST_NVGPRS(r1) |
| 162 | |
| 163 | addi r1, r1, SWITCH_FRAME_SIZE |
| 164 | ld r0, PPC_LR_STKOFF(r1) |
| 165 | mtlr r0 |
| 166 | blr |