Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2007-2009 PetaLogix |
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/param.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/profile.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/sched.h> |
| 19 | #include <linux/spinlock.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/clk.h> |
| 22 | #include <linux/clocksource.h> |
| 23 | #include <linux/clockchips.h> |
| 24 | #include <linux/io.h> |
John Williams | 892ee92 | 2009-07-29 22:08:40 +1000 | [diff] [blame] | 25 | #include <linux/bug.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 26 | #include <asm/cpuinfo.h> |
| 27 | #include <asm/setup.h> |
| 28 | #include <asm/prom.h> |
| 29 | #include <asm/irq.h> |
Michal Simek | c8f7743 | 2010-06-10 16:04:05 +0200 | [diff] [blame] | 30 | #include <linux/cnt32_to_63.h> |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 31 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 32 | static unsigned int timer_baseaddr; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 33 | |
Michal Simek | 29e3dbb | 2011-02-07 11:33:47 +0100 | [diff] [blame] | 34 | static unsigned int freq_div_hz; |
| 35 | static unsigned int timer_clock_freq; |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 36 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 37 | #define TCSR0 (0x00) |
| 38 | #define TLR0 (0x04) |
| 39 | #define TCR0 (0x08) |
| 40 | #define TCSR1 (0x10) |
| 41 | #define TLR1 (0x14) |
| 42 | #define TCR1 (0x18) |
| 43 | |
| 44 | #define TCSR_MDT (1<<0) |
| 45 | #define TCSR_UDT (1<<1) |
| 46 | #define TCSR_GENT (1<<2) |
| 47 | #define TCSR_CAPT (1<<3) |
| 48 | #define TCSR_ARHT (1<<4) |
| 49 | #define TCSR_LOAD (1<<5) |
| 50 | #define TCSR_ENIT (1<<6) |
| 51 | #define TCSR_ENT (1<<7) |
| 52 | #define TCSR_TINT (1<<8) |
| 53 | #define TCSR_PWMA (1<<9) |
| 54 | #define TCSR_ENALL (1<<10) |
| 55 | |
| 56 | static inline void microblaze_timer0_stop(void) |
| 57 | { |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 58 | out_be32(timer_baseaddr + TCSR0, |
| 59 | in_be32(timer_baseaddr + TCSR0) & ~TCSR_ENT); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 60 | } |
| 61 | |
| 62 | static inline void microblaze_timer0_start_periodic(unsigned long load_val) |
| 63 | { |
| 64 | if (!load_val) |
| 65 | load_val = 1; |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 66 | /* loading value to timer reg */ |
| 67 | out_be32(timer_baseaddr + TLR0, load_val); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 68 | |
| 69 | /* load the initial value */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 70 | out_be32(timer_baseaddr + TCSR0, TCSR_LOAD); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 71 | |
| 72 | /* see timer data sheet for detail |
| 73 | * !ENALL - don't enable 'em all |
| 74 | * !PWMA - disable pwm |
| 75 | * TINT - clear interrupt status |
| 76 | * ENT- enable timer itself |
Michal Simek | f7f4786 | 2011-04-05 15:49:22 +0200 | [diff] [blame] | 77 | * ENIT - enable interrupt |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 78 | * !LOAD - clear the bit to let go |
| 79 | * ARHT - auto reload |
| 80 | * !CAPT - no external trigger |
| 81 | * !GENT - no external signal |
| 82 | * UDT - set the timer as down counter |
| 83 | * !MDT0 - generate mode |
| 84 | */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 85 | out_be32(timer_baseaddr + TCSR0, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 86 | TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT); |
| 87 | } |
| 88 | |
| 89 | static inline void microblaze_timer0_start_oneshot(unsigned long load_val) |
| 90 | { |
| 91 | if (!load_val) |
| 92 | load_val = 1; |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 93 | /* loading value to timer reg */ |
| 94 | out_be32(timer_baseaddr + TLR0, load_val); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 95 | |
| 96 | /* load the initial value */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 97 | out_be32(timer_baseaddr + TCSR0, TCSR_LOAD); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 98 | |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 99 | out_be32(timer_baseaddr + TCSR0, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 100 | TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT); |
| 101 | } |
| 102 | |
| 103 | static int microblaze_timer_set_next_event(unsigned long delta, |
| 104 | struct clock_event_device *dev) |
| 105 | { |
| 106 | pr_debug("%s: next event, delta %x\n", __func__, (u32)delta); |
| 107 | microblaze_timer0_start_oneshot(delta); |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | static void microblaze_timer_set_mode(enum clock_event_mode mode, |
| 112 | struct clock_event_device *evt) |
| 113 | { |
| 114 | switch (mode) { |
| 115 | case CLOCK_EVT_MODE_PERIODIC: |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 116 | pr_info("%s: periodic\n", __func__); |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 117 | microblaze_timer0_start_periodic(freq_div_hz); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 118 | break; |
| 119 | case CLOCK_EVT_MODE_ONESHOT: |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 120 | pr_info("%s: oneshot\n", __func__); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 121 | break; |
| 122 | case CLOCK_EVT_MODE_UNUSED: |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 123 | pr_info("%s: unused\n", __func__); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 124 | break; |
| 125 | case CLOCK_EVT_MODE_SHUTDOWN: |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 126 | pr_info("%s: shutdown\n", __func__); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 127 | microblaze_timer0_stop(); |
| 128 | break; |
| 129 | case CLOCK_EVT_MODE_RESUME: |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 130 | pr_info("%s: resume\n", __func__); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 131 | break; |
| 132 | } |
| 133 | } |
| 134 | |
| 135 | static struct clock_event_device clockevent_microblaze_timer = { |
| 136 | .name = "microblaze_clockevent", |
| 137 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, |
Michal Simek | c8f7743 | 2010-06-10 16:04:05 +0200 | [diff] [blame] | 138 | .shift = 8, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 139 | .rating = 300, |
| 140 | .set_next_event = microblaze_timer_set_next_event, |
| 141 | .set_mode = microblaze_timer_set_mode, |
| 142 | }; |
| 143 | |
| 144 | static inline void timer_ack(void) |
| 145 | { |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 146 | out_be32(timer_baseaddr + TCSR0, in_be32(timer_baseaddr + TCSR0)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
| 150 | { |
| 151 | struct clock_event_device *evt = &clockevent_microblaze_timer; |
| 152 | #ifdef CONFIG_HEART_BEAT |
| 153 | heartbeat(); |
| 154 | #endif |
| 155 | timer_ack(); |
| 156 | evt->event_handler(evt); |
| 157 | return IRQ_HANDLED; |
| 158 | } |
| 159 | |
| 160 | static struct irqaction timer_irqaction = { |
| 161 | .handler = timer_interrupt, |
| 162 | .flags = IRQF_DISABLED | IRQF_TIMER, |
| 163 | .name = "timer", |
| 164 | .dev_id = &clockevent_microblaze_timer, |
| 165 | }; |
| 166 | |
| 167 | static __init void microblaze_clockevent_init(void) |
| 168 | { |
| 169 | clockevent_microblaze_timer.mult = |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 170 | div_sc(timer_clock_freq, NSEC_PER_SEC, |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 171 | clockevent_microblaze_timer.shift); |
| 172 | clockevent_microblaze_timer.max_delta_ns = |
| 173 | clockevent_delta2ns((u32)~0, &clockevent_microblaze_timer); |
| 174 | clockevent_microblaze_timer.min_delta_ns = |
| 175 | clockevent_delta2ns(1, &clockevent_microblaze_timer); |
| 176 | clockevent_microblaze_timer.cpumask = cpumask_of(0); |
| 177 | clockevents_register_device(&clockevent_microblaze_timer); |
| 178 | } |
| 179 | |
Coly Li | f57f2fe | 2009-04-23 03:05:31 +0800 | [diff] [blame] | 180 | static cycle_t microblaze_read(struct clocksource *cs) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 181 | { |
| 182 | /* reading actual value of timer 1 */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 183 | return (cycle_t) (in_be32(timer_baseaddr + TCR1)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 184 | } |
| 185 | |
Michal Simek | 519e9f4 | 2009-11-06 12:31:00 +0100 | [diff] [blame] | 186 | static struct timecounter microblaze_tc = { |
| 187 | .cc = NULL, |
| 188 | }; |
| 189 | |
| 190 | static cycle_t microblaze_cc_read(const struct cyclecounter *cc) |
| 191 | { |
| 192 | return microblaze_read(NULL); |
| 193 | } |
| 194 | |
| 195 | static struct cyclecounter microblaze_cc = { |
| 196 | .read = microblaze_cc_read, |
| 197 | .mask = CLOCKSOURCE_MASK(32), |
Michal Simek | c8f7743 | 2010-06-10 16:04:05 +0200 | [diff] [blame] | 198 | .shift = 8, |
Michal Simek | 519e9f4 | 2009-11-06 12:31:00 +0100 | [diff] [blame] | 199 | }; |
| 200 | |
Michal Simek | 29e3dbb | 2011-02-07 11:33:47 +0100 | [diff] [blame] | 201 | static int __init init_microblaze_timecounter(void) |
Michal Simek | 519e9f4 | 2009-11-06 12:31:00 +0100 | [diff] [blame] | 202 | { |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 203 | microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC, |
Michal Simek | 519e9f4 | 2009-11-06 12:31:00 +0100 | [diff] [blame] | 204 | microblaze_cc.shift); |
| 205 | |
| 206 | timecounter_init(µblaze_tc, µblaze_cc, sched_clock()); |
| 207 | |
| 208 | return 0; |
| 209 | } |
| 210 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 211 | static struct clocksource clocksource_microblaze = { |
| 212 | .name = "microblaze_clocksource", |
| 213 | .rating = 300, |
| 214 | .read = microblaze_read, |
| 215 | .mask = CLOCKSOURCE_MASK(32), |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 216 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 217 | }; |
| 218 | |
| 219 | static int __init microblaze_clocksource_init(void) |
| 220 | { |
John Stultz | b8f39f7 | 2010-04-26 20:22:23 -0700 | [diff] [blame] | 221 | if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq)) |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 222 | panic("failed to register clocksource"); |
| 223 | |
| 224 | /* stop timer1 */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 225 | out_be32(timer_baseaddr + TCSR1, |
| 226 | in_be32(timer_baseaddr + TCSR1) & ~TCSR_ENT); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 227 | /* start timer1 - up counting without interrupt */ |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 228 | out_be32(timer_baseaddr + TCSR1, TCSR_TINT|TCSR_ENT|TCSR_ARHT); |
Michal Simek | 519e9f4 | 2009-11-06 12:31:00 +0100 | [diff] [blame] | 229 | |
| 230 | /* register timecounter - for ftrace support */ |
| 231 | init_microblaze_timecounter(); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 232 | return 0; |
| 233 | } |
| 234 | |
Michal Simek | 6f34b08 | 2010-04-16 09:50:13 +0200 | [diff] [blame] | 235 | /* |
| 236 | * We have to protect accesses before timer initialization |
| 237 | * and return 0 for sched_clock function below. |
| 238 | */ |
| 239 | static int timer_initialized; |
| 240 | |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 241 | void __init time_init(void) |
| 242 | { |
Michal Simek | 5a26cd6 | 2011-12-09 12:26:16 +0100 | [diff] [blame] | 243 | u32 irq; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 244 | u32 timer_num = 1; |
| 245 | struct device_node *timer = NULL; |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 246 | const void *prop; |
Michal Simek | 9e77dab | 2013-08-27 09:57:52 +0200 | [diff] [blame^] | 247 | |
Michal Simek | 88d23b4 | 2011-12-12 14:02:47 +0100 | [diff] [blame] | 248 | prop = of_get_property(of_chosen, "system-timer", NULL); |
| 249 | if (prop) |
| 250 | timer = of_find_node_by_phandle(be32_to_cpup(prop)); |
| 251 | else |
| 252 | pr_info("No chosen timer found, using default\n"); |
| 253 | |
| 254 | if (!timer) |
| 255 | timer = of_find_compatible_node(NULL, NULL, |
| 256 | "xlnx,xps-timer-1.00.a"); |
John Williams | 892ee92 | 2009-07-29 22:08:40 +1000 | [diff] [blame] | 257 | BUG_ON(!timer); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 258 | |
Michal Simek | 02b0804 | 2010-09-28 16:04:14 +1000 | [diff] [blame] | 259 | timer_baseaddr = be32_to_cpup(of_get_property(timer, "reg", NULL)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 260 | timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE); |
Michal Simek | 9d0ced0 | 2011-12-09 10:46:52 +0100 | [diff] [blame] | 261 | irq = irq_of_parse_and_map(timer, 0); |
Michal Simek | 02b0804 | 2010-09-28 16:04:14 +1000 | [diff] [blame] | 262 | timer_num = be32_to_cpup(of_get_property(timer, |
| 263 | "xlnx,one-timer-only", NULL)); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 264 | if (timer_num) { |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 265 | pr_emerg("Please enable two timers in HW\n"); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 266 | BUG(); |
| 267 | } |
| 268 | |
Michal Simek | aaa5241 | 2012-10-04 14:24:58 +0200 | [diff] [blame] | 269 | pr_info("%s #0 at 0x%08x, irq=%d\n", |
Michal Simek | cc5647a | 2011-11-07 13:42:12 +0100 | [diff] [blame] | 270 | timer->name, timer_baseaddr, irq); |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 271 | |
Michal Simek | ccea0e6 | 2010-10-07 17:39:21 +1000 | [diff] [blame] | 272 | /* If there is clock-frequency property than use it */ |
| 273 | prop = of_get_property(timer, "clock-frequency", NULL); |
| 274 | if (prop) |
| 275 | timer_clock_freq = be32_to_cpup(prop); |
| 276 | else |
| 277 | timer_clock_freq = cpuinfo.cpu_clock_freq; |
| 278 | |
| 279 | freq_div_hz = timer_clock_freq / HZ; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 280 | |
| 281 | setup_irq(irq, &timer_irqaction); |
| 282 | #ifdef CONFIG_HEART_BEAT |
| 283 | setup_heartbeat(); |
| 284 | #endif |
| 285 | microblaze_clocksource_init(); |
| 286 | microblaze_clockevent_init(); |
Michal Simek | 6f34b08 | 2010-04-16 09:50:13 +0200 | [diff] [blame] | 287 | timer_initialized = 1; |
| 288 | } |
| 289 | |
| 290 | unsigned long long notrace sched_clock(void) |
| 291 | { |
| 292 | if (timer_initialized) { |
| 293 | struct clocksource *cs = &clocksource_microblaze; |
Michal Simek | 9c6f6f5 | 2011-09-23 09:52:24 +0200 | [diff] [blame] | 294 | |
| 295 | cycle_t cyc = cnt32_to_63(cs->read(NULL)) & LLONG_MAX; |
Michal Simek | 6f34b08 | 2010-04-16 09:50:13 +0200 | [diff] [blame] | 296 | return clocksource_cyc2ns(cyc, cs->mult, cs->shift); |
| 297 | } |
| 298 | return 0; |
Michal Simek | eedbdab | 2009-03-27 14:25:49 +0100 | [diff] [blame] | 299 | } |