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Mark Brown3cc72982012-06-19 16:31:53 +01001/*
2 * Platform data for Arizona devices
3 *
4 * Copyright 2012 Wolfson Microelectronics. PLC.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef _ARIZONA_PDATA_H
12#define _ARIZONA_PDATA_H
13
Charles Keepax49010332015-02-25 15:37:13 +000014#include <dt-bindings/mfd/arizona.h>
15
Mark Brown3cc72982012-06-19 16:31:53 +010016#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
17#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
18#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
Mark Brown3cc72982012-06-19 16:31:53 +010019#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
20#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
21#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
Mark Brown3cc72982012-06-19 16:31:53 +010022#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
23#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
24#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
Mark Brown3cc72982012-06-19 16:31:53 +010025#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
26#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
27#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
Mark Brown3cc72982012-06-19 16:31:53 +010028#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
29#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
30#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
Mark Brown3cc72982012-06-19 16:31:53 +010031#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
32#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
33#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
Mark Brown3cc72982012-06-19 16:31:53 +010034#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
35#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
36#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
37#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */
38#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */
39#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */
40
41#define ARIZONA_MAX_GPIO 5
42
Mark Browne102bef2012-07-10 12:37:58 +010043#define ARIZONA_MAX_INPUT 4
Mark Brown3cc72982012-06-19 16:31:53 +010044
Mark Brown3d91f822013-01-29 00:47:37 +080045#define ARIZONA_MAX_MICBIAS 3
46
Mark Browne102bef2012-07-10 12:37:58 +010047#define ARIZONA_MAX_OUTPUT 6
Mark Brown3cc72982012-06-19 16:31:53 +010048
Mark Brownc94aa302013-01-17 16:35:14 +090049#define ARIZONA_MAX_AIF 3
50
Mark Brown9dd555e2012-11-26 21:17:21 +000051#define ARIZONA_HAP_ACT_ERM 0
52#define ARIZONA_HAP_ACT_LRA 2
53
Mark Brown2a51da02012-07-09 19:33:14 +010054#define ARIZONA_MAX_PDM_SPK 2
Mark Brown3cc72982012-06-19 16:31:53 +010055
56struct regulator_init_data;
57
Mark Brown3d91f822013-01-29 00:47:37 +080058struct arizona_micbias {
59 int mV; /** Regulated voltage */
60 unsigned int ext_cap:1; /** External capacitor fitted */
61 unsigned int discharge:1; /** Actively discharge */
Charles Keepaxf773fc62013-05-21 14:56:58 +010062 unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
Mark Brown544c7aa2013-01-29 18:44:41 +080063 unsigned int bypass:1; /** Use bypass mode */
Mark Brown3d91f822013-01-29 00:47:37 +080064};
65
Mark Brown3cc72982012-06-19 16:31:53 +010066struct arizona_micd_config {
67 unsigned int src;
68 unsigned int bias;
69 bool gpio;
70};
71
Mark Brown6fed4d82013-04-01 22:03:06 +010072struct arizona_micd_range {
73 int max; /** Ohms */
74 int key; /** Key to report to input layer */
75};
76
Mark Brown3cc72982012-06-19 16:31:53 +010077struct arizona_pdata {
78 int reset; /** GPIO controlling /RESET, if any */
79 int ldoena; /** GPIO controlling LODENA, if any */
80
81 /** Regulator configuration for MICVDD */
82 struct regulator_init_data *micvdd;
83
84 /** Regulator configuration for LDO1 */
85 struct regulator_init_data *ldo1;
86
87 /** If a direct 32kHz clock is provided on an MCLK specify it here */
88 int clk32k_src;
89
Mark Brownf8a09412013-03-22 12:59:33 +010090 /** Mode for primary IRQ (defaults to active low) */
91 unsigned int irq_flags;
Mark Brown3cc72982012-06-19 16:31:53 +010092
93 /* Base GPIO */
94 int gpio_base;
95
96 /** Pin state for GPIO pins */
Charles Keepax6e00ff02015-03-29 12:45:42 +010097 unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
Mark Brown3cc72982012-06-19 16:31:53 +010098
Mark Brownc94aa302013-01-17 16:35:14 +090099 /**
100 * Maximum number of channels clocks will be generated for,
101 * useful for systems where and I2S bus with multiple data
102 * lines is mastered.
103 */
104 int max_channels_clocked[ARIZONA_MAX_AIF];
105
Mark Brown92a49872013-01-11 08:55:39 +0900106 /** GPIO5 is used for jack detection */
107 bool jd_gpio5;
108
Mark Browne56a0a52013-04-01 19:03:52 +0100109 /** Internal pull on GPIO5 is disabled when used for jack detection */
110 bool jd_gpio5_nopull;
111
Richard Fitzgeralda288d642014-05-23 12:54:57 +0100112 /** set to true if jackdet contact opens on insert */
113 bool jd_invert;
114
Mark Browndd235ee2013-01-11 08:55:51 +0900115 /** Use the headphone detect circuit to identify the accessory */
116 bool hpdet_acc_id;
117
Mark Brown9c2ba272013-02-25 23:42:31 +0000118 /** Check for line output with HPDET method */
119 bool hpdet_acc_id_line;
120
Mark Brown1eda6aa2013-01-11 08:55:54 +0900121 /** GPIO used for mic isolation with HPDET */
122 int hpdet_id_gpio;
123
Inha Song9e86b2a2015-05-04 13:42:13 +0900124 /** Channel to use for headphone detection */
125 unsigned int hpdet_channel;
126
Mark Browncd59e792013-04-01 19:21:48 +0100127 /** Extra debounce timeout used during initial mic detection (ms) */
128 int micd_detect_debounce;
129
Mark Brown3cc72982012-06-19 16:31:53 +0100130 /** GPIO for mic detection polarity */
131 int micd_pol_gpio;
132
Mark Brownb17e5462013-01-11 08:55:24 +0900133 /** Mic detect ramp rate */
134 int micd_bias_start_time;
135
Mark Brown2e033db2013-01-21 17:36:33 +0900136 /** Mic detect sample rate */
137 int micd_rate;
138
139 /** Mic detect debounce level */
140 int micd_dbtime;
141
Mark Brown7abd4e22013-04-01 19:25:55 +0100142 /** Mic detect timeout (ms) */
143 int micd_timeout;
144
Mark Brownbbbd46e2013-01-10 19:38:43 +0000145 /** Force MICBIAS on for mic detect */
146 bool micd_force_micbias;
147
Mark Brown6fed4d82013-04-01 22:03:06 +0100148 /** Mic detect level parameters */
149 const struct arizona_micd_range *micd_ranges;
150 int num_micd_ranges;
151
Mark Brown3cc72982012-06-19 16:31:53 +0100152 /** Headset polarity configurations */
153 struct arizona_micd_config *micd_configs;
154 int num_micd_configs;
155
156 /** Reference voltage for DMIC inputs */
157 int dmic_ref[ARIZONA_MAX_INPUT];
158
Mark Brown3d91f822013-01-29 00:47:37 +0800159 /** MICBIAS configurations */
160 struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
161
Mark Brown3cc72982012-06-19 16:31:53 +0100162 /** Mode of input structures */
163 int inmode[ARIZONA_MAX_INPUT];
164
165 /** Mode for outputs */
166 bool out_mono[ARIZONA_MAX_OUTPUT];
167
168 /** PDM speaker mute setting */
169 unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
170
171 /** PDM speaker format */
172 unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
Mark Brown9dd555e2012-11-26 21:17:21 +0000173
174 /** Haptic actuator type */
175 unsigned int hap_act;
Mark Brown3092f802013-03-24 23:05:58 +0000176
177 /** GPIO for primary IRQ (used for edge triggered emulation) */
178 int irq_gpio;
Mark Brown3cc72982012-06-19 16:31:53 +0100179};
180
181#endif