Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 1 | #include <linux/module.h> |
| 2 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 3 | #include "nouveau_drm.h" |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 4 | #include "nouveau_agp.h" |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 5 | #include "nouveau_reg.h" |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 6 | |
| 7 | #if __OS_HAS_AGP |
| 8 | MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)"); |
| 9 | static int nouveau_agpmode = -1; |
| 10 | module_param_named(agpmode, nouveau_agpmode, int, 0400); |
| 11 | |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 12 | struct nouveau_agpmode_quirk { |
| 13 | u16 hostbridge_vendor; |
| 14 | u16 hostbridge_device; |
| 15 | u16 chip_vendor; |
| 16 | u16 chip_device; |
| 17 | int mode; |
| 18 | }; |
| 19 | |
| 20 | static struct nouveau_agpmode_quirk nouveau_agpmode_quirk_list[] = { |
| 21 | /* VIA Apollo PRO133x / GeForce FX 5600 Ultra, max agpmode 2, fdo #20341 */ |
| 22 | { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 }, |
| 23 | |
| 24 | {}, |
| 25 | }; |
| 26 | |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 27 | static unsigned long |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 28 | get_agp_mode(struct nouveau_drm *drm, const struct drm_agp_info *info) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 29 | { |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 30 | struct nvif_device *device = &drm->device; |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 31 | struct nouveau_agpmode_quirk *quirk = nouveau_agpmode_quirk_list; |
| 32 | int agpmode = nouveau_agpmode; |
| 33 | unsigned long mode = info->mode; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 34 | |
| 35 | /* |
| 36 | * FW seems to be broken on nv18, it makes the card lock up |
| 37 | * randomly. |
| 38 | */ |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 39 | if (device->info.chipset == 0x18) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 40 | mode &= ~PCI_AGP_COMMAND_FW; |
| 41 | |
| 42 | /* |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 43 | * Go through the quirks list and adjust the agpmode accordingly. |
| 44 | */ |
| 45 | while (agpmode == -1 && quirk->hostbridge_vendor) { |
| 46 | if (info->id_vendor == quirk->hostbridge_vendor && |
| 47 | info->id_device == quirk->hostbridge_device && |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 48 | nvkm_device(device)->pdev->vendor == quirk->chip_vendor && |
| 49 | nvkm_device(device)->pdev->device == quirk->chip_device) { |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 50 | agpmode = quirk->mode; |
Ben Skeggs | fa2bade | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 51 | NV_INFO(drm, "Forcing agp mode to %dX. Use agpmode to override.\n", |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 52 | agpmode); |
| 53 | break; |
| 54 | } |
| 55 | ++quirk; |
| 56 | } |
| 57 | |
| 58 | /* |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 59 | * AGP mode set in the command line. |
| 60 | */ |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 61 | if (agpmode > 0) { |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 62 | bool agpv3 = mode & 0x8; |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 63 | int rate = agpv3 ? agpmode / 4 : agpmode; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 64 | |
| 65 | mode = (mode & ~0x7) | (rate & 0x7); |
| 66 | } |
| 67 | |
| 68 | return mode; |
| 69 | } |
| 70 | |
| 71 | static bool |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 72 | nouveau_agp_enabled(struct nouveau_drm *drm) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 73 | { |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 74 | struct drm_device *dev = drm->dev; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 75 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 76 | if (!dev->pdev || !drm_pci_device_is_agp(dev) || !dev->agp) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 77 | return false; |
| 78 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 79 | if (drm->agp.stat == UNKNOWN) { |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 80 | if (!nouveau_agpmode) |
| 81 | return false; |
Francisco Jerez | 650e120 | 2013-02-26 02:33:11 +0100 | [diff] [blame] | 82 | #ifdef __powerpc__ |
| 83 | /* Disable AGP by default on all PowerPC machines for |
| 84 | * now -- At least some UniNorth-2 AGP bridges are |
| 85 | * known to be broken: DMA from the host to the card |
| 86 | * works just fine, but writeback from the card to the |
| 87 | * host goes straight to memory untranslated bypassing |
| 88 | * the GATT somehow, making them quite painful to deal |
| 89 | * with... |
| 90 | */ |
| 91 | if (nouveau_agpmode == -1) |
| 92 | return false; |
| 93 | #endif |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 94 | return true; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 95 | } |
| 96 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 97 | return (drm->agp.stat == ENABLED); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 98 | } |
| 99 | #endif |
| 100 | |
| 101 | void |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 102 | nouveau_agp_reset(struct nouveau_drm *drm) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 103 | { |
| 104 | #if __OS_HAS_AGP |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 105 | struct nvif_device *device = &drm->device; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 106 | struct drm_device *dev = drm->dev; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 107 | u32 save[2]; |
| 108 | int ret; |
| 109 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 110 | if (!nouveau_agp_enabled(drm)) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 111 | return; |
| 112 | |
| 113 | /* First of all, disable fast writes, otherwise if it's |
| 114 | * already enabled in the AGP bridge and we disable the card's |
| 115 | * AGP controller we might be locking ourselves out of it. */ |
Ben Skeggs | db2bec1 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 116 | if ((nvif_rd32(device, NV04_PBUS_PCI_NV_19) | |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 117 | dev->agp->mode) & PCI_AGP_COMMAND_FW) { |
| 118 | struct drm_agp_info info; |
| 119 | struct drm_agp_mode mode; |
| 120 | |
| 121 | ret = drm_agp_info(dev, &info); |
| 122 | if (ret) |
| 123 | return; |
| 124 | |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 125 | mode.mode = get_agp_mode(drm, &info); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 126 | mode.mode &= ~PCI_AGP_COMMAND_FW; |
| 127 | |
| 128 | ret = drm_agp_enable(dev, mode); |
| 129 | if (ret) |
| 130 | return; |
| 131 | } |
| 132 | |
| 133 | |
| 134 | /* clear busmaster bit, and disable AGP */ |
Ben Skeggs | db2bec1 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 135 | save[0] = nvif_mask(device, NV04_PBUS_PCI_NV_1, 0x00000004, 0x00000000); |
| 136 | nvif_wr32(device, NV04_PBUS_PCI_NV_19, 0); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 137 | |
| 138 | /* reset PGRAPH, PFIFO and PTIMER */ |
Ben Skeggs | db2bec1 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 139 | save[1] = nvif_mask(device, 0x000200, 0x00011100, 0x00000000); |
| 140 | nvif_mask(device, 0x000200, 0x00011100, save[1]); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 141 | |
| 142 | /* and restore bustmaster bit (gives effect of resetting AGP) */ |
Ben Skeggs | db2bec1 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 143 | nvif_wr32(device, NV04_PBUS_PCI_NV_1, save[0]); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 144 | #endif |
| 145 | } |
| 146 | |
| 147 | void |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 148 | nouveau_agp_init(struct nouveau_drm *drm) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 149 | { |
| 150 | #if __OS_HAS_AGP |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 151 | struct drm_device *dev = drm->dev; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 152 | struct drm_agp_info info; |
| 153 | struct drm_agp_mode mode; |
| 154 | int ret; |
| 155 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 156 | if (!nouveau_agp_enabled(drm)) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 157 | return; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 158 | drm->agp.stat = DISABLE; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 159 | |
| 160 | ret = drm_agp_acquire(dev); |
| 161 | if (ret) { |
Ben Skeggs | fa2bade | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 162 | NV_ERROR(drm, "unable to acquire AGP: %d\n", ret); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 163 | return; |
| 164 | } |
| 165 | |
| 166 | ret = drm_agp_info(dev, &info); |
| 167 | if (ret) { |
Ben Skeggs | fa2bade | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 168 | NV_ERROR(drm, "unable to get AGP info: %d\n", ret); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 169 | return; |
| 170 | } |
| 171 | |
| 172 | /* see agp.h for the AGPSTAT_* modes available */ |
Ilia Mirkin | fd34381b | 2013-10-27 11:54:09 -0400 | [diff] [blame] | 173 | mode.mode = get_agp_mode(drm, &info); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 174 | |
| 175 | ret = drm_agp_enable(dev, mode); |
| 176 | if (ret) { |
Ben Skeggs | fa2bade | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 177 | NV_ERROR(drm, "unable to enable AGP: %d\n", ret); |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 178 | return; |
| 179 | } |
| 180 | |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 181 | drm->agp.stat = ENABLED; |
| 182 | drm->agp.base = info.aperture_base; |
| 183 | drm->agp.size = info.aperture_size; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 184 | #endif |
| 185 | } |
| 186 | |
| 187 | void |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 188 | nouveau_agp_fini(struct nouveau_drm *drm) |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 189 | { |
| 190 | #if __OS_HAS_AGP |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 191 | struct drm_device *dev = drm->dev; |
Ben Skeggs | aa4cc5d2 | 2012-07-05 21:36:32 +1000 | [diff] [blame] | 192 | if (dev->agp && dev->agp->acquired) |
| 193 | drm_agp_release(dev); |
| 194 | #endif |
| 195 | } |