Ben Skeggs | 56d237d | 2014-05-19 14:54:33 +1000 | [diff] [blame] | 1 | /* |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2 | * Copyright 2011 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 25 | #include <linux/dma-mapping.h> |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 26 | |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 27 | #include <drm/drmP.h> |
| 28 | #include <drm/drm_crtc_helper.h> |
Ben Skeggs | 4874322 | 2014-05-31 01:48:06 +1000 | [diff] [blame] | 29 | #include <drm/drm_dp_helper.h> |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 30 | |
Ben Skeggs | fdb751e | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 31 | #include <nvif/class.h> |
| 32 | |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 33 | #include "nouveau_drm.h" |
| 34 | #include "nouveau_dma.h" |
| 35 | #include "nouveau_gem.h" |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 36 | #include "nouveau_connector.h" |
| 37 | #include "nouveau_encoder.h" |
| 38 | #include "nouveau_crtc.h" |
Ben Skeggs | f589be8 | 2012-07-22 11:55:54 +1000 | [diff] [blame] | 39 | #include "nouveau_fence.h" |
Ben Skeggs | 3a89cd0 | 2011-07-07 10:47:10 +1000 | [diff] [blame] | 40 | #include "nv50_display.h" |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 41 | |
Ben Skeggs | 8a46438 | 2011-11-12 23:52:07 +1000 | [diff] [blame] | 42 | #define EVO_DMA_NR 9 |
| 43 | |
Ben Skeggs | bdb8c21 | 2011-11-12 01:30:24 +1000 | [diff] [blame] | 44 | #define EVO_MASTER (0x00) |
Ben Skeggs | a63a97e | 2011-11-16 15:22:34 +1000 | [diff] [blame] | 45 | #define EVO_FLIP(c) (0x01 + (c)) |
Ben Skeggs | 8a46438 | 2011-11-12 23:52:07 +1000 | [diff] [blame] | 46 | #define EVO_OVLY(c) (0x05 + (c)) |
| 47 | #define EVO_OIMM(c) (0x09 + (c)) |
Ben Skeggs | bdb8c21 | 2011-11-12 01:30:24 +1000 | [diff] [blame] | 48 | #define EVO_CURS(c) (0x0d + (c)) |
| 49 | |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 50 | /* offsets in shared sync bo of various structures */ |
| 51 | #define EVO_SYNC(c, o) ((c) * 0x0100 + (o)) |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 52 | #define EVO_MAST_NTFY EVO_SYNC( 0, 0x00) |
| 53 | #define EVO_FLIP_SEM0(c) EVO_SYNC((c) + 1, 0x00) |
| 54 | #define EVO_FLIP_SEM1(c) EVO_SYNC((c) + 1, 0x10) |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 55 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 56 | /****************************************************************************** |
| 57 | * EVO channel |
| 58 | *****************************************************************************/ |
| 59 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 60 | struct nv50_chan { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 61 | struct nvif_object user; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | static int |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 65 | nv50_chan_create(struct nvif_object *disp, const u32 *oclass, u8 head, |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 66 | void *data, u32 size, struct nv50_chan *chan) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 67 | { |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 68 | while (oclass[0]) { |
| 69 | int ret = nvif_object_init(disp, NULL, (oclass[0] << 16) | head, |
| 70 | oclass[0], data, size, |
| 71 | &chan->user); |
Ben Skeggs | b76f152 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 72 | if (oclass++, ret == 0) { |
| 73 | nvif_object_map(&chan->user); |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 74 | return ret; |
Ben Skeggs | b76f152 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 75 | } |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 76 | } |
| 77 | return -ENOSYS; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | static void |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 81 | nv50_chan_destroy(struct nv50_chan *chan) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 82 | { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 83 | nvif_object_fini(&chan->user); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | /****************************************************************************** |
| 87 | * PIO EVO channel |
| 88 | *****************************************************************************/ |
| 89 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 90 | struct nv50_pioc { |
| 91 | struct nv50_chan base; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 92 | }; |
| 93 | |
| 94 | static void |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 95 | nv50_pioc_destroy(struct nv50_pioc *pioc) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 96 | { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 97 | nv50_chan_destroy(&pioc->base); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | static int |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 101 | nv50_pioc_create(struct nvif_object *disp, const u32 *oclass, u8 head, |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 102 | void *data, u32 size, struct nv50_pioc *pioc) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 103 | { |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 104 | return nv50_chan_create(disp, oclass, head, data, size, &pioc->base); |
| 105 | } |
| 106 | |
| 107 | /****************************************************************************** |
| 108 | * Cursor Immediate |
| 109 | *****************************************************************************/ |
| 110 | |
| 111 | struct nv50_curs { |
| 112 | struct nv50_pioc base; |
| 113 | }; |
| 114 | |
| 115 | static int |
| 116 | nv50_curs_create(struct nvif_object *disp, int head, struct nv50_curs *curs) |
| 117 | { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 118 | struct nv50_disp_cursor_v0 args = { |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 119 | .head = head, |
| 120 | }; |
| 121 | static const u32 oclass[] = { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 122 | GK104_DISP_CURSOR, |
| 123 | GF110_DISP_CURSOR, |
| 124 | GT214_DISP_CURSOR, |
| 125 | G82_DISP_CURSOR, |
| 126 | NV50_DISP_CURSOR, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 127 | 0 |
| 128 | }; |
| 129 | |
| 130 | return nv50_pioc_create(disp, oclass, head, &args, sizeof(args), |
| 131 | &curs->base); |
| 132 | } |
| 133 | |
| 134 | /****************************************************************************** |
| 135 | * Overlay Immediate |
| 136 | *****************************************************************************/ |
| 137 | |
| 138 | struct nv50_oimm { |
| 139 | struct nv50_pioc base; |
| 140 | }; |
| 141 | |
| 142 | static int |
| 143 | nv50_oimm_create(struct nvif_object *disp, int head, struct nv50_oimm *oimm) |
| 144 | { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 145 | struct nv50_disp_cursor_v0 args = { |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 146 | .head = head, |
| 147 | }; |
| 148 | static const u32 oclass[] = { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 149 | GK104_DISP_OVERLAY, |
| 150 | GF110_DISP_OVERLAY, |
| 151 | GT214_DISP_OVERLAY, |
| 152 | G82_DISP_OVERLAY, |
| 153 | NV50_DISP_OVERLAY, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 154 | 0 |
| 155 | }; |
| 156 | |
| 157 | return nv50_pioc_create(disp, oclass, head, &args, sizeof(args), |
| 158 | &oimm->base); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | /****************************************************************************** |
| 162 | * DMA EVO channel |
| 163 | *****************************************************************************/ |
| 164 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 165 | struct nv50_dmac { |
| 166 | struct nv50_chan base; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 167 | dma_addr_t handle; |
| 168 | u32 *ptr; |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 169 | |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 170 | struct nvif_object sync; |
| 171 | struct nvif_object vram; |
| 172 | |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 173 | /* Protects against concurrent pushbuf access to this channel, lock is |
| 174 | * grabbed by evo_wait (if the pushbuf reservation is successful) and |
| 175 | * dropped again by evo_kick. */ |
| 176 | struct mutex lock; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 177 | }; |
| 178 | |
| 179 | static void |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 180 | nv50_dmac_destroy(struct nv50_dmac *dmac, struct nvif_object *disp) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 181 | { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 182 | nvif_object_fini(&dmac->vram); |
| 183 | nvif_object_fini(&dmac->sync); |
| 184 | |
| 185 | nv50_chan_destroy(&dmac->base); |
| 186 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 187 | if (dmac->ptr) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 188 | struct pci_dev *pdev = nvkm_device(nvif_device(disp))->pdev; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 189 | pci_free_consistent(pdev, PAGE_SIZE, dmac->ptr, dmac->handle); |
| 190 | } |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | static int |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 194 | nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head, |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 195 | void *data, u32 size, u64 syncbuf, |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 196 | struct nv50_dmac *dmac) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 197 | { |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 198 | struct nvif_device *device = nvif_device(disp); |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 199 | struct nv50_disp_core_channel_dma_v0 *args = data; |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 200 | struct nvif_object pushbuf; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 201 | int ret; |
| 202 | |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 203 | mutex_init(&dmac->lock); |
| 204 | |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 205 | dmac->ptr = pci_alloc_consistent(nvkm_device(device)->pdev, |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 206 | PAGE_SIZE, &dmac->handle); |
Ben Skeggs | 4705730 | 2012-11-16 13:58:48 +1000 | [diff] [blame] | 207 | if (!dmac->ptr) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 208 | return -ENOMEM; |
| 209 | |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 210 | ret = nvif_object_init(nvif_object(device), NULL, |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 211 | args->pushbuf, NV_DMA_FROM_MEMORY, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 212 | &(struct nv_dma_v0) { |
| 213 | .target = NV_DMA_V0_TARGET_PCI_US, |
| 214 | .access = NV_DMA_V0_ACCESS_RD, |
Ben Skeggs | 4705730 | 2012-11-16 13:58:48 +1000 | [diff] [blame] | 215 | .start = dmac->handle + 0x0000, |
| 216 | .limit = dmac->handle + 0x0fff, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 217 | }, sizeof(struct nv_dma_v0), &pushbuf); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 218 | if (ret) |
| 219 | return ret; |
| 220 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 221 | ret = nv50_chan_create(disp, oclass, head, data, size, &dmac->base); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 222 | nvif_object_fini(&pushbuf); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 223 | if (ret) |
| 224 | return ret; |
| 225 | |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 226 | ret = nvif_object_init(&dmac->base.user, NULL, 0xf0000000, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 227 | NV_DMA_IN_MEMORY, |
| 228 | &(struct nv_dma_v0) { |
| 229 | .target = NV_DMA_V0_TARGET_VRAM, |
| 230 | .access = NV_DMA_V0_ACCESS_RDWR, |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 231 | .start = syncbuf + 0x0000, |
| 232 | .limit = syncbuf + 0x0fff, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 233 | }, sizeof(struct nv_dma_v0), |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 234 | &dmac->sync); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 235 | if (ret) |
Ben Skeggs | 4705730 | 2012-11-16 13:58:48 +1000 | [diff] [blame] | 236 | return ret; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 237 | |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 238 | ret = nvif_object_init(&dmac->base.user, NULL, 0xf0000001, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 239 | NV_DMA_IN_MEMORY, |
| 240 | &(struct nv_dma_v0) { |
| 241 | .target = NV_DMA_V0_TARGET_VRAM, |
| 242 | .access = NV_DMA_V0_ACCESS_RDWR, |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 243 | .start = 0, |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 244 | .limit = device->info.ram_user - 1, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 245 | }, sizeof(struct nv_dma_v0), |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 246 | &dmac->vram); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 247 | if (ret) |
Ben Skeggs | 4705730 | 2012-11-16 13:58:48 +1000 | [diff] [blame] | 248 | return ret; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 249 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 250 | return ret; |
| 251 | } |
| 252 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 253 | /****************************************************************************** |
| 254 | * Core |
| 255 | *****************************************************************************/ |
| 256 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 257 | struct nv50_mast { |
| 258 | struct nv50_dmac base; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 259 | }; |
| 260 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 261 | static int |
| 262 | nv50_core_create(struct nvif_object *disp, u64 syncbuf, struct nv50_mast *core) |
| 263 | { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 264 | struct nv50_disp_core_channel_dma_v0 args = { |
| 265 | .pushbuf = 0xb0007d00, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 266 | }; |
| 267 | static const u32 oclass[] = { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 268 | GM107_DISP_CORE_CHANNEL_DMA, |
| 269 | GK110_DISP_CORE_CHANNEL_DMA, |
| 270 | GK104_DISP_CORE_CHANNEL_DMA, |
| 271 | GF110_DISP_CORE_CHANNEL_DMA, |
| 272 | GT214_DISP_CORE_CHANNEL_DMA, |
| 273 | GT206_DISP_CORE_CHANNEL_DMA, |
| 274 | GT200_DISP_CORE_CHANNEL_DMA, |
| 275 | G82_DISP_CORE_CHANNEL_DMA, |
| 276 | NV50_DISP_CORE_CHANNEL_DMA, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 277 | 0 |
| 278 | }; |
| 279 | |
| 280 | return nv50_dmac_create(disp, oclass, 0, &args, sizeof(args), syncbuf, |
| 281 | &core->base); |
| 282 | } |
| 283 | |
| 284 | /****************************************************************************** |
| 285 | * Base |
| 286 | *****************************************************************************/ |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 287 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 288 | struct nv50_sync { |
| 289 | struct nv50_dmac base; |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 290 | u32 addr; |
| 291 | u32 data; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 292 | }; |
| 293 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 294 | static int |
| 295 | nv50_base_create(struct nvif_object *disp, int head, u64 syncbuf, |
| 296 | struct nv50_sync *base) |
| 297 | { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 298 | struct nv50_disp_base_channel_dma_v0 args = { |
| 299 | .pushbuf = 0xb0007c00 | head, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 300 | .head = head, |
| 301 | }; |
| 302 | static const u32 oclass[] = { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 303 | GK110_DISP_BASE_CHANNEL_DMA, |
| 304 | GK104_DISP_BASE_CHANNEL_DMA, |
| 305 | GF110_DISP_BASE_CHANNEL_DMA, |
| 306 | GT214_DISP_BASE_CHANNEL_DMA, |
| 307 | GT200_DISP_BASE_CHANNEL_DMA, |
| 308 | G82_DISP_BASE_CHANNEL_DMA, |
| 309 | NV50_DISP_BASE_CHANNEL_DMA, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 310 | 0 |
| 311 | }; |
| 312 | |
| 313 | return nv50_dmac_create(disp, oclass, head, &args, sizeof(args), |
| 314 | syncbuf, &base->base); |
| 315 | } |
| 316 | |
| 317 | /****************************************************************************** |
| 318 | * Overlay |
| 319 | *****************************************************************************/ |
| 320 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 321 | struct nv50_ovly { |
| 322 | struct nv50_dmac base; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 323 | }; |
Ben Skeggs | f20ce96 | 2011-07-08 13:17:01 +1000 | [diff] [blame] | 324 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 325 | static int |
| 326 | nv50_ovly_create(struct nvif_object *disp, int head, u64 syncbuf, |
| 327 | struct nv50_ovly *ovly) |
| 328 | { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 329 | struct nv50_disp_overlay_channel_dma_v0 args = { |
| 330 | .pushbuf = 0xb0007e00 | head, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 331 | .head = head, |
| 332 | }; |
| 333 | static const u32 oclass[] = { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 334 | GK104_DISP_OVERLAY_CONTROL_DMA, |
| 335 | GF110_DISP_OVERLAY_CONTROL_DMA, |
| 336 | GT214_DISP_OVERLAY_CHANNEL_DMA, |
| 337 | GT200_DISP_OVERLAY_CHANNEL_DMA, |
| 338 | G82_DISP_OVERLAY_CHANNEL_DMA, |
| 339 | NV50_DISP_OVERLAY_CHANNEL_DMA, |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 340 | 0 |
| 341 | }; |
| 342 | |
| 343 | return nv50_dmac_create(disp, oclass, head, &args, sizeof(args), |
| 344 | syncbuf, &ovly->base); |
| 345 | } |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 346 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 347 | struct nv50_head { |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 348 | struct nouveau_crtc base; |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 349 | struct nouveau_bo *image; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 350 | struct nv50_curs curs; |
| 351 | struct nv50_sync sync; |
| 352 | struct nv50_ovly ovly; |
| 353 | struct nv50_oimm oimm; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 354 | }; |
| 355 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 356 | #define nv50_head(c) ((struct nv50_head *)nouveau_crtc(c)) |
| 357 | #define nv50_curs(c) (&nv50_head(c)->curs) |
| 358 | #define nv50_sync(c) (&nv50_head(c)->sync) |
| 359 | #define nv50_ovly(c) (&nv50_head(c)->ovly) |
| 360 | #define nv50_oimm(c) (&nv50_head(c)->oimm) |
| 361 | #define nv50_chan(c) (&(c)->base.base) |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 362 | #define nv50_vers(c) nv50_chan(c)->user.oclass |
| 363 | |
| 364 | struct nv50_fbdma { |
| 365 | struct list_head head; |
| 366 | struct nvif_object core; |
| 367 | struct nvif_object base[4]; |
| 368 | }; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 369 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 370 | struct nv50_disp { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 371 | struct nvif_object *disp; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 372 | struct nv50_mast mast; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 373 | |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 374 | struct list_head fbdma; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 375 | |
| 376 | struct nouveau_bo *sync; |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 377 | }; |
| 378 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 379 | static struct nv50_disp * |
| 380 | nv50_disp(struct drm_device *dev) |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 381 | { |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 382 | return nouveau_display(dev)->priv; |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 383 | } |
| 384 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 385 | #define nv50_mast(d) (&nv50_disp(d)->mast) |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 386 | |
Ben Skeggs | bdb8c21 | 2011-11-12 01:30:24 +1000 | [diff] [blame] | 387 | static struct drm_crtc * |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 388 | nv50_display_crtc_get(struct drm_encoder *encoder) |
Ben Skeggs | bdb8c21 | 2011-11-12 01:30:24 +1000 | [diff] [blame] | 389 | { |
| 390 | return nouveau_encoder(encoder)->crtc; |
| 391 | } |
| 392 | |
| 393 | /****************************************************************************** |
| 394 | * EVO channel helpers |
| 395 | *****************************************************************************/ |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 396 | static u32 * |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 397 | evo_wait(void *evoc, int nr) |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 398 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 399 | struct nv50_dmac *dmac = evoc; |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 400 | u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4; |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 401 | |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 402 | mutex_lock(&dmac->lock); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 403 | if (put + nr >= (PAGE_SIZE / 4) - 8) { |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 404 | dmac->ptr[put] = 0x20000000; |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 405 | |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 406 | nvif_wr32(&dmac->base.user, 0x0000, 0x00000000); |
| 407 | if (!nvkm_wait(&dmac->base.user, 0x0004, ~0, 0x00000000)) { |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 408 | mutex_unlock(&dmac->lock); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 409 | nv_error(nvkm_object(&dmac->base.user), "channel stalled\n"); |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 410 | return NULL; |
| 411 | } |
| 412 | |
| 413 | put = 0; |
| 414 | } |
| 415 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 416 | return dmac->ptr + put; |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | static void |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 420 | evo_kick(u32 *push, void *evoc) |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 421 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 422 | struct nv50_dmac *dmac = evoc; |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 423 | nvif_wr32(&dmac->base.user, 0x0000, (push - dmac->ptr) << 2); |
Daniel Vetter | 59ad146 | 2012-12-02 14:49:44 +0100 | [diff] [blame] | 424 | mutex_unlock(&dmac->lock); |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 425 | } |
| 426 | |
| 427 | #define evo_mthd(p,m,s) *((p)++) = (((s) << 18) | (m)) |
| 428 | #define evo_data(p,d) *((p)++) = (d) |
| 429 | |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 430 | static bool |
| 431 | evo_sync_wait(void *data) |
| 432 | { |
Ben Skeggs | 5cc027f | 2013-02-18 17:50:51 -0500 | [diff] [blame] | 433 | if (nouveau_bo_rd32(data, EVO_MAST_NTFY) != 0x00000000) |
| 434 | return true; |
| 435 | usleep_range(1, 2); |
| 436 | return false; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | static int |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 440 | evo_sync(struct drm_device *dev) |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 441 | { |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 442 | struct nvif_device *device = &nouveau_drm(dev)->device; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 443 | struct nv50_disp *disp = nv50_disp(dev); |
| 444 | struct nv50_mast *mast = nv50_mast(dev); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 445 | u32 *push = evo_wait(mast, 8); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 446 | if (push) { |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 447 | nouveau_bo_wr32(disp->sync, EVO_MAST_NTFY, 0x00000000); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 448 | evo_mthd(push, 0x0084, 1); |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 449 | evo_data(push, 0x80000000 | EVO_MAST_NTFY); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 450 | evo_mthd(push, 0x0080, 2); |
| 451 | evo_data(push, 0x00000000); |
| 452 | evo_data(push, 0x00000000); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 453 | evo_kick(push, mast); |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 454 | if (nv_wait_cb(nvkm_device(device), evo_sync_wait, disp->sync)) |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 455 | return 0; |
| 456 | } |
| 457 | |
| 458 | return -EBUSY; |
| 459 | } |
| 460 | |
| 461 | /****************************************************************************** |
Ben Skeggs | a63a97e | 2011-11-16 15:22:34 +1000 | [diff] [blame] | 462 | * Page flipping channel |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 463 | *****************************************************************************/ |
| 464 | struct nouveau_bo * |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 465 | nv50_display_crtc_sema(struct drm_device *dev, int crtc) |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 466 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 467 | return nv50_disp(dev)->sync; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 468 | } |
| 469 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 470 | struct nv50_display_flip { |
| 471 | struct nv50_disp *disp; |
| 472 | struct nv50_sync *chan; |
| 473 | }; |
| 474 | |
| 475 | static bool |
| 476 | nv50_display_flip_wait(void *data) |
| 477 | { |
| 478 | struct nv50_display_flip *flip = data; |
| 479 | if (nouveau_bo_rd32(flip->disp->sync, flip->chan->addr / 4) == |
Calvin Owens | b1ea3e6 | 2013-04-07 21:01:19 -0500 | [diff] [blame] | 480 | flip->chan->data) |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 481 | return true; |
| 482 | usleep_range(1, 2); |
| 483 | return false; |
| 484 | } |
| 485 | |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 486 | void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 487 | nv50_display_flip_stop(struct drm_crtc *crtc) |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 488 | { |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 489 | struct nvif_device *device = &nouveau_drm(crtc->dev)->device; |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 490 | struct nv50_display_flip flip = { |
| 491 | .disp = nv50_disp(crtc->dev), |
| 492 | .chan = nv50_sync(crtc), |
| 493 | }; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 494 | u32 *push; |
| 495 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 496 | push = evo_wait(flip.chan, 8); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 497 | if (push) { |
| 498 | evo_mthd(push, 0x0084, 1); |
| 499 | evo_data(push, 0x00000000); |
| 500 | evo_mthd(push, 0x0094, 1); |
| 501 | evo_data(push, 0x00000000); |
| 502 | evo_mthd(push, 0x00c0, 1); |
| 503 | evo_data(push, 0x00000000); |
| 504 | evo_mthd(push, 0x0080, 1); |
| 505 | evo_data(push, 0x00000000); |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 506 | evo_kick(push, flip.chan); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 507 | } |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 508 | |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 509 | nv_wait_cb(nvkm_device(device), nv50_display_flip_wait, &flip); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 510 | } |
| 511 | |
| 512 | int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 513 | nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb, |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 514 | struct nouveau_channel *chan, u32 swap_interval) |
| 515 | { |
| 516 | struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 517 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 518 | struct nv50_head *head = nv50_head(crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 519 | struct nv50_sync *sync = nv50_sync(crtc); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 520 | u32 *push; |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 521 | int ret; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 522 | |
| 523 | swap_interval <<= 4; |
| 524 | if (swap_interval == 0) |
| 525 | swap_interval |= 0x100; |
Ben Skeggs | f60b6e7 | 2013-03-19 15:20:00 +1000 | [diff] [blame] | 526 | if (chan == NULL) |
| 527 | evo_sync(crtc->dev); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 528 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 529 | push = evo_wait(sync, 128); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 530 | if (unlikely(push == NULL)) |
| 531 | return -EBUSY; |
| 532 | |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 533 | if (chan && chan->object->oclass < G82_CHANNEL_GPFIFO) { |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 534 | ret = RING_SPACE(chan, 8); |
| 535 | if (ret) |
| 536 | return ret; |
Ben Skeggs | 67f9718 | 2013-02-26 12:02:54 +1000 | [diff] [blame] | 537 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 538 | BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 539 | OUT_RING (chan, NvEvoSema0 + nv_crtc->index); |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 540 | OUT_RING (chan, sync->addr ^ 0x10); |
| 541 | BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1); |
| 542 | OUT_RING (chan, sync->data + 1); |
| 543 | BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_OFFSET, 2); |
| 544 | OUT_RING (chan, sync->addr); |
| 545 | OUT_RING (chan, sync->data); |
| 546 | } else |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 547 | if (chan && chan->object->oclass < FERMI_CHANNEL_GPFIFO) { |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 548 | u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr; |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 549 | ret = RING_SPACE(chan, 12); |
| 550 | if (ret) |
| 551 | return ret; |
Ben Skeggs | a34caf7 | 2013-02-14 09:28:37 +1000 | [diff] [blame] | 552 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 553 | BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 554 | OUT_RING (chan, chan->vram.handle); |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 555 | BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
| 556 | OUT_RING (chan, upper_32_bits(addr ^ 0x10)); |
| 557 | OUT_RING (chan, lower_32_bits(addr ^ 0x10)); |
| 558 | OUT_RING (chan, sync->data + 1); |
| 559 | OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG); |
| 560 | BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
| 561 | OUT_RING (chan, upper_32_bits(addr)); |
| 562 | OUT_RING (chan, lower_32_bits(addr)); |
| 563 | OUT_RING (chan, sync->data); |
| 564 | OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL); |
| 565 | } else |
| 566 | if (chan) { |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 567 | u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr; |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 568 | ret = RING_SPACE(chan, 10); |
| 569 | if (ret) |
| 570 | return ret; |
Ben Skeggs | 67f9718 | 2013-02-26 12:02:54 +1000 | [diff] [blame] | 571 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 572 | BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
| 573 | OUT_RING (chan, upper_32_bits(addr ^ 0x10)); |
| 574 | OUT_RING (chan, lower_32_bits(addr ^ 0x10)); |
| 575 | OUT_RING (chan, sync->data + 1); |
| 576 | OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG | |
| 577 | NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD); |
| 578 | BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); |
| 579 | OUT_RING (chan, upper_32_bits(addr)); |
| 580 | OUT_RING (chan, lower_32_bits(addr)); |
| 581 | OUT_RING (chan, sync->data); |
| 582 | OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL | |
| 583 | NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD); |
| 584 | } |
Ben Skeggs | 35bcf5d | 2012-04-30 11:34:10 -0500 | [diff] [blame] | 585 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 586 | if (chan) { |
| 587 | sync->addr ^= 0x10; |
| 588 | sync->data++; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 589 | FIRE_RING (chan); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 590 | } |
| 591 | |
| 592 | /* queue the flip */ |
| 593 | evo_mthd(push, 0x0100, 1); |
| 594 | evo_data(push, 0xfffe0000); |
| 595 | evo_mthd(push, 0x0084, 1); |
| 596 | evo_data(push, swap_interval); |
| 597 | if (!(swap_interval & 0x00000100)) { |
| 598 | evo_mthd(push, 0x00e0, 1); |
| 599 | evo_data(push, 0x40000000); |
| 600 | } |
| 601 | evo_mthd(push, 0x0088, 4); |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 602 | evo_data(push, sync->addr); |
| 603 | evo_data(push, sync->data++); |
| 604 | evo_data(push, sync->data); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 605 | evo_data(push, sync->base.sync.handle); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 606 | evo_mthd(push, 0x00a0, 2); |
| 607 | evo_data(push, 0x00000000); |
| 608 | evo_data(push, 0x00000000); |
| 609 | evo_mthd(push, 0x00c0, 1); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 610 | evo_data(push, nv_fb->r_handle); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 611 | evo_mthd(push, 0x0110, 2); |
| 612 | evo_data(push, 0x00000000); |
| 613 | evo_data(push, 0x00000000); |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 614 | if (nv50_vers(sync) < GF110_DISP_BASE_CHANNEL_DMA) { |
Ben Skeggs | ed5085a5 | 2012-11-16 13:16:51 +1000 | [diff] [blame] | 615 | evo_mthd(push, 0x0800, 5); |
| 616 | evo_data(push, nv_fb->nvbo->bo.offset >> 8); |
| 617 | evo_data(push, 0); |
| 618 | evo_data(push, (fb->height << 16) | fb->width); |
| 619 | evo_data(push, nv_fb->r_pitch); |
| 620 | evo_data(push, nv_fb->r_format); |
| 621 | } else { |
| 622 | evo_mthd(push, 0x0400, 5); |
| 623 | evo_data(push, nv_fb->nvbo->bo.offset >> 8); |
| 624 | evo_data(push, 0); |
| 625 | evo_data(push, (fb->height << 16) | fb->width); |
| 626 | evo_data(push, nv_fb->r_pitch); |
| 627 | evo_data(push, nv_fb->r_format); |
| 628 | } |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 629 | evo_mthd(push, 0x0080, 1); |
| 630 | evo_data(push, 0x00000000); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 631 | evo_kick(push, sync); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 632 | |
| 633 | nouveau_bo_ref(nv_fb->nvbo, &head->image); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 634 | return 0; |
| 635 | } |
| 636 | |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 637 | /****************************************************************************** |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 638 | * CRTC |
| 639 | *****************************************************************************/ |
| 640 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 641 | nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool update) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 642 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 643 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | de69185 | 2011-10-17 12:23:41 +1000 | [diff] [blame] | 644 | struct nouveau_connector *nv_connector; |
| 645 | struct drm_connector *connector; |
| 646 | u32 *push, mode = 0x00; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 647 | |
Ben Skeggs | 488ff20 | 2011-10-17 10:38:10 +1000 | [diff] [blame] | 648 | nv_connector = nouveau_crtc_connector_get(nv_crtc); |
Ben Skeggs | de69185 | 2011-10-17 12:23:41 +1000 | [diff] [blame] | 649 | connector = &nv_connector->base; |
| 650 | if (nv_connector->dithering_mode == DITHERING_MODE_AUTO) { |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 651 | if (nv_crtc->base.primary->fb->depth > connector->display_info.bpc * 3) |
Ben Skeggs | de69185 | 2011-10-17 12:23:41 +1000 | [diff] [blame] | 652 | mode = DITHERING_MODE_DYNAMIC2X2; |
| 653 | } else { |
| 654 | mode = nv_connector->dithering_mode; |
| 655 | } |
| 656 | |
| 657 | if (nv_connector->dithering_depth == DITHERING_DEPTH_AUTO) { |
| 658 | if (connector->display_info.bpc >= 8) |
| 659 | mode |= DITHERING_DEPTH_8BPC; |
| 660 | } else { |
| 661 | mode |= nv_connector->dithering_depth; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 662 | } |
| 663 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 664 | push = evo_wait(mast, 4); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 665 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 666 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 667 | evo_mthd(push, 0x08a0 + (nv_crtc->index * 0x0400), 1); |
| 668 | evo_data(push, mode); |
| 669 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 670 | if (nv50_vers(mast) < GK104_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 671 | evo_mthd(push, 0x0490 + (nv_crtc->index * 0x0300), 1); |
| 672 | evo_data(push, mode); |
| 673 | } else { |
| 674 | evo_mthd(push, 0x04a0 + (nv_crtc->index * 0x0300), 1); |
| 675 | evo_data(push, mode); |
| 676 | } |
| 677 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 678 | if (update) { |
| 679 | evo_mthd(push, 0x0080, 1); |
| 680 | evo_data(push, 0x00000000); |
| 681 | } |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 682 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 683 | } |
| 684 | |
| 685 | return 0; |
| 686 | } |
| 687 | |
| 688 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 689 | nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, bool update) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 690 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 691 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 692 | struct drm_display_mode *omode, *umode = &nv_crtc->base.mode; |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 693 | struct drm_crtc *crtc = &nv_crtc->base; |
Ben Skeggs | f3fdc52 | 2011-07-07 16:01:57 +1000 | [diff] [blame] | 694 | struct nouveau_connector *nv_connector; |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 695 | int mode = DRM_MODE_SCALE_NONE; |
| 696 | u32 oX, oY, *push; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 697 | |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 698 | /* start off at the resolution we programmed the crtc for, this |
| 699 | * effectively handles NONE/FULL scaling |
| 700 | */ |
Ben Skeggs | f3fdc52 | 2011-07-07 16:01:57 +1000 | [diff] [blame] | 701 | nv_connector = nouveau_crtc_connector_get(nv_crtc); |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 702 | if (nv_connector && nv_connector->native_mode) |
| 703 | mode = nv_connector->scaling_mode; |
Ben Skeggs | f3fdc52 | 2011-07-07 16:01:57 +1000 | [diff] [blame] | 704 | |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 705 | if (mode != DRM_MODE_SCALE_NONE) |
| 706 | omode = nv_connector->native_mode; |
| 707 | else |
| 708 | omode = umode; |
| 709 | |
| 710 | oX = omode->hdisplay; |
| 711 | oY = omode->vdisplay; |
| 712 | if (omode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 713 | oY *= 2; |
| 714 | |
| 715 | /* add overscan compensation if necessary, will keep the aspect |
| 716 | * ratio the same as the backend mode unless overridden by the |
| 717 | * user setting both hborder and vborder properties. |
| 718 | */ |
| 719 | if (nv_connector && ( nv_connector->underscan == UNDERSCAN_ON || |
| 720 | (nv_connector->underscan == UNDERSCAN_AUTO && |
| 721 | nv_connector->edid && |
| 722 | drm_detect_hdmi_monitor(nv_connector->edid)))) { |
| 723 | u32 bX = nv_connector->underscan_hborder; |
| 724 | u32 bY = nv_connector->underscan_vborder; |
| 725 | u32 aspect = (oY << 19) / oX; |
| 726 | |
| 727 | if (bX) { |
| 728 | oX -= (bX * 2); |
| 729 | if (bY) oY -= (bY * 2); |
| 730 | else oY = ((oX * aspect) + (aspect / 2)) >> 19; |
| 731 | } else { |
| 732 | oX -= (oX >> 4) + 32; |
| 733 | if (bY) oY -= (bY * 2); |
| 734 | else oY = ((oX * aspect) + (aspect / 2)) >> 19; |
Ben Skeggs | f3fdc52 | 2011-07-07 16:01:57 +1000 | [diff] [blame] | 735 | } |
| 736 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 737 | |
Ben Skeggs | 9285462 | 2011-11-11 23:49:06 +1000 | [diff] [blame] | 738 | /* handle CENTER/ASPECT scaling, taking into account the areas |
| 739 | * removed already for overscan compensation |
| 740 | */ |
| 741 | switch (mode) { |
| 742 | case DRM_MODE_SCALE_CENTER: |
| 743 | oX = min((u32)umode->hdisplay, oX); |
| 744 | oY = min((u32)umode->vdisplay, oY); |
| 745 | /* fall-through */ |
| 746 | case DRM_MODE_SCALE_ASPECT: |
| 747 | if (oY < oX) { |
| 748 | u32 aspect = (umode->hdisplay << 19) / umode->vdisplay; |
| 749 | oX = ((oY * aspect) + (aspect / 2)) >> 19; |
| 750 | } else { |
| 751 | u32 aspect = (umode->vdisplay << 19) / umode->hdisplay; |
| 752 | oY = ((oX * aspect) + (aspect / 2)) >> 19; |
| 753 | } |
| 754 | break; |
| 755 | default: |
| 756 | break; |
| 757 | } |
| 758 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 759 | push = evo_wait(mast, 8); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 760 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 761 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 762 | /*XXX: SCALE_CTRL_ACTIVE??? */ |
| 763 | evo_mthd(push, 0x08d8 + (nv_crtc->index * 0x400), 2); |
| 764 | evo_data(push, (oY << 16) | oX); |
| 765 | evo_data(push, (oY << 16) | oX); |
| 766 | evo_mthd(push, 0x08a4 + (nv_crtc->index * 0x400), 1); |
| 767 | evo_data(push, 0x00000000); |
| 768 | evo_mthd(push, 0x08c8 + (nv_crtc->index * 0x400), 1); |
| 769 | evo_data(push, umode->vdisplay << 16 | umode->hdisplay); |
| 770 | } else { |
| 771 | evo_mthd(push, 0x04c0 + (nv_crtc->index * 0x300), 3); |
| 772 | evo_data(push, (oY << 16) | oX); |
| 773 | evo_data(push, (oY << 16) | oX); |
| 774 | evo_data(push, (oY << 16) | oX); |
| 775 | evo_mthd(push, 0x0494 + (nv_crtc->index * 0x300), 1); |
| 776 | evo_data(push, 0x00000000); |
| 777 | evo_mthd(push, 0x04b8 + (nv_crtc->index * 0x300), 1); |
| 778 | evo_data(push, umode->vdisplay << 16 | umode->hdisplay); |
| 779 | } |
| 780 | |
| 781 | evo_kick(push, mast); |
| 782 | |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 783 | if (update) { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 784 | nv50_display_flip_stop(crtc); |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 785 | nv50_display_flip_next(crtc, crtc->primary->fb, |
| 786 | NULL, 1); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 787 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 788 | } |
| 789 | |
| 790 | return 0; |
| 791 | } |
| 792 | |
| 793 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 794 | nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update) |
Ben Skeggs | f9887d0 | 2012-11-21 13:03:42 +1000 | [diff] [blame] | 795 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 796 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | f9887d0 | 2012-11-21 13:03:42 +1000 | [diff] [blame] | 797 | u32 *push, hue, vib; |
| 798 | int adj; |
| 799 | |
| 800 | adj = (nv_crtc->color_vibrance > 0) ? 50 : 0; |
| 801 | vib = ((nv_crtc->color_vibrance * 2047 + adj) / 100) & 0xfff; |
| 802 | hue = ((nv_crtc->vibrant_hue * 2047) / 100) & 0xfff; |
| 803 | |
| 804 | push = evo_wait(mast, 16); |
| 805 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 806 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | f9887d0 | 2012-11-21 13:03:42 +1000 | [diff] [blame] | 807 | evo_mthd(push, 0x08a8 + (nv_crtc->index * 0x400), 1); |
| 808 | evo_data(push, (hue << 20) | (vib << 8)); |
| 809 | } else { |
| 810 | evo_mthd(push, 0x0498 + (nv_crtc->index * 0x300), 1); |
| 811 | evo_data(push, (hue << 20) | (vib << 8)); |
| 812 | } |
| 813 | |
| 814 | if (update) { |
| 815 | evo_mthd(push, 0x0080, 1); |
| 816 | evo_data(push, 0x00000000); |
| 817 | } |
| 818 | evo_kick(push, mast); |
| 819 | } |
| 820 | |
| 821 | return 0; |
| 822 | } |
| 823 | |
| 824 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 825 | nv50_crtc_set_image(struct nouveau_crtc *nv_crtc, struct drm_framebuffer *fb, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 826 | int x, int y, bool update) |
| 827 | { |
| 828 | struct nouveau_framebuffer *nvfb = nouveau_framebuffer(fb); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 829 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 830 | u32 *push; |
| 831 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 832 | push = evo_wait(mast, 16); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 833 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 834 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 835 | evo_mthd(push, 0x0860 + (nv_crtc->index * 0x400), 1); |
| 836 | evo_data(push, nvfb->nvbo->bo.offset >> 8); |
| 837 | evo_mthd(push, 0x0868 + (nv_crtc->index * 0x400), 3); |
| 838 | evo_data(push, (fb->height << 16) | fb->width); |
| 839 | evo_data(push, nvfb->r_pitch); |
| 840 | evo_data(push, nvfb->r_format); |
| 841 | evo_mthd(push, 0x08c0 + (nv_crtc->index * 0x400), 1); |
| 842 | evo_data(push, (y << 16) | x); |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 843 | if (nv50_vers(mast) > NV50_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 844 | evo_mthd(push, 0x0874 + (nv_crtc->index * 0x400), 1); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 845 | evo_data(push, nvfb->r_handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 846 | } |
| 847 | } else { |
| 848 | evo_mthd(push, 0x0460 + (nv_crtc->index * 0x300), 1); |
| 849 | evo_data(push, nvfb->nvbo->bo.offset >> 8); |
| 850 | evo_mthd(push, 0x0468 + (nv_crtc->index * 0x300), 4); |
| 851 | evo_data(push, (fb->height << 16) | fb->width); |
| 852 | evo_data(push, nvfb->r_pitch); |
| 853 | evo_data(push, nvfb->r_format); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 854 | evo_data(push, nvfb->r_handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 855 | evo_mthd(push, 0x04b0 + (nv_crtc->index * 0x300), 1); |
| 856 | evo_data(push, (y << 16) | x); |
| 857 | } |
| 858 | |
Ben Skeggs | a46232e | 2011-07-07 15:23:48 +1000 | [diff] [blame] | 859 | if (update) { |
| 860 | evo_mthd(push, 0x0080, 1); |
| 861 | evo_data(push, 0x00000000); |
| 862 | } |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 863 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 864 | } |
| 865 | |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 866 | nv_crtc->fb.handle = nvfb->r_handle; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 867 | return 0; |
| 868 | } |
| 869 | |
| 870 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 871 | nv50_crtc_cursor_show(struct nouveau_crtc *nv_crtc) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 872 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 873 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 874 | u32 *push = evo_wait(mast, 16); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 875 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 876 | if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 877 | evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2); |
| 878 | evo_data(push, 0x85000000); |
| 879 | evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8); |
| 880 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 881 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 882 | evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2); |
| 883 | evo_data(push, 0x85000000); |
| 884 | evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8); |
| 885 | evo_mthd(push, 0x089c + (nv_crtc->index * 0x400), 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 886 | evo_data(push, mast->base.vram.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 887 | } else { |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 888 | evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 2); |
| 889 | evo_data(push, 0x85000000); |
| 890 | evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8); |
| 891 | evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 892 | evo_data(push, mast->base.vram.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 893 | } |
| 894 | evo_kick(push, mast); |
| 895 | } |
| 896 | } |
| 897 | |
| 898 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 899 | nv50_crtc_cursor_hide(struct nouveau_crtc *nv_crtc) |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 900 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 901 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 902 | u32 *push = evo_wait(mast, 16); |
| 903 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 904 | if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 905 | evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 1); |
| 906 | evo_data(push, 0x05000000); |
| 907 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 908 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 909 | evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 1); |
| 910 | evo_data(push, 0x05000000); |
| 911 | evo_mthd(push, 0x089c + (nv_crtc->index * 0x400), 1); |
| 912 | evo_data(push, 0x00000000); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 913 | } else { |
| 914 | evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 1); |
| 915 | evo_data(push, 0x05000000); |
| 916 | evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1); |
| 917 | evo_data(push, 0x00000000); |
| 918 | } |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 919 | evo_kick(push, mast); |
| 920 | } |
| 921 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 922 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 923 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 924 | nv50_crtc_cursor_show_hide(struct nouveau_crtc *nv_crtc, bool show, bool update) |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 925 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 926 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 927 | |
| 928 | if (show) |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 929 | nv50_crtc_cursor_show(nv_crtc); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 930 | else |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 931 | nv50_crtc_cursor_hide(nv_crtc); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 932 | |
| 933 | if (update) { |
| 934 | u32 *push = evo_wait(mast, 2); |
| 935 | if (push) { |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 936 | evo_mthd(push, 0x0080, 1); |
| 937 | evo_data(push, 0x00000000); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 938 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 939 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 940 | } |
| 941 | } |
| 942 | |
| 943 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 944 | nv50_crtc_dpms(struct drm_crtc *crtc, int mode) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 945 | { |
| 946 | } |
| 947 | |
| 948 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 949 | nv50_crtc_prepare(struct drm_crtc *crtc) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 950 | { |
| 951 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 952 | struct nv50_mast *mast = nv50_mast(crtc->dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 953 | u32 *push; |
| 954 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 955 | nv50_display_flip_stop(crtc); |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 956 | |
Ben Skeggs | 56d237d | 2014-05-19 14:54:33 +1000 | [diff] [blame] | 957 | push = evo_wait(mast, 6); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 958 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 959 | if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 960 | evo_mthd(push, 0x0874 + (nv_crtc->index * 0x400), 1); |
| 961 | evo_data(push, 0x00000000); |
| 962 | evo_mthd(push, 0x0840 + (nv_crtc->index * 0x400), 1); |
| 963 | evo_data(push, 0x40000000); |
| 964 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 965 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 966 | evo_mthd(push, 0x0874 + (nv_crtc->index * 0x400), 1); |
| 967 | evo_data(push, 0x00000000); |
| 968 | evo_mthd(push, 0x0840 + (nv_crtc->index * 0x400), 1); |
| 969 | evo_data(push, 0x40000000); |
| 970 | evo_mthd(push, 0x085c + (nv_crtc->index * 0x400), 1); |
| 971 | evo_data(push, 0x00000000); |
| 972 | } else { |
| 973 | evo_mthd(push, 0x0474 + (nv_crtc->index * 0x300), 1); |
| 974 | evo_data(push, 0x00000000); |
| 975 | evo_mthd(push, 0x0440 + (nv_crtc->index * 0x300), 1); |
| 976 | evo_data(push, 0x03000000); |
| 977 | evo_mthd(push, 0x045c + (nv_crtc->index * 0x300), 1); |
| 978 | evo_data(push, 0x00000000); |
| 979 | } |
| 980 | |
| 981 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 982 | } |
| 983 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 984 | nv50_crtc_cursor_show_hide(nv_crtc, false, false); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 985 | } |
| 986 | |
| 987 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 988 | nv50_crtc_commit(struct drm_crtc *crtc) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 989 | { |
| 990 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 991 | struct nv50_mast *mast = nv50_mast(crtc->dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 992 | u32 *push; |
| 993 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 994 | push = evo_wait(mast, 32); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 995 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 996 | if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 997 | evo_mthd(push, 0x0874 + (nv_crtc->index * 0x400), 1); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 998 | evo_data(push, nv_crtc->fb.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 999 | evo_mthd(push, 0x0840 + (nv_crtc->index * 0x400), 2); |
| 1000 | evo_data(push, 0xc0000000); |
| 1001 | evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); |
| 1002 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1003 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1004 | evo_mthd(push, 0x0874 + (nv_crtc->index * 0x400), 1); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 1005 | evo_data(push, nv_crtc->fb.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1006 | evo_mthd(push, 0x0840 + (nv_crtc->index * 0x400), 2); |
| 1007 | evo_data(push, 0xc0000000); |
| 1008 | evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); |
| 1009 | evo_mthd(push, 0x085c + (nv_crtc->index * 0x400), 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 1010 | evo_data(push, mast->base.vram.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1011 | } else { |
| 1012 | evo_mthd(push, 0x0474 + (nv_crtc->index * 0x300), 1); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 1013 | evo_data(push, nv_crtc->fb.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1014 | evo_mthd(push, 0x0440 + (nv_crtc->index * 0x300), 4); |
| 1015 | evo_data(push, 0x83000000); |
| 1016 | evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); |
| 1017 | evo_data(push, 0x00000000); |
| 1018 | evo_data(push, 0x00000000); |
| 1019 | evo_mthd(push, 0x045c + (nv_crtc->index * 0x300), 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 1020 | evo_data(push, mast->base.vram.handle); |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1021 | evo_mthd(push, 0x0430 + (nv_crtc->index * 0x300), 1); |
| 1022 | evo_data(push, 0xffffff00); |
| 1023 | } |
| 1024 | |
| 1025 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1026 | } |
| 1027 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1028 | nv50_crtc_cursor_show_hide(nv_crtc, nv_crtc->cursor.visible, true); |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 1029 | nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1030 | } |
| 1031 | |
| 1032 | static bool |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1033 | nv50_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1034 | struct drm_display_mode *adjusted_mode) |
| 1035 | { |
Ben Skeggs | eb2e968 | 2014-01-24 10:13:23 +1000 | [diff] [blame] | 1036 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1037 | return true; |
| 1038 | } |
| 1039 | |
| 1040 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1041 | nv50_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1042 | { |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 1043 | struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->primary->fb); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1044 | struct nv50_head *head = nv50_head(crtc); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1045 | int ret; |
| 1046 | |
| 1047 | ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1048 | if (ret == 0) { |
| 1049 | if (head->image) |
| 1050 | nouveau_bo_unpin(head->image); |
| 1051 | nouveau_bo_ref(nvfb->nvbo, &head->image); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1052 | } |
| 1053 | |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1054 | return ret; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1055 | } |
| 1056 | |
| 1057 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1058 | nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1059 | struct drm_display_mode *mode, int x, int y, |
| 1060 | struct drm_framebuffer *old_fb) |
| 1061 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1062 | struct nv50_mast *mast = nv50_mast(crtc->dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1063 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
| 1064 | struct nouveau_connector *nv_connector; |
Ben Skeggs | 2d1d898 | 2011-11-11 23:39:22 +1000 | [diff] [blame] | 1065 | u32 ilace = (mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 1; |
| 1066 | u32 vscan = (mode->flags & DRM_MODE_FLAG_DBLSCAN) ? 2 : 1; |
| 1067 | u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks; |
| 1068 | u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks; |
| 1069 | u32 vblan2e = 0, vblan2s = 1; |
Ben Skeggs | 3488c57 | 2012-03-12 11:42:20 +1000 | [diff] [blame] | 1070 | u32 *push; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1071 | int ret; |
| 1072 | |
Ben Skeggs | 2d1d898 | 2011-11-11 23:39:22 +1000 | [diff] [blame] | 1073 | hactive = mode->htotal; |
| 1074 | hsynce = mode->hsync_end - mode->hsync_start - 1; |
| 1075 | hbackp = mode->htotal - mode->hsync_end; |
| 1076 | hblanke = hsynce + hbackp; |
| 1077 | hfrontp = mode->hsync_start - mode->hdisplay; |
| 1078 | hblanks = mode->htotal - hfrontp - 1; |
| 1079 | |
| 1080 | vactive = mode->vtotal * vscan / ilace; |
| 1081 | vsynce = ((mode->vsync_end - mode->vsync_start) * vscan / ilace) - 1; |
| 1082 | vbackp = (mode->vtotal - mode->vsync_end) * vscan / ilace; |
| 1083 | vblanke = vsynce + vbackp; |
| 1084 | vfrontp = (mode->vsync_start - mode->vdisplay) * vscan / ilace; |
| 1085 | vblanks = vactive - vfrontp - 1; |
| 1086 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) { |
| 1087 | vblan2e = vactive + vsynce + vbackp; |
| 1088 | vblan2s = vblan2e + (mode->vdisplay * vscan / ilace); |
| 1089 | vactive = (vactive * 2) + 1; |
Ben Skeggs | 2d1d898 | 2011-11-11 23:39:22 +1000 | [diff] [blame] | 1090 | } |
| 1091 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1092 | ret = nv50_crtc_swap_fbs(crtc, old_fb); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1093 | if (ret) |
| 1094 | return ret; |
| 1095 | |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1096 | push = evo_wait(mast, 64); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1097 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1098 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1099 | evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2); |
| 1100 | evo_data(push, 0x00800000 | mode->clock); |
| 1101 | evo_data(push, (ilace == 2) ? 2 : 0); |
| 1102 | evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 6); |
| 1103 | evo_data(push, 0x00000000); |
| 1104 | evo_data(push, (vactive << 16) | hactive); |
| 1105 | evo_data(push, ( vsynce << 16) | hsynce); |
| 1106 | evo_data(push, (vblanke << 16) | hblanke); |
| 1107 | evo_data(push, (vblanks << 16) | hblanks); |
| 1108 | evo_data(push, (vblan2e << 16) | vblan2s); |
| 1109 | evo_mthd(push, 0x082c + (nv_crtc->index * 0x400), 1); |
| 1110 | evo_data(push, 0x00000000); |
| 1111 | evo_mthd(push, 0x0900 + (nv_crtc->index * 0x400), 2); |
| 1112 | evo_data(push, 0x00000311); |
| 1113 | evo_data(push, 0x00000100); |
| 1114 | } else { |
| 1115 | evo_mthd(push, 0x0410 + (nv_crtc->index * 0x300), 6); |
| 1116 | evo_data(push, 0x00000000); |
| 1117 | evo_data(push, (vactive << 16) | hactive); |
| 1118 | evo_data(push, ( vsynce << 16) | hsynce); |
| 1119 | evo_data(push, (vblanke << 16) | hblanke); |
| 1120 | evo_data(push, (vblanks << 16) | hblanks); |
| 1121 | evo_data(push, (vblan2e << 16) | vblan2s); |
| 1122 | evo_mthd(push, 0x042c + (nv_crtc->index * 0x300), 1); |
| 1123 | evo_data(push, 0x00000000); /* ??? */ |
| 1124 | evo_mthd(push, 0x0450 + (nv_crtc->index * 0x300), 3); |
| 1125 | evo_data(push, mode->clock * 1000); |
| 1126 | evo_data(push, 0x00200000); /* ??? */ |
| 1127 | evo_data(push, mode->clock * 1000); |
| 1128 | evo_mthd(push, 0x04d0 + (nv_crtc->index * 0x300), 2); |
| 1129 | evo_data(push, 0x00000311); |
| 1130 | evo_data(push, 0x00000100); |
| 1131 | } |
| 1132 | |
| 1133 | evo_kick(push, mast); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1134 | } |
| 1135 | |
| 1136 | nv_connector = nouveau_crtc_connector_get(nv_crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1137 | nv50_crtc_set_dither(nv_crtc, false); |
| 1138 | nv50_crtc_set_scale(nv_crtc, false); |
| 1139 | nv50_crtc_set_color_vibrance(nv_crtc, false); |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 1140 | nv50_crtc_set_image(nv_crtc, crtc->primary->fb, x, y, false); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1141 | return 0; |
| 1142 | } |
| 1143 | |
| 1144 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1145 | nv50_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1146 | struct drm_framebuffer *old_fb) |
| 1147 | { |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 1148 | struct nouveau_drm *drm = nouveau_drm(crtc->dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1149 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
| 1150 | int ret; |
| 1151 | |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 1152 | if (!crtc->primary->fb) { |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 1153 | NV_DEBUG(drm, "No FB bound\n"); |
Ben Skeggs | 84e2ad8 | 2011-08-26 09:40:39 +1000 | [diff] [blame] | 1154 | return 0; |
| 1155 | } |
| 1156 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1157 | ret = nv50_crtc_swap_fbs(crtc, old_fb); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1158 | if (ret) |
| 1159 | return ret; |
| 1160 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1161 | nv50_display_flip_stop(crtc); |
Matt Roper | f4510a2 | 2014-04-01 15:22:40 -0700 | [diff] [blame] | 1162 | nv50_crtc_set_image(nv_crtc, crtc->primary->fb, x, y, true); |
| 1163 | nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1164 | return 0; |
| 1165 | } |
| 1166 | |
| 1167 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1168 | nv50_crtc_mode_set_base_atomic(struct drm_crtc *crtc, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1169 | struct drm_framebuffer *fb, int x, int y, |
| 1170 | enum mode_set_atomic state) |
| 1171 | { |
| 1172 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1173 | nv50_display_flip_stop(crtc); |
| 1174 | nv50_crtc_set_image(nv_crtc, fb, x, y, true); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1175 | return 0; |
| 1176 | } |
| 1177 | |
| 1178 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1179 | nv50_crtc_lut_load(struct drm_crtc *crtc) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1180 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1181 | struct nv50_disp *disp = nv50_disp(crtc->dev); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1182 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
| 1183 | void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo); |
| 1184 | int i; |
| 1185 | |
| 1186 | for (i = 0; i < 256; i++) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1187 | u16 r = nv_crtc->lut.r[i] >> 2; |
| 1188 | u16 g = nv_crtc->lut.g[i] >> 2; |
| 1189 | u16 b = nv_crtc->lut.b[i] >> 2; |
| 1190 | |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1191 | if (disp->disp->oclass < GF110_DISP) { |
Ben Skeggs | de8268c | 2012-11-16 10:24:31 +1000 | [diff] [blame] | 1192 | writew(r + 0x0000, lut + (i * 0x08) + 0); |
| 1193 | writew(g + 0x0000, lut + (i * 0x08) + 2); |
| 1194 | writew(b + 0x0000, lut + (i * 0x08) + 4); |
| 1195 | } else { |
| 1196 | writew(r + 0x6000, lut + (i * 0x20) + 0); |
| 1197 | writew(g + 0x6000, lut + (i * 0x20) + 2); |
| 1198 | writew(b + 0x6000, lut + (i * 0x20) + 4); |
| 1199 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1200 | } |
| 1201 | } |
| 1202 | |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1203 | static void |
| 1204 | nv50_crtc_disable(struct drm_crtc *crtc) |
| 1205 | { |
| 1206 | struct nv50_head *head = nv50_head(crtc); |
Ben Skeggs | efa366f | 2014-06-05 12:56:35 +1000 | [diff] [blame] | 1207 | evo_sync(crtc->dev); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1208 | if (head->image) |
| 1209 | nouveau_bo_unpin(head->image); |
| 1210 | nouveau_bo_ref(NULL, &head->image); |
| 1211 | } |
| 1212 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1213 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1214 | nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1215 | uint32_t handle, uint32_t width, uint32_t height) |
| 1216 | { |
| 1217 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
| 1218 | struct drm_device *dev = crtc->dev; |
| 1219 | struct drm_gem_object *gem; |
| 1220 | struct nouveau_bo *nvbo; |
| 1221 | bool visible = (handle != 0); |
| 1222 | int i, ret = 0; |
| 1223 | |
| 1224 | if (visible) { |
| 1225 | if (width != 64 || height != 64) |
| 1226 | return -EINVAL; |
| 1227 | |
| 1228 | gem = drm_gem_object_lookup(dev, file_priv, handle); |
| 1229 | if (unlikely(!gem)) |
| 1230 | return -ENOENT; |
| 1231 | nvbo = nouveau_gem_object(gem); |
| 1232 | |
| 1233 | ret = nouveau_bo_map(nvbo); |
| 1234 | if (ret == 0) { |
| 1235 | for (i = 0; i < 64 * 64; i++) { |
| 1236 | u32 v = nouveau_bo_rd32(nvbo, i); |
| 1237 | nouveau_bo_wr32(nv_crtc->cursor.nvbo, i, v); |
| 1238 | } |
| 1239 | nouveau_bo_unmap(nvbo); |
| 1240 | } |
| 1241 | |
| 1242 | drm_gem_object_unreference_unlocked(gem); |
| 1243 | } |
| 1244 | |
| 1245 | if (visible != nv_crtc->cursor.visible) { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1246 | nv50_crtc_cursor_show_hide(nv_crtc, visible, true); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1247 | nv_crtc->cursor.visible = visible; |
| 1248 | } |
| 1249 | |
| 1250 | return ret; |
| 1251 | } |
| 1252 | |
| 1253 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1254 | nv50_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1255 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1256 | struct nv50_curs *curs = nv50_curs(crtc); |
| 1257 | struct nv50_chan *chan = nv50_chan(curs); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 1258 | nvif_wr32(&chan->user, 0x0084, (y << 16) | (x & 0xffff)); |
| 1259 | nvif_wr32(&chan->user, 0x0080, 0x00000000); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1260 | return 0; |
| 1261 | } |
| 1262 | |
| 1263 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1264 | nv50_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1265 | uint32_t start, uint32_t size) |
| 1266 | { |
| 1267 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Dan Carpenter | bdefc8c | 2013-11-28 01:18:47 +0300 | [diff] [blame] | 1268 | u32 end = min_t(u32, start + size, 256); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1269 | u32 i; |
| 1270 | |
| 1271 | for (i = start; i < end; i++) { |
| 1272 | nv_crtc->lut.r[i] = r[i]; |
| 1273 | nv_crtc->lut.g[i] = g[i]; |
| 1274 | nv_crtc->lut.b[i] = b[i]; |
| 1275 | } |
| 1276 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1277 | nv50_crtc_lut_load(crtc); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1278 | } |
| 1279 | |
| 1280 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1281 | nv50_crtc_destroy(struct drm_crtc *crtc) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1282 | { |
| 1283 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1284 | struct nv50_disp *disp = nv50_disp(crtc->dev); |
| 1285 | struct nv50_head *head = nv50_head(crtc); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 1286 | struct nv50_fbdma *fbdma; |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1287 | |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 1288 | list_for_each_entry(fbdma, &disp->fbdma, head) { |
| 1289 | nvif_object_fini(&fbdma->base[nv_crtc->index]); |
| 1290 | } |
| 1291 | |
| 1292 | nv50_dmac_destroy(&head->ovly.base, disp->disp); |
| 1293 | nv50_pioc_destroy(&head->oimm.base); |
| 1294 | nv50_dmac_destroy(&head->sync.base, disp->disp); |
| 1295 | nv50_pioc_destroy(&head->curs.base); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1296 | |
| 1297 | /*XXX: this shouldn't be necessary, but the core doesn't call |
| 1298 | * disconnect() during the cleanup paths |
| 1299 | */ |
| 1300 | if (head->image) |
| 1301 | nouveau_bo_unpin(head->image); |
| 1302 | nouveau_bo_ref(NULL, &head->image); |
| 1303 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1304 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1305 | if (nv_crtc->cursor.nvbo) |
| 1306 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1307 | nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1308 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1309 | nouveau_bo_unmap(nv_crtc->lut.nvbo); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1310 | if (nv_crtc->lut.nvbo) |
| 1311 | nouveau_bo_unpin(nv_crtc->lut.nvbo); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1312 | nouveau_bo_ref(NULL, &nv_crtc->lut.nvbo); |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1313 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1314 | drm_crtc_cleanup(crtc); |
| 1315 | kfree(crtc); |
| 1316 | } |
| 1317 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1318 | static const struct drm_crtc_helper_funcs nv50_crtc_hfunc = { |
| 1319 | .dpms = nv50_crtc_dpms, |
| 1320 | .prepare = nv50_crtc_prepare, |
| 1321 | .commit = nv50_crtc_commit, |
| 1322 | .mode_fixup = nv50_crtc_mode_fixup, |
| 1323 | .mode_set = nv50_crtc_mode_set, |
| 1324 | .mode_set_base = nv50_crtc_mode_set_base, |
| 1325 | .mode_set_base_atomic = nv50_crtc_mode_set_base_atomic, |
| 1326 | .load_lut = nv50_crtc_lut_load, |
Ben Skeggs | 8dda53f | 2013-07-09 12:35:55 +1000 | [diff] [blame] | 1327 | .disable = nv50_crtc_disable, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1328 | }; |
| 1329 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1330 | static const struct drm_crtc_funcs nv50_crtc_func = { |
| 1331 | .cursor_set = nv50_crtc_cursor_set, |
| 1332 | .cursor_move = nv50_crtc_cursor_move, |
| 1333 | .gamma_set = nv50_crtc_gamma_set, |
Dave Airlie | 5addcf0 | 2012-09-10 14:20:51 +1000 | [diff] [blame] | 1334 | .set_config = nouveau_crtc_set_config, |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1335 | .destroy = nv50_crtc_destroy, |
Ben Skeggs | 3376ee3 | 2011-11-12 14:28:12 +1000 | [diff] [blame] | 1336 | .page_flip = nouveau_crtc_page_flip, |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1337 | }; |
| 1338 | |
Ben Skeggs | c20ab3e | 2011-08-25 14:09:43 +1000 | [diff] [blame] | 1339 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1340 | nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) |
Ben Skeggs | c20ab3e | 2011-08-25 14:09:43 +1000 | [diff] [blame] | 1341 | { |
| 1342 | } |
| 1343 | |
| 1344 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1345 | nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) |
Ben Skeggs | c20ab3e | 2011-08-25 14:09:43 +1000 | [diff] [blame] | 1346 | { |
| 1347 | } |
| 1348 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1349 | static int |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 1350 | nv50_crtc_create(struct drm_device *dev, int index) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1351 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1352 | struct nv50_disp *disp = nv50_disp(dev); |
| 1353 | struct nv50_head *head; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1354 | struct drm_crtc *crtc; |
| 1355 | int ret, i; |
| 1356 | |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1357 | head = kzalloc(sizeof(*head), GFP_KERNEL); |
| 1358 | if (!head) |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1359 | return -ENOMEM; |
| 1360 | |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1361 | head->base.index = index; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1362 | head->base.set_dither = nv50_crtc_set_dither; |
| 1363 | head->base.set_scale = nv50_crtc_set_scale; |
| 1364 | head->base.set_color_vibrance = nv50_crtc_set_color_vibrance; |
Ben Skeggs | f9887d0 | 2012-11-21 13:03:42 +1000 | [diff] [blame] | 1365 | head->base.color_vibrance = 50; |
| 1366 | head->base.vibrant_hue = 0; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1367 | head->base.cursor.set_offset = nv50_cursor_set_offset; |
| 1368 | head->base.cursor.set_pos = nv50_cursor_set_pos; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1369 | for (i = 0; i < 256; i++) { |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1370 | head->base.lut.r[i] = i << 8; |
| 1371 | head->base.lut.g[i] = i << 8; |
| 1372 | head->base.lut.b[i] = i << 8; |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1373 | } |
| 1374 | |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1375 | crtc = &head->base.base; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1376 | drm_crtc_init(dev, crtc, &nv50_crtc_func); |
| 1377 | drm_crtc_helper_add(crtc, &nv50_crtc_hfunc); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1378 | drm_mode_crtc_set_gamma_size(crtc, 256); |
| 1379 | |
Ben Skeggs | 8ea0d4a | 2011-07-07 14:49:24 +1000 | [diff] [blame] | 1380 | ret = nouveau_bo_new(dev, 8192, 0x100, TTM_PL_FLAG_VRAM, |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1381 | 0, 0x0000, NULL, &head->base.lut.nvbo); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1382 | if (!ret) { |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1383 | ret = nouveau_bo_pin(head->base.lut.nvbo, TTM_PL_FLAG_VRAM); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1384 | if (!ret) { |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1385 | ret = nouveau_bo_map(head->base.lut.nvbo); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1386 | if (ret) |
| 1387 | nouveau_bo_unpin(head->base.lut.nvbo); |
| 1388 | } |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1389 | if (ret) |
Ben Skeggs | dd0e3d5 | 2012-10-16 14:00:31 +1000 | [diff] [blame] | 1390 | nouveau_bo_ref(NULL, &head->base.lut.nvbo); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1391 | } |
| 1392 | |
| 1393 | if (ret) |
| 1394 | goto out; |
| 1395 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1396 | nv50_crtc_lut_load(crtc); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1397 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1398 | /* allocate cursor resources */ |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 1399 | ret = nv50_curs_create(disp->disp, index, &head->curs); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1400 | if (ret) |
| 1401 | goto out; |
| 1402 | |
| 1403 | ret = nouveau_bo_new(dev, 64 * 64 * 4, 0x100, TTM_PL_FLAG_VRAM, |
| 1404 | 0, 0x0000, NULL, &head->base.cursor.nvbo); |
| 1405 | if (!ret) { |
| 1406 | ret = nouveau_bo_pin(head->base.cursor.nvbo, TTM_PL_FLAG_VRAM); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1407 | if (!ret) { |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1408 | ret = nouveau_bo_map(head->base.cursor.nvbo); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 1409 | if (ret) |
| 1410 | nouveau_bo_unpin(head->base.lut.nvbo); |
| 1411 | } |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1412 | if (ret) |
| 1413 | nouveau_bo_ref(NULL, &head->base.cursor.nvbo); |
| 1414 | } |
| 1415 | |
| 1416 | if (ret) |
| 1417 | goto out; |
| 1418 | |
| 1419 | /* allocate page flip / sync resources */ |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 1420 | ret = nv50_base_create(disp->disp, index, disp->sync->bo.offset, |
| 1421 | &head->sync); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1422 | if (ret) |
| 1423 | goto out; |
| 1424 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 1425 | head->sync.addr = EVO_FLIP_SEM0(index); |
| 1426 | head->sync.data = 0x00000000; |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1427 | |
| 1428 | /* allocate overlay resources */ |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 1429 | ret = nv50_oimm_create(disp->disp, index, &head->oimm); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1430 | if (ret) |
| 1431 | goto out; |
| 1432 | |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 1433 | ret = nv50_ovly_create(disp->disp, index, disp->sync->bo.offset, |
| 1434 | &head->ovly); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 1435 | if (ret) |
| 1436 | goto out; |
| 1437 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1438 | out: |
| 1439 | if (ret) |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1440 | nv50_crtc_destroy(crtc); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 1441 | return ret; |
| 1442 | } |
| 1443 | |
| 1444 | /****************************************************************************** |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 1445 | * DAC |
| 1446 | *****************************************************************************/ |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1447 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1448 | nv50_dac_dpms(struct drm_encoder *encoder, int mode) |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1449 | { |
| 1450 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1451 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | bf0eb89 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1452 | struct { |
| 1453 | struct nv50_disp_mthd_v1 base; |
| 1454 | struct nv50_disp_dac_pwr_v0 pwr; |
| 1455 | } args = { |
| 1456 | .base.version = 1, |
| 1457 | .base.method = NV50_DISP_MTHD_V1_DAC_PWR, |
| 1458 | .base.hasht = nv_encoder->dcb->hasht, |
| 1459 | .base.hashm = nv_encoder->dcb->hashm, |
| 1460 | .pwr.state = 1, |
| 1461 | .pwr.data = 1, |
| 1462 | .pwr.vsync = (mode != DRM_MODE_DPMS_SUSPEND && |
| 1463 | mode != DRM_MODE_DPMS_OFF), |
| 1464 | .pwr.hsync = (mode != DRM_MODE_DPMS_STANDBY && |
| 1465 | mode != DRM_MODE_DPMS_OFF), |
| 1466 | }; |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1467 | |
Ben Skeggs | bf0eb89 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1468 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1469 | } |
| 1470 | |
| 1471 | static bool |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1472 | nv50_dac_mode_fixup(struct drm_encoder *encoder, |
Laurent Pinchart | e811f5a | 2012-07-17 17:56:50 +0200 | [diff] [blame] | 1473 | const struct drm_display_mode *mode, |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1474 | struct drm_display_mode *adjusted_mode) |
| 1475 | { |
| 1476 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1477 | struct nouveau_connector *nv_connector; |
| 1478 | |
| 1479 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 1480 | if (nv_connector && nv_connector->native_mode) { |
| 1481 | if (nv_connector->scaling_mode != DRM_MODE_SCALE_NONE) { |
| 1482 | int id = adjusted_mode->base.id; |
| 1483 | *adjusted_mode = *nv_connector->native_mode; |
| 1484 | adjusted_mode->base.id = id; |
| 1485 | } |
| 1486 | } |
| 1487 | |
| 1488 | return true; |
| 1489 | } |
| 1490 | |
| 1491 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1492 | nv50_dac_commit(struct drm_encoder *encoder) |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1493 | { |
| 1494 | } |
| 1495 | |
| 1496 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1497 | nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1498 | struct drm_display_mode *adjusted_mode) |
| 1499 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1500 | struct nv50_mast *mast = nv50_mast(encoder->dev); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1501 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1502 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1503 | u32 *push; |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1504 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1505 | nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1506 | |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1507 | push = evo_wait(mast, 8); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1508 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1509 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1510 | u32 syncs = 0x00000000; |
| 1511 | |
| 1512 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 1513 | syncs |= 0x00000001; |
| 1514 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 1515 | syncs |= 0x00000002; |
| 1516 | |
| 1517 | evo_mthd(push, 0x0400 + (nv_encoder->or * 0x080), 2); |
| 1518 | evo_data(push, 1 << nv_crtc->index); |
| 1519 | evo_data(push, syncs); |
| 1520 | } else { |
| 1521 | u32 magic = 0x31ec6000 | (nv_crtc->index << 25); |
| 1522 | u32 syncs = 0x00000001; |
| 1523 | |
| 1524 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 1525 | syncs |= 0x00000008; |
| 1526 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 1527 | syncs |= 0x00000010; |
| 1528 | |
| 1529 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
| 1530 | magic |= 0x00000001; |
| 1531 | |
| 1532 | evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2); |
| 1533 | evo_data(push, syncs); |
| 1534 | evo_data(push, magic); |
| 1535 | evo_mthd(push, 0x0180 + (nv_encoder->or * 0x020), 1); |
| 1536 | evo_data(push, 1 << nv_crtc->index); |
| 1537 | } |
| 1538 | |
| 1539 | evo_kick(push, mast); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1540 | } |
| 1541 | |
| 1542 | nv_encoder->crtc = encoder->crtc; |
| 1543 | } |
| 1544 | |
| 1545 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1546 | nv50_dac_disconnect(struct drm_encoder *encoder) |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1547 | { |
| 1548 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1549 | struct nv50_mast *mast = nv50_mast(encoder->dev); |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1550 | const int or = nv_encoder->or; |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1551 | u32 *push; |
| 1552 | |
| 1553 | if (nv_encoder->crtc) { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1554 | nv50_crtc_prepare(nv_encoder->crtc); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1555 | |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1556 | push = evo_wait(mast, 4); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1557 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1558 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1559 | evo_mthd(push, 0x0400 + (or * 0x080), 1); |
| 1560 | evo_data(push, 0x00000000); |
| 1561 | } else { |
| 1562 | evo_mthd(push, 0x0180 + (or * 0x020), 1); |
| 1563 | evo_data(push, 0x00000000); |
| 1564 | } |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1565 | evo_kick(push, mast); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1566 | } |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1567 | } |
Ben Skeggs | 97b19b5 | 2012-11-16 11:21:37 +1000 | [diff] [blame] | 1568 | |
| 1569 | nv_encoder->crtc = NULL; |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1570 | } |
| 1571 | |
Ben Skeggs | b6d8e7e | 2011-07-07 09:51:29 +1000 | [diff] [blame] | 1572 | static enum drm_connector_status |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1573 | nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector) |
Ben Skeggs | b6d8e7e | 2011-07-07 09:51:29 +1000 | [diff] [blame] | 1574 | { |
Ben Skeggs | c4abd31 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1575 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1576 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | c4abd31 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1577 | struct { |
| 1578 | struct nv50_disp_mthd_v1 base; |
| 1579 | struct nv50_disp_dac_load_v0 load; |
| 1580 | } args = { |
| 1581 | .base.version = 1, |
| 1582 | .base.method = NV50_DISP_MTHD_V1_DAC_LOAD, |
| 1583 | .base.hasht = nv_encoder->dcb->hasht, |
| 1584 | .base.hashm = nv_encoder->dcb->hashm, |
| 1585 | }; |
| 1586 | int ret; |
Ben Skeggs | b681993 | 2011-07-08 11:14:50 +1000 | [diff] [blame] | 1587 | |
Ben Skeggs | c4abd31 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1588 | args.load.data = nouveau_drm(encoder->dev)->vbios.dactestval; |
| 1589 | if (args.load.data == 0) |
| 1590 | args.load.data = 340; |
| 1591 | |
| 1592 | ret = nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
| 1593 | if (ret || !args.load.load) |
Ben Skeggs | 35b21d3 | 2012-11-08 12:08:55 +1000 | [diff] [blame] | 1594 | return connector_status_disconnected; |
Ben Skeggs | b681993 | 2011-07-08 11:14:50 +1000 | [diff] [blame] | 1595 | |
Ben Skeggs | 35b21d3 | 2012-11-08 12:08:55 +1000 | [diff] [blame] | 1596 | return connector_status_connected; |
Ben Skeggs | b6d8e7e | 2011-07-07 09:51:29 +1000 | [diff] [blame] | 1597 | } |
| 1598 | |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1599 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1600 | nv50_dac_destroy(struct drm_encoder *encoder) |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1601 | { |
| 1602 | drm_encoder_cleanup(encoder); |
| 1603 | kfree(encoder); |
| 1604 | } |
| 1605 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1606 | static const struct drm_encoder_helper_funcs nv50_dac_hfunc = { |
| 1607 | .dpms = nv50_dac_dpms, |
| 1608 | .mode_fixup = nv50_dac_mode_fixup, |
| 1609 | .prepare = nv50_dac_disconnect, |
| 1610 | .commit = nv50_dac_commit, |
| 1611 | .mode_set = nv50_dac_mode_set, |
| 1612 | .disable = nv50_dac_disconnect, |
| 1613 | .get_crtc = nv50_display_crtc_get, |
| 1614 | .detect = nv50_dac_detect |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1615 | }; |
| 1616 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1617 | static const struct drm_encoder_funcs nv50_dac_func = { |
| 1618 | .destroy = nv50_dac_destroy, |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1619 | }; |
| 1620 | |
| 1621 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1622 | nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe) |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1623 | { |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 1624 | struct nouveau_drm *drm = nouveau_drm(connector->dev); |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 1625 | struct nouveau_i2c *i2c = nvkm_i2c(&drm->device); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1626 | struct nouveau_encoder *nv_encoder; |
| 1627 | struct drm_encoder *encoder; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 1628 | int type = DRM_MODE_ENCODER_DAC; |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1629 | |
| 1630 | nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); |
| 1631 | if (!nv_encoder) |
| 1632 | return -ENOMEM; |
| 1633 | nv_encoder->dcb = dcbe; |
| 1634 | nv_encoder->or = ffs(dcbe->or) - 1; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 1635 | nv_encoder->i2c = i2c->find(i2c, dcbe->i2c_index); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1636 | |
| 1637 | encoder = to_drm_encoder(nv_encoder); |
| 1638 | encoder->possible_crtcs = dcbe->heads; |
| 1639 | encoder->possible_clones = 0; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 1640 | drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1641 | drm_encoder_helper_add(encoder, &nv50_dac_hfunc); |
Ben Skeggs | 8eaa966 | 2011-07-06 15:25:47 +1000 | [diff] [blame] | 1642 | |
| 1643 | drm_mode_connector_attach_encoder(connector, encoder); |
| 1644 | return 0; |
| 1645 | } |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 1646 | |
| 1647 | /****************************************************************************** |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1648 | * Audio |
| 1649 | *****************************************************************************/ |
| 1650 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1651 | nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1652 | { |
| 1653 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1654 | struct nouveau_connector *nv_connector; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1655 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | 120b0c3 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1656 | struct { |
| 1657 | struct nv50_disp_mthd_v1 base; |
| 1658 | struct nv50_disp_sor_hda_eld_v0 eld; |
| 1659 | u8 data[sizeof(nv_connector->base.eld)]; |
| 1660 | } args = { |
| 1661 | .base.version = 1, |
| 1662 | .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, |
| 1663 | .base.hasht = nv_encoder->dcb->hasht, |
| 1664 | .base.hashm = nv_encoder->dcb->hashm, |
| 1665 | }; |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1666 | |
| 1667 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 1668 | if (!drm_detect_monitor_audio(nv_connector->edid)) |
| 1669 | return; |
| 1670 | |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1671 | drm_edid_to_eld(&nv_connector->base, nv_connector->edid); |
Ben Skeggs | 120b0c3 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1672 | memcpy(args.data, nv_connector->base.eld, sizeof(args.data)); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1673 | |
Ben Skeggs | 120b0c3 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1674 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1675 | } |
| 1676 | |
| 1677 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1678 | nv50_audio_disconnect(struct drm_encoder *encoder) |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1679 | { |
| 1680 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1681 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | 120b0c3 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1682 | struct { |
| 1683 | struct nv50_disp_mthd_v1 base; |
| 1684 | struct nv50_disp_sor_hda_eld_v0 eld; |
| 1685 | } args = { |
| 1686 | .base.version = 1, |
| 1687 | .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, |
| 1688 | .base.hasht = nv_encoder->dcb->hasht, |
| 1689 | .base.hashm = nv_encoder->dcb->hashm, |
| 1690 | }; |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1691 | |
Ben Skeggs | 120b0c3 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1692 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1693 | } |
| 1694 | |
| 1695 | /****************************************************************************** |
| 1696 | * HDMI |
| 1697 | *****************************************************************************/ |
| 1698 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1699 | nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1700 | { |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1701 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1702 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1703 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1704 | struct { |
| 1705 | struct nv50_disp_mthd_v1 base; |
| 1706 | struct nv50_disp_sor_hdmi_pwr_v0 pwr; |
| 1707 | } args = { |
| 1708 | .base.version = 1, |
| 1709 | .base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR, |
| 1710 | .base.hasht = nv_encoder->dcb->hasht, |
| 1711 | .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) | |
| 1712 | (0x0100 << nv_crtc->index), |
| 1713 | .pwr.state = 1, |
| 1714 | .pwr.rekey = 56, /* binary driver, and tegra, constant */ |
| 1715 | }; |
| 1716 | struct nouveau_connector *nv_connector; |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1717 | u32 max_ac_packet; |
| 1718 | |
| 1719 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 1720 | if (!drm_detect_hdmi_monitor(nv_connector->edid)) |
| 1721 | return; |
| 1722 | |
| 1723 | max_ac_packet = mode->htotal - mode->hdisplay; |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1724 | max_ac_packet -= args.pwr.rekey; |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1725 | max_ac_packet -= 18; /* constant from tegra */ |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1726 | args.pwr.max_ac_packet = max_ac_packet / 32; |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1727 | |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1728 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1729 | nv50_audio_mode_set(encoder, mode); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1730 | } |
| 1731 | |
| 1732 | static void |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1733 | nv50_hdmi_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1734 | { |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1735 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1736 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1737 | struct { |
| 1738 | struct nv50_disp_mthd_v1 base; |
| 1739 | struct nv50_disp_sor_hdmi_pwr_v0 pwr; |
| 1740 | } args = { |
| 1741 | .base.version = 1, |
| 1742 | .base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR, |
| 1743 | .base.hasht = nv_encoder->dcb->hasht, |
| 1744 | .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) | |
| 1745 | (0x0100 << nv_crtc->index), |
| 1746 | }; |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1747 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1748 | nv50_audio_disconnect(encoder); |
Ben Skeggs | 64d9cc0 | 2011-11-11 19:51:20 +1000 | [diff] [blame] | 1749 | |
Ben Skeggs | e00f223 | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1750 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1751 | } |
| 1752 | |
| 1753 | /****************************************************************************** |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 1754 | * SOR |
| 1755 | *****************************************************************************/ |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1756 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1757 | nv50_sor_dpms(struct drm_encoder *encoder, int mode) |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1758 | { |
| 1759 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | d55b4af | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1760 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
| 1761 | struct { |
| 1762 | struct nv50_disp_mthd_v1 base; |
| 1763 | struct nv50_disp_sor_pwr_v0 pwr; |
| 1764 | } args = { |
| 1765 | .base.version = 1, |
| 1766 | .base.method = NV50_DISP_MTHD_V1_SOR_PWR, |
| 1767 | .base.hasht = nv_encoder->dcb->hasht, |
| 1768 | .base.hashm = nv_encoder->dcb->hashm, |
| 1769 | .pwr.state = mode == DRM_MODE_DPMS_ON, |
| 1770 | }; |
Ben Skeggs | c02ed2b | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1771 | struct { |
| 1772 | struct nv50_disp_mthd_v1 base; |
| 1773 | struct nv50_disp_sor_dp_pwr_v0 pwr; |
| 1774 | } link = { |
| 1775 | .base.version = 1, |
| 1776 | .base.method = NV50_DISP_MTHD_V1_SOR_DP_PWR, |
| 1777 | .base.hasht = nv_encoder->dcb->hasht, |
| 1778 | .base.hashm = nv_encoder->dcb->hashm, |
| 1779 | .pwr.state = mode == DRM_MODE_DPMS_ON, |
| 1780 | }; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1781 | struct drm_device *dev = encoder->dev; |
| 1782 | struct drm_encoder *partner; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1783 | |
| 1784 | nv_encoder->last_dpms = mode; |
| 1785 | |
| 1786 | list_for_each_entry(partner, &dev->mode_config.encoder_list, head) { |
| 1787 | struct nouveau_encoder *nv_partner = nouveau_encoder(partner); |
| 1788 | |
| 1789 | if (partner->encoder_type != DRM_MODE_ENCODER_TMDS) |
| 1790 | continue; |
| 1791 | |
| 1792 | if (nv_partner != nv_encoder && |
Ben Skeggs | 26cfa81 | 2011-11-17 09:10:02 +1000 | [diff] [blame] | 1793 | nv_partner->dcb->or == nv_encoder->dcb->or) { |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1794 | if (nv_partner->last_dpms == DRM_MODE_DPMS_ON) |
| 1795 | return; |
| 1796 | break; |
| 1797 | } |
| 1798 | } |
| 1799 | |
Ben Skeggs | 4874322 | 2014-05-31 01:48:06 +1000 | [diff] [blame] | 1800 | if (nv_encoder->dcb->type == DCB_OUTPUT_DP) { |
Ben Skeggs | d55b4af | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1801 | args.pwr.state = 1; |
| 1802 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | c02ed2b | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1803 | nvif_mthd(disp->disp, 0, &link, sizeof(link)); |
Ben Skeggs | 4874322 | 2014-05-31 01:48:06 +1000 | [diff] [blame] | 1804 | } else { |
Ben Skeggs | d55b4af | 2014-08-10 04:10:26 +1000 | [diff] [blame] | 1805 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | 4874322 | 2014-05-31 01:48:06 +1000 | [diff] [blame] | 1806 | } |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1807 | } |
| 1808 | |
| 1809 | static bool |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1810 | nv50_sor_mode_fixup(struct drm_encoder *encoder, |
Laurent Pinchart | e811f5a | 2012-07-17 17:56:50 +0200 | [diff] [blame] | 1811 | const struct drm_display_mode *mode, |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1812 | struct drm_display_mode *adjusted_mode) |
| 1813 | { |
| 1814 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1815 | struct nouveau_connector *nv_connector; |
| 1816 | |
| 1817 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 1818 | if (nv_connector && nv_connector->native_mode) { |
| 1819 | if (nv_connector->scaling_mode != DRM_MODE_SCALE_NONE) { |
| 1820 | int id = adjusted_mode->base.id; |
| 1821 | *adjusted_mode = *nv_connector->native_mode; |
| 1822 | adjusted_mode->base.id = id; |
| 1823 | } |
| 1824 | } |
| 1825 | |
| 1826 | return true; |
| 1827 | } |
| 1828 | |
| 1829 | static void |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1830 | nv50_sor_ctrl(struct nouveau_encoder *nv_encoder, u32 mask, u32 data) |
| 1831 | { |
| 1832 | struct nv50_mast *mast = nv50_mast(nv_encoder->base.base.dev); |
| 1833 | u32 temp = (nv_encoder->ctrl & ~mask) | (data & mask), *push; |
| 1834 | if (temp != nv_encoder->ctrl && (push = evo_wait(mast, 2))) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1835 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1836 | evo_mthd(push, 0x0600 + (nv_encoder->or * 0x40), 1); |
| 1837 | evo_data(push, (nv_encoder->ctrl = temp)); |
| 1838 | } else { |
| 1839 | evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 1); |
| 1840 | evo_data(push, (nv_encoder->ctrl = temp)); |
| 1841 | } |
| 1842 | evo_kick(push, mast); |
| 1843 | } |
| 1844 | } |
| 1845 | |
| 1846 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1847 | nv50_sor_disconnect(struct drm_encoder *encoder) |
Ben Skeggs | 4cbb0f8 | 2012-03-12 15:23:44 +1000 | [diff] [blame] | 1848 | { |
| 1849 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1850 | struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc); |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1851 | |
| 1852 | nv_encoder->last_dpms = DRM_MODE_DPMS_OFF; |
| 1853 | nv_encoder->crtc = NULL; |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1854 | |
| 1855 | if (nv_crtc) { |
| 1856 | nv50_crtc_prepare(&nv_crtc->base); |
| 1857 | nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0); |
| 1858 | nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc); |
| 1859 | } |
Ben Skeggs | 4cbb0f8 | 2012-03-12 15:23:44 +1000 | [diff] [blame] | 1860 | } |
| 1861 | |
| 1862 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1863 | nv50_sor_commit(struct drm_encoder *encoder) |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1864 | { |
| 1865 | } |
| 1866 | |
| 1867 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1868 | nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1869 | struct drm_display_mode *mode) |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1870 | { |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1871 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 1872 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); |
| 1873 | struct { |
| 1874 | struct nv50_disp_mthd_v1 base; |
| 1875 | struct nv50_disp_sor_lvds_script_v0 lvds; |
| 1876 | } lvds = { |
| 1877 | .base.version = 1, |
| 1878 | .base.method = NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT, |
| 1879 | .base.hasht = nv_encoder->dcb->hasht, |
| 1880 | .base.hashm = nv_encoder->dcb->hashm, |
| 1881 | }; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 1882 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
| 1883 | struct nv50_mast *mast = nv50_mast(encoder->dev); |
Ben Skeggs | 78951d2 | 2011-11-11 18:13:13 +1000 | [diff] [blame] | 1884 | struct drm_device *dev = encoder->dev; |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 1885 | struct nouveau_drm *drm = nouveau_drm(dev); |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1886 | struct nouveau_connector *nv_connector; |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 1887 | struct nvbios *bios = &drm->vbios; |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1888 | u32 mask, ctrl; |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1889 | u8 owner = 1 << nv_crtc->index; |
| 1890 | u8 proto = 0xf; |
| 1891 | u8 depth = 0x0; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1892 | |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1893 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1894 | nv_encoder->crtc = encoder->crtc; |
| 1895 | |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1896 | switch (nv_encoder->dcb->type) { |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 1897 | case DCB_OUTPUT_TMDS: |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1898 | if (nv_encoder->dcb->sorconf.link & 1) { |
| 1899 | if (mode->clock < 165000) |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1900 | proto = 0x1; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1901 | else |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1902 | proto = 0x5; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1903 | } else { |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1904 | proto = 0x2; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1905 | } |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1906 | |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1907 | nv50_hdmi_mode_set(&nv_encoder->base.base, mode); |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1908 | break; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 1909 | case DCB_OUTPUT_LVDS: |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1910 | proto = 0x0; |
| 1911 | |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1912 | if (bios->fp_no_ddc) { |
| 1913 | if (bios->fp.dual_link) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1914 | lvds.lvds.script |= 0x0100; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1915 | if (bios->fp.if_is_24bit) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1916 | lvds.lvds.script |= 0x0200; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1917 | } else { |
Ben Skeggs | befb51e | 2011-11-18 10:23:59 +1000 | [diff] [blame] | 1918 | if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) { |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1919 | if (((u8 *)nv_connector->edid)[121] == 2) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1920 | lvds.lvds.script |= 0x0100; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1921 | } else |
| 1922 | if (mode->clock >= bios->fp.duallink_transition_clk) { |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1923 | lvds.lvds.script |= 0x0100; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1924 | } |
| 1925 | |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1926 | if (lvds.lvds.script & 0x0100) { |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1927 | if (bios->fp.strapless_is_24bit & 2) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1928 | lvds.lvds.script |= 0x0200; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1929 | } else { |
| 1930 | if (bios->fp.strapless_is_24bit & 1) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1931 | lvds.lvds.script |= 0x0200; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1932 | } |
| 1933 | |
| 1934 | if (nv_connector->base.display_info.bpc == 8) |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1935 | lvds.lvds.script |= 0x0200; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1936 | } |
Ben Skeggs | 4a230fa | 2012-11-09 11:25:37 +1000 | [diff] [blame] | 1937 | |
Ben Skeggs | a3761fa | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1938 | nvif_mthd(disp->disp, 0, &lvds, sizeof(lvds)); |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1939 | break; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 1940 | case DCB_OUTPUT_DP: |
Ben Skeggs | 3488c57 | 2012-03-12 11:42:20 +1000 | [diff] [blame] | 1941 | if (nv_connector->base.display_info.bpc == 6) { |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1942 | nv_encoder->dp.datarate = mode->clock * 18 / 8; |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1943 | depth = 0x2; |
Ben Skeggs | bf2c886 | 2012-11-21 14:49:54 +1000 | [diff] [blame] | 1944 | } else |
| 1945 | if (nv_connector->base.display_info.bpc == 8) { |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1946 | nv_encoder->dp.datarate = mode->clock * 24 / 8; |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1947 | depth = 0x5; |
Ben Skeggs | bf2c886 | 2012-11-21 14:49:54 +1000 | [diff] [blame] | 1948 | } else { |
| 1949 | nv_encoder->dp.datarate = mode->clock * 30 / 8; |
| 1950 | depth = 0x6; |
Ben Skeggs | 3488c57 | 2012-03-12 11:42:20 +1000 | [diff] [blame] | 1951 | } |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1952 | |
| 1953 | if (nv_encoder->dcb->sorconf.link & 1) |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1954 | proto = 0x8; |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1955 | else |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1956 | proto = 0x9; |
Ben Skeggs | 6e83fda | 2012-03-11 01:28:48 +1000 | [diff] [blame] | 1957 | break; |
Ben Skeggs | 3b6d83d1 | 2011-07-08 12:52:14 +1000 | [diff] [blame] | 1958 | default: |
| 1959 | BUG_ON(1); |
| 1960 | break; |
| 1961 | } |
Ben Skeggs | ff8ff50 | 2011-07-08 11:53:37 +1000 | [diff] [blame] | 1962 | |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1963 | nv50_sor_dpms(&nv_encoder->base.base, DRM_MODE_DPMS_ON); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1964 | |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 1965 | if (nv50_vers(mast) >= GF110_DISP) { |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1966 | u32 *push = evo_wait(mast, 3); |
| 1967 | if (push) { |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1968 | u32 magic = 0x31ec6000 | (nv_crtc->index << 25); |
| 1969 | u32 syncs = 0x00000001; |
| 1970 | |
| 1971 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 1972 | syncs |= 0x00000008; |
| 1973 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 1974 | syncs |= 0x00000010; |
| 1975 | |
| 1976 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
| 1977 | magic |= 0x00000001; |
| 1978 | |
| 1979 | evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2); |
| 1980 | evo_data(push, syncs | (depth << 6)); |
| 1981 | evo_data(push, magic); |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1982 | evo_kick(push, mast); |
Ben Skeggs | 419e8dc | 2012-11-16 11:40:34 +1000 | [diff] [blame] | 1983 | } |
| 1984 | |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1985 | ctrl = proto << 8; |
| 1986 | mask = 0x00000f00; |
| 1987 | } else { |
| 1988 | ctrl = (depth << 16) | (proto << 8); |
| 1989 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 1990 | ctrl |= 0x00001000; |
| 1991 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 1992 | ctrl |= 0x00002000; |
| 1993 | mask = 0x000f3f00; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1994 | } |
| 1995 | |
Ben Skeggs | e84a35a | 2014-06-05 10:59:55 +1000 | [diff] [blame] | 1996 | nv50_sor_ctrl(nv_encoder, mask | owner, ctrl | owner); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 1997 | } |
| 1998 | |
| 1999 | static void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2000 | nv50_sor_destroy(struct drm_encoder *encoder) |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2001 | { |
| 2002 | drm_encoder_cleanup(encoder); |
| 2003 | kfree(encoder); |
| 2004 | } |
| 2005 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2006 | static const struct drm_encoder_helper_funcs nv50_sor_hfunc = { |
| 2007 | .dpms = nv50_sor_dpms, |
| 2008 | .mode_fixup = nv50_sor_mode_fixup, |
Ben Skeggs | 5a885f0 | 2013-02-20 14:34:18 +1000 | [diff] [blame] | 2009 | .prepare = nv50_sor_disconnect, |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2010 | .commit = nv50_sor_commit, |
| 2011 | .mode_set = nv50_sor_mode_set, |
| 2012 | .disable = nv50_sor_disconnect, |
| 2013 | .get_crtc = nv50_display_crtc_get, |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2014 | }; |
| 2015 | |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2016 | static const struct drm_encoder_funcs nv50_sor_func = { |
| 2017 | .destroy = nv50_sor_destroy, |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2018 | }; |
| 2019 | |
| 2020 | static int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2021 | nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2022 | { |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 2023 | struct nouveau_drm *drm = nouveau_drm(connector->dev); |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2024 | struct nouveau_i2c *i2c = nvkm_i2c(&drm->device); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2025 | struct nouveau_encoder *nv_encoder; |
| 2026 | struct drm_encoder *encoder; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 2027 | int type; |
| 2028 | |
| 2029 | switch (dcbe->type) { |
| 2030 | case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; |
| 2031 | case DCB_OUTPUT_TMDS: |
| 2032 | case DCB_OUTPUT_DP: |
| 2033 | default: |
| 2034 | type = DRM_MODE_ENCODER_TMDS; |
| 2035 | break; |
| 2036 | } |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2037 | |
| 2038 | nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); |
| 2039 | if (!nv_encoder) |
| 2040 | return -ENOMEM; |
| 2041 | nv_encoder->dcb = dcbe; |
| 2042 | nv_encoder->or = ffs(dcbe->or) - 1; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 2043 | nv_encoder->i2c = i2c->find(i2c, dcbe->i2c_index); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2044 | nv_encoder->last_dpms = DRM_MODE_DPMS_OFF; |
| 2045 | |
| 2046 | encoder = to_drm_encoder(nv_encoder); |
| 2047 | encoder->possible_crtcs = dcbe->heads; |
| 2048 | encoder->possible_clones = 0; |
Ben Skeggs | 5ed5020 | 2013-02-11 20:15:03 +1000 | [diff] [blame] | 2049 | drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type); |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2050 | drm_encoder_helper_add(encoder, &nv50_sor_hfunc); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2051 | |
| 2052 | drm_mode_connector_attach_encoder(connector, encoder); |
| 2053 | return 0; |
| 2054 | } |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2055 | |
| 2056 | /****************************************************************************** |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2057 | * PIOR |
| 2058 | *****************************************************************************/ |
| 2059 | |
| 2060 | static void |
| 2061 | nv50_pior_dpms(struct drm_encoder *encoder, int mode) |
| 2062 | { |
| 2063 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 2064 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
Ben Skeggs | 67cb49c | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2065 | struct { |
| 2066 | struct nv50_disp_mthd_v1 base; |
| 2067 | struct nv50_disp_pior_pwr_v0 pwr; |
| 2068 | } args = { |
| 2069 | .base.version = 1, |
| 2070 | .base.method = NV50_DISP_MTHD_V1_PIOR_PWR, |
| 2071 | .base.hasht = nv_encoder->dcb->hasht, |
| 2072 | .base.hashm = nv_encoder->dcb->hashm, |
| 2073 | .pwr.state = mode == DRM_MODE_DPMS_ON, |
| 2074 | .pwr.type = nv_encoder->dcb->type, |
| 2075 | }; |
| 2076 | |
| 2077 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2078 | } |
| 2079 | |
| 2080 | static bool |
| 2081 | nv50_pior_mode_fixup(struct drm_encoder *encoder, |
| 2082 | const struct drm_display_mode *mode, |
| 2083 | struct drm_display_mode *adjusted_mode) |
| 2084 | { |
| 2085 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 2086 | struct nouveau_connector *nv_connector; |
| 2087 | |
| 2088 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 2089 | if (nv_connector && nv_connector->native_mode) { |
| 2090 | if (nv_connector->scaling_mode != DRM_MODE_SCALE_NONE) { |
| 2091 | int id = adjusted_mode->base.id; |
| 2092 | *adjusted_mode = *nv_connector->native_mode; |
| 2093 | adjusted_mode->base.id = id; |
| 2094 | } |
| 2095 | } |
| 2096 | |
| 2097 | adjusted_mode->clock *= 2; |
| 2098 | return true; |
| 2099 | } |
| 2100 | |
| 2101 | static void |
| 2102 | nv50_pior_commit(struct drm_encoder *encoder) |
| 2103 | { |
| 2104 | } |
| 2105 | |
| 2106 | static void |
| 2107 | nv50_pior_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, |
| 2108 | struct drm_display_mode *adjusted_mode) |
| 2109 | { |
| 2110 | struct nv50_mast *mast = nv50_mast(encoder->dev); |
| 2111 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 2112 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); |
| 2113 | struct nouveau_connector *nv_connector; |
| 2114 | u8 owner = 1 << nv_crtc->index; |
| 2115 | u8 proto, depth; |
| 2116 | u32 *push; |
| 2117 | |
| 2118 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
| 2119 | switch (nv_connector->base.display_info.bpc) { |
| 2120 | case 10: depth = 0x6; break; |
| 2121 | case 8: depth = 0x5; break; |
| 2122 | case 6: depth = 0x2; break; |
| 2123 | default: depth = 0x0; break; |
| 2124 | } |
| 2125 | |
| 2126 | switch (nv_encoder->dcb->type) { |
| 2127 | case DCB_OUTPUT_TMDS: |
| 2128 | case DCB_OUTPUT_DP: |
| 2129 | proto = 0x0; |
| 2130 | break; |
| 2131 | default: |
| 2132 | BUG_ON(1); |
| 2133 | break; |
| 2134 | } |
| 2135 | |
| 2136 | nv50_pior_dpms(encoder, DRM_MODE_DPMS_ON); |
| 2137 | |
| 2138 | push = evo_wait(mast, 8); |
| 2139 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2140 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2141 | u32 ctrl = (depth << 16) | (proto << 8) | owner; |
| 2142 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 2143 | ctrl |= 0x00001000; |
| 2144 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 2145 | ctrl |= 0x00002000; |
| 2146 | evo_mthd(push, 0x0700 + (nv_encoder->or * 0x040), 1); |
| 2147 | evo_data(push, ctrl); |
| 2148 | } |
| 2149 | |
| 2150 | evo_kick(push, mast); |
| 2151 | } |
| 2152 | |
| 2153 | nv_encoder->crtc = encoder->crtc; |
| 2154 | } |
| 2155 | |
| 2156 | static void |
| 2157 | nv50_pior_disconnect(struct drm_encoder *encoder) |
| 2158 | { |
| 2159 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
| 2160 | struct nv50_mast *mast = nv50_mast(encoder->dev); |
| 2161 | const int or = nv_encoder->or; |
| 2162 | u32 *push; |
| 2163 | |
| 2164 | if (nv_encoder->crtc) { |
| 2165 | nv50_crtc_prepare(nv_encoder->crtc); |
| 2166 | |
| 2167 | push = evo_wait(mast, 4); |
| 2168 | if (push) { |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2169 | if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2170 | evo_mthd(push, 0x0700 + (or * 0x040), 1); |
| 2171 | evo_data(push, 0x00000000); |
| 2172 | } |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2173 | evo_kick(push, mast); |
| 2174 | } |
| 2175 | } |
| 2176 | |
| 2177 | nv_encoder->crtc = NULL; |
| 2178 | } |
| 2179 | |
| 2180 | static void |
| 2181 | nv50_pior_destroy(struct drm_encoder *encoder) |
| 2182 | { |
| 2183 | drm_encoder_cleanup(encoder); |
| 2184 | kfree(encoder); |
| 2185 | } |
| 2186 | |
| 2187 | static const struct drm_encoder_helper_funcs nv50_pior_hfunc = { |
| 2188 | .dpms = nv50_pior_dpms, |
| 2189 | .mode_fixup = nv50_pior_mode_fixup, |
| 2190 | .prepare = nv50_pior_disconnect, |
| 2191 | .commit = nv50_pior_commit, |
| 2192 | .mode_set = nv50_pior_mode_set, |
| 2193 | .disable = nv50_pior_disconnect, |
| 2194 | .get_crtc = nv50_display_crtc_get, |
| 2195 | }; |
| 2196 | |
| 2197 | static const struct drm_encoder_funcs nv50_pior_func = { |
| 2198 | .destroy = nv50_pior_destroy, |
| 2199 | }; |
| 2200 | |
| 2201 | static int |
| 2202 | nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe) |
| 2203 | { |
| 2204 | struct nouveau_drm *drm = nouveau_drm(connector->dev); |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2205 | struct nouveau_i2c *i2c = nvkm_i2c(&drm->device); |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2206 | struct nouveau_i2c_port *ddc = NULL; |
| 2207 | struct nouveau_encoder *nv_encoder; |
| 2208 | struct drm_encoder *encoder; |
| 2209 | int type; |
| 2210 | |
| 2211 | switch (dcbe->type) { |
| 2212 | case DCB_OUTPUT_TMDS: |
| 2213 | ddc = i2c->find_type(i2c, NV_I2C_TYPE_EXTDDC(dcbe->extdev)); |
| 2214 | type = DRM_MODE_ENCODER_TMDS; |
| 2215 | break; |
| 2216 | case DCB_OUTPUT_DP: |
| 2217 | ddc = i2c->find_type(i2c, NV_I2C_TYPE_EXTAUX(dcbe->extdev)); |
| 2218 | type = DRM_MODE_ENCODER_TMDS; |
| 2219 | break; |
| 2220 | default: |
| 2221 | return -ENODEV; |
| 2222 | } |
| 2223 | |
| 2224 | nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); |
| 2225 | if (!nv_encoder) |
| 2226 | return -ENOMEM; |
| 2227 | nv_encoder->dcb = dcbe; |
| 2228 | nv_encoder->or = ffs(dcbe->or) - 1; |
| 2229 | nv_encoder->i2c = ddc; |
| 2230 | |
| 2231 | encoder = to_drm_encoder(nv_encoder); |
| 2232 | encoder->possible_crtcs = dcbe->heads; |
| 2233 | encoder->possible_clones = 0; |
| 2234 | drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type); |
| 2235 | drm_encoder_helper_add(encoder, &nv50_pior_hfunc); |
| 2236 | |
| 2237 | drm_mode_connector_attach_encoder(connector, encoder); |
| 2238 | return 0; |
| 2239 | } |
| 2240 | |
| 2241 | /****************************************************************************** |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2242 | * Framebuffer |
| 2243 | *****************************************************************************/ |
| 2244 | |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2245 | static void |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2246 | nv50_fbdma_fini(struct nv50_fbdma *fbdma) |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2247 | { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2248 | int i; |
| 2249 | for (i = 0; i < ARRAY_SIZE(fbdma->base); i++) |
| 2250 | nvif_object_fini(&fbdma->base[i]); |
| 2251 | nvif_object_fini(&fbdma->core); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2252 | list_del(&fbdma->head); |
| 2253 | kfree(fbdma); |
| 2254 | } |
| 2255 | |
| 2256 | static int |
| 2257 | nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kind) |
| 2258 | { |
| 2259 | struct nouveau_drm *drm = nouveau_drm(dev); |
| 2260 | struct nv50_disp *disp = nv50_disp(dev); |
| 2261 | struct nv50_mast *mast = nv50_mast(dev); |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2262 | struct __attribute__ ((packed)) { |
| 2263 | struct nv_dma_v0 base; |
| 2264 | union { |
| 2265 | struct nv50_dma_v0 nv50; |
| 2266 | struct gf100_dma_v0 gf100; |
| 2267 | struct gf110_dma_v0 gf110; |
| 2268 | }; |
| 2269 | } args = {}; |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2270 | struct nv50_fbdma *fbdma; |
| 2271 | struct drm_crtc *crtc; |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2272 | u32 size = sizeof(args.base); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2273 | int ret; |
| 2274 | |
| 2275 | list_for_each_entry(fbdma, &disp->fbdma, head) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2276 | if (fbdma->core.handle == name) |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2277 | return 0; |
| 2278 | } |
| 2279 | |
| 2280 | fbdma = kzalloc(sizeof(*fbdma), GFP_KERNEL); |
| 2281 | if (!fbdma) |
| 2282 | return -ENOMEM; |
| 2283 | list_add(&fbdma->head, &disp->fbdma); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2284 | |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2285 | args.base.target = NV_DMA_V0_TARGET_VRAM; |
| 2286 | args.base.access = NV_DMA_V0_ACCESS_RDWR; |
| 2287 | args.base.start = offset; |
| 2288 | args.base.limit = offset + length - 1; |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2289 | |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2290 | if (drm->device.info.chipset < 0x80) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2291 | args.nv50.part = NV50_DMA_V0_PART_256; |
| 2292 | size += sizeof(args.nv50); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2293 | } else |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2294 | if (drm->device.info.chipset < 0xc0) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2295 | args.nv50.part = NV50_DMA_V0_PART_256; |
| 2296 | args.nv50.kind = kind; |
| 2297 | size += sizeof(args.nv50); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2298 | } else |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2299 | if (drm->device.info.chipset < 0xd0) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2300 | args.gf100.kind = kind; |
| 2301 | size += sizeof(args.gf100); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2302 | } else { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2303 | args.gf110.page = GF110_DMA_V0_PAGE_LP; |
| 2304 | args.gf110.kind = kind; |
| 2305 | size += sizeof(args.gf110); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2306 | } |
| 2307 | |
| 2308 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2309 | struct nv50_head *head = nv50_head(crtc); |
| 2310 | int ret = nvif_object_init(&head->sync.base.base.user, NULL, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2311 | name, NV_DMA_IN_MEMORY, &args, size, |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2312 | &fbdma->base[head->base.index]); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2313 | if (ret) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2314 | nv50_fbdma_fini(fbdma); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2315 | return ret; |
| 2316 | } |
| 2317 | } |
| 2318 | |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2319 | ret = nvif_object_init(&mast->base.base.user, NULL, name, |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 2320 | NV_DMA_IN_MEMORY, &args, size, |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2321 | &fbdma->core); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2322 | if (ret) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2323 | nv50_fbdma_fini(fbdma); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2324 | return ret; |
| 2325 | } |
| 2326 | |
| 2327 | return 0; |
| 2328 | } |
| 2329 | |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2330 | static void |
| 2331 | nv50_fb_dtor(struct drm_framebuffer *fb) |
| 2332 | { |
| 2333 | } |
| 2334 | |
| 2335 | static int |
| 2336 | nv50_fb_ctor(struct drm_framebuffer *fb) |
| 2337 | { |
| 2338 | struct nouveau_framebuffer *nv_fb = nouveau_framebuffer(fb); |
| 2339 | struct nouveau_drm *drm = nouveau_drm(fb->dev); |
| 2340 | struct nouveau_bo *nvbo = nv_fb->nvbo; |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2341 | struct nv50_disp *disp = nv50_disp(fb->dev); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2342 | u8 kind = nouveau_bo_tile_layout(nvbo) >> 8; |
| 2343 | u8 tile = nvbo->tile_mode; |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2344 | |
| 2345 | if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) { |
| 2346 | NV_ERROR(drm, "framebuffer requires contiguous bo\n"); |
| 2347 | return -EINVAL; |
| 2348 | } |
| 2349 | |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2350 | if (drm->device.info.chipset >= 0xc0) |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2351 | tile >>= 4; /* yep.. */ |
| 2352 | |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2353 | switch (fb->depth) { |
| 2354 | case 8: nv_fb->r_format = 0x1e00; break; |
| 2355 | case 15: nv_fb->r_format = 0xe900; break; |
| 2356 | case 16: nv_fb->r_format = 0xe800; break; |
| 2357 | case 24: |
| 2358 | case 32: nv_fb->r_format = 0xcf00; break; |
| 2359 | case 30: nv_fb->r_format = 0xd100; break; |
| 2360 | default: |
| 2361 | NV_ERROR(drm, "unknown depth %d\n", fb->depth); |
| 2362 | return -EINVAL; |
| 2363 | } |
| 2364 | |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2365 | if (disp->disp->oclass < G82_DISP) { |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2366 | nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) : |
| 2367 | (fb->pitches[0] | 0x00100000); |
| 2368 | nv_fb->r_format |= kind << 16; |
| 2369 | } else |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2370 | if (disp->disp->oclass < GF110_DISP) { |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2371 | nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) : |
| 2372 | (fb->pitches[0] | 0x00100000); |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2373 | } else { |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2374 | nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) : |
| 2375 | (fb->pitches[0] | 0x01000000); |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2376 | } |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2377 | nv_fb->r_handle = 0xffff0000 | kind; |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2378 | |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 2379 | return nv50_fbdma_init(fb->dev, nv_fb->r_handle, 0, |
| 2380 | drm->device.info.ram_user, kind); |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2381 | } |
| 2382 | |
| 2383 | /****************************************************************************** |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2384 | * Init |
| 2385 | *****************************************************************************/ |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2386 | |
Ben Skeggs | 2a44e49 | 2011-11-09 11:36:33 +1000 | [diff] [blame] | 2387 | void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2388 | nv50_display_fini(struct drm_device *dev) |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2389 | { |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2390 | } |
| 2391 | |
| 2392 | int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2393 | nv50_display_init(struct drm_device *dev) |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2394 | { |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 2395 | struct nv50_disp *disp = nv50_disp(dev); |
| 2396 | struct drm_crtc *crtc; |
| 2397 | u32 *push; |
| 2398 | |
| 2399 | push = evo_wait(nv50_mast(dev), 32); |
| 2400 | if (!push) |
| 2401 | return -EBUSY; |
| 2402 | |
| 2403 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
| 2404 | struct nv50_sync *sync = nv50_sync(crtc); |
| 2405 | nouveau_bo_wr32(disp->sync, sync->addr / 4, sync->data); |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2406 | } |
| 2407 | |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 2408 | evo_mthd(push, 0x0088, 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 2409 | evo_data(push, nv50_mast(dev)->base.sync.handle); |
Ben Skeggs | 9f9bdaa | 2013-03-02 13:21:31 +1000 | [diff] [blame] | 2410 | evo_kick(push, nv50_mast(dev)); |
| 2411 | return 0; |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2412 | } |
| 2413 | |
| 2414 | void |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2415 | nv50_display_destroy(struct drm_device *dev) |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2416 | { |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2417 | struct nv50_disp *disp = nv50_disp(dev); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2418 | struct nv50_fbdma *fbdma, *fbtmp; |
| 2419 | |
| 2420 | list_for_each_entry_safe(fbdma, fbtmp, &disp->fbdma, head) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2421 | nv50_fbdma_fini(fbdma); |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2422 | } |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2423 | |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2424 | nv50_dmac_destroy(&disp->mast.base, disp->disp); |
Ben Skeggs | bdb8c21 | 2011-11-12 01:30:24 +1000 | [diff] [blame] | 2425 | |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 2426 | nouveau_bo_unmap(disp->sync); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 2427 | if (disp->sync) |
| 2428 | nouveau_bo_unpin(disp->sync); |
Ben Skeggs | 816af2f | 2011-11-16 15:48:48 +1000 | [diff] [blame] | 2429 | nouveau_bo_ref(NULL, &disp->sync); |
Ben Skeggs | 51beb42 | 2011-07-05 10:33:08 +1000 | [diff] [blame] | 2430 | |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 2431 | nouveau_display(dev)->priv = NULL; |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2432 | kfree(disp); |
| 2433 | } |
| 2434 | |
| 2435 | int |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2436 | nv50_display_create(struct drm_device *dev) |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2437 | { |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2438 | struct nvif_device *device = &nouveau_drm(dev)->device; |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 2439 | struct nouveau_drm *drm = nouveau_drm(dev); |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 2440 | struct dcb_table *dcb = &drm->vbios.dcb; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2441 | struct drm_connector *connector, *tmp; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2442 | struct nv50_disp *disp; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 2443 | struct dcb_output *dcbe; |
Ben Skeggs | 7c5f6a8 | 2012-03-04 16:25:59 +1000 | [diff] [blame] | 2444 | int crtcs, ret, i; |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2445 | |
| 2446 | disp = kzalloc(sizeof(*disp), GFP_KERNEL); |
| 2447 | if (!disp) |
| 2448 | return -ENOMEM; |
Ben Skeggs | 8a42364 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2449 | INIT_LIST_HEAD(&disp->fbdma); |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 2450 | |
| 2451 | nouveau_display(dev)->priv = disp; |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2452 | nouveau_display(dev)->dtor = nv50_display_destroy; |
| 2453 | nouveau_display(dev)->init = nv50_display_init; |
| 2454 | nouveau_display(dev)->fini = nv50_display_fini; |
Ben Skeggs | ab0af55 | 2014-08-10 04:10:19 +1000 | [diff] [blame] | 2455 | nouveau_display(dev)->fb_ctor = nv50_fb_ctor; |
| 2456 | nouveau_display(dev)->fb_dtor = nv50_fb_dtor; |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2457 | disp->disp = &nouveau_display(dev)->disp; |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2458 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 2459 | /* small shared memory area we use for notifiers and semaphores */ |
| 2460 | ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, |
| 2461 | 0, 0x0000, NULL, &disp->sync); |
| 2462 | if (!ret) { |
| 2463 | ret = nouveau_bo_pin(disp->sync, TTM_PL_FLAG_VRAM); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 2464 | if (!ret) { |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 2465 | ret = nouveau_bo_map(disp->sync); |
Marcin Slusarz | 04c8c21 | 2012-11-25 23:04:23 +0100 | [diff] [blame] | 2466 | if (ret) |
| 2467 | nouveau_bo_unpin(disp->sync); |
| 2468 | } |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 2469 | if (ret) |
| 2470 | nouveau_bo_ref(NULL, &disp->sync); |
| 2471 | } |
| 2472 | |
| 2473 | if (ret) |
| 2474 | goto out; |
| 2475 | |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 2476 | /* allocate master evo channel */ |
Ben Skeggs | 410f3ec | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 2477 | ret = nv50_core_create(disp->disp, disp->sync->bo.offset, |
| 2478 | &disp->mast); |
Ben Skeggs | b5a794b | 2012-10-16 14:18:32 +1000 | [diff] [blame] | 2479 | if (ret) |
| 2480 | goto out; |
| 2481 | |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 2482 | /* create crtc objects to represent the hw heads */ |
Ben Skeggs | 648d4df | 2014-08-10 04:10:27 +1000 | [diff] [blame] | 2483 | if (disp->disp->oclass >= GF110_DISP) |
Ben Skeggs | db2bec1 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2484 | crtcs = nvif_rd32(device, 0x022448); |
Ben Skeggs | 63718a0 | 2012-11-16 11:44:14 +1000 | [diff] [blame] | 2485 | else |
| 2486 | crtcs = 2; |
| 2487 | |
Ben Skeggs | 7c5f6a8 | 2012-03-04 16:25:59 +1000 | [diff] [blame] | 2488 | for (i = 0; i < crtcs; i++) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 2489 | ret = nv50_crtc_create(dev, i); |
Ben Skeggs | 438d99e | 2011-07-05 16:48:06 +1000 | [diff] [blame] | 2490 | if (ret) |
| 2491 | goto out; |
| 2492 | } |
| 2493 | |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2494 | /* create encoder/connector objects based on VBIOS DCB table */ |
| 2495 | for (i = 0, dcbe = &dcb->entry[0]; i < dcb->entries; i++, dcbe++) { |
| 2496 | connector = nouveau_connector_create(dev, dcbe->connector); |
| 2497 | if (IS_ERR(connector)) |
| 2498 | continue; |
| 2499 | |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2500 | if (dcbe->location == DCB_LOC_ON_CHIP) { |
| 2501 | switch (dcbe->type) { |
| 2502 | case DCB_OUTPUT_TMDS: |
| 2503 | case DCB_OUTPUT_LVDS: |
| 2504 | case DCB_OUTPUT_DP: |
| 2505 | ret = nv50_sor_create(connector, dcbe); |
| 2506 | break; |
| 2507 | case DCB_OUTPUT_ANALOG: |
| 2508 | ret = nv50_dac_create(connector, dcbe); |
| 2509 | break; |
| 2510 | default: |
| 2511 | ret = -ENODEV; |
| 2512 | break; |
| 2513 | } |
| 2514 | } else { |
| 2515 | ret = nv50_pior_create(connector, dcbe); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2516 | } |
| 2517 | |
Ben Skeggs | eb6313a | 2013-02-11 09:52:58 +1000 | [diff] [blame] | 2518 | if (ret) { |
| 2519 | NV_WARN(drm, "failed to create encoder %d/%d/%d: %d\n", |
| 2520 | dcbe->location, dcbe->type, |
| 2521 | ffs(dcbe->or) - 1, ret); |
Ben Skeggs | 94f54f5 | 2013-03-05 22:26:06 +1000 | [diff] [blame] | 2522 | ret = 0; |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2523 | } |
| 2524 | } |
| 2525 | |
| 2526 | /* cull any connectors we created that don't have an encoder */ |
| 2527 | list_for_each_entry_safe(connector, tmp, &dev->mode_config.connector_list, head) { |
| 2528 | if (connector->encoder_ids[0]) |
| 2529 | continue; |
| 2530 | |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 2531 | NV_WARN(drm, "%s has no encoders, removing\n", |
Jani Nikula | 8c6c361 | 2014-06-03 14:56:18 +0300 | [diff] [blame] | 2532 | connector->name); |
Ben Skeggs | 83fc083 | 2011-07-05 13:08:40 +1000 | [diff] [blame] | 2533 | connector->funcs->destroy(connector); |
| 2534 | } |
| 2535 | |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2536 | out: |
| 2537 | if (ret) |
Ben Skeggs | e225f44 | 2012-11-21 14:40:21 +1000 | [diff] [blame] | 2538 | nv50_display_destroy(dev); |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 2539 | return ret; |
| 2540 | } |