blob: e31e17f81eefde2cebd3089641d7c487c21b8c55 [file] [log] [blame]
Steven J. Hill30700332012-05-30 21:02:49 +00001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/irq.h>
Andrew Bresticker4060bbe2014-10-20 12:03:53 -070010#include <linux/irqchip/mips-gic.h>
Steven J. Hill30700332012-05-30 21:02:49 +000011#include <linux/io.h>
12
Steven J. Hill30700332012-05-30 21:02:49 +000013#include <asm/irq_cpu.h>
14#include <asm/setup.h>
15
16#include <asm/mips-boards/sead3int.h>
17
18#define SEAD_CONFIG_GIC_PRESENT_SHF 1
19#define SEAD_CONFIG_GIC_PRESENT_MSK (1 << SEAD_CONFIG_GIC_PRESENT_SHF)
20#define SEAD_CONFIG_BASE 0x1b100110
21#define SEAD_CONFIG_SIZE 4
22
Andrew Bresticker327b8c82014-10-20 12:03:50 -070023static void __iomem *sead3_config_reg;
Steven J. Hill30700332012-05-30 21:02:49 +000024
Steven J. Hill30700332012-05-30 21:02:49 +000025void __init arch_init_irq(void)
26{
Andrew Brestickera393d932014-09-18 14:47:30 -070027 if (!cpu_has_veic)
Steven J. Hill30700332012-05-30 21:02:49 +000028 mips_cpu_irq_init();
29
Andrew Bresticker327b8c82014-10-20 12:03:50 -070030 sead3_config_reg = ioremap_nocache(SEAD_CONFIG_BASE, SEAD_CONFIG_SIZE);
31 gic_present = (__raw_readl(sead3_config_reg) &
32 SEAD_CONFIG_GIC_PRESENT_MSK) >>
Steven J. Hill30700332012-05-30 21:02:49 +000033 SEAD_CONFIG_GIC_PRESENT_SHF;
34 pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
35 pr_info("EIC: %s\n",
36 (current_cpu_data.options & MIPS_CPU_VEIC) ? "on" : "off");
37
38 if (gic_present)
Andrew Bresticker18743d22014-09-18 14:47:24 -070039 gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, CPU_INT_GIC,
40 MIPS_GIC_IRQ_BASE);
Steven J. Hill30700332012-05-30 21:02:49 +000041}
42