blob: a120b7a5a8fe4e9af03ccb40fc9e7e123f88d633 [file] [log] [blame]
Steven J. Hill30700332012-05-30 21:02:49 +00001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
Andrew Bresticker4060bbe2014-10-20 12:03:53 -07009#include <linux/irqchip/mips-gic.h>
Steven J. Hill30700332012-05-30 21:02:49 +000010
Maciej W. Rozycki8ff374b2013-09-17 16:58:10 +010011#include <asm/cpu.h>
Steven J. Hill30700332012-05-30 21:02:49 +000012#include <asm/setup.h>
13#include <asm/time.h>
14#include <asm/irq.h>
15#include <asm/mips-boards/generic.h>
Steven J. Hill30700332012-05-30 21:02:49 +000016
Steven J. Hill30700332012-05-30 21:02:49 +000017static void __iomem *status_reg = (void __iomem *)0xbf000410;
18
19/*
20 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect.
21 */
22static unsigned int __init estimate_cpu_frequency(void)
23{
Maciej W. Rozycki8ff374b2013-09-17 16:58:10 +010024 unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
Steven J. Hill30700332012-05-30 21:02:49 +000025 unsigned int tick = 0;
26 unsigned int freq;
27 unsigned int orig;
28 unsigned long flags;
29
30 local_irq_save(flags);
31
Ralf Baechle70342282013-01-22 12:59:30 +010032 orig = readl(status_reg) & 0x2; /* get original sample */
Steven J. Hill30700332012-05-30 21:02:49 +000033 /* wait for transition */
34 while ((readl(status_reg) & 0x2) == orig)
35 ;
Ralf Baechle70342282013-01-22 12:59:30 +010036 orig = orig ^ 0x2; /* flip the bit */
Steven J. Hill30700332012-05-30 21:02:49 +000037
38 write_c0_count(0);
39
40 /* wait 1 second (the sampling clock transitions every 10ms) */
41 while (tick < 100) {
42 /* wait for transition */
43 while ((readl(status_reg) & 0x2) == orig)
44 ;
Ralf Baechle70342282013-01-22 12:59:30 +010045 orig = orig ^ 0x2; /* flip the bit */
Steven J. Hill30700332012-05-30 21:02:49 +000046 tick++;
47 }
48
49 freq = read_c0_count();
50
51 local_irq_restore(flags);
52
53 mips_hpt_frequency = freq;
54
55 /* Adjust for processor */
56 if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
57 (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
58 freq *= 2;
59
Ralf Baechle70342282013-01-22 12:59:30 +010060 freq += 5000; /* rounding */
Steven J. Hill30700332012-05-30 21:02:49 +000061 freq -= freq%10000;
62
63 return freq ;
64}
65
66void read_persistent_clock(struct timespec *ts)
67{
68 ts->tv_sec = 0;
69 ts->tv_nsec = 0;
70}
71
Andrew Brestickera669efc2014-09-18 14:47:12 -070072int get_c0_perfcount_int(void)
Steven J. Hill30700332012-05-30 21:02:49 +000073{
Andrew Brestickere9de6882014-09-18 14:47:27 -070074 if (gic_present)
Niklas Cassel44923c92015-02-06 17:18:29 +010075 return gic_get_c0_perfcount_int();
Andrew Brestickere9de6882014-09-18 14:47:27 -070076 if (cp0_perfcount_irq >= 0)
77 return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
78 return -1;
Steven J. Hill30700332012-05-30 21:02:49 +000079}
Felix Fietkau0cb09852015-07-23 18:59:52 +020080EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
Steven J. Hill30700332012-05-30 21:02:49 +000081
Paul Gortmaker078a55f2013-06-18 13:38:59 +000082unsigned int get_c0_compare_int(void)
Steven J. Hill30700332012-05-30 21:02:49 +000083{
Andrew Brestickere9de6882014-09-18 14:47:27 -070084 if (gic_present)
85 return gic_get_c0_compare_int();
86 return MIPS_CPU_IRQ_BASE + cp0_compare_irq;
Steven J. Hill30700332012-05-30 21:02:49 +000087}
88
89void __init plat_time_init(void)
90{
91 unsigned int est_freq;
92
93 est_freq = estimate_cpu_frequency();
94
95 pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
96 (est_freq % 1000000) * 100 / 1000000);
97
Steven J. Hill30700332012-05-30 21:02:49 +000098 mips_scroll_message();
Steven J. Hill30700332012-05-30 21:02:49 +000099}