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Kukjin Kimc81a24f2011-02-14 16:10:55 +09001/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
Changhwan Youn84bbc162010-07-16 12:12:07 +09002 *
Kukjin Kimc81a24f2011-02-14 16:10:55 +09003 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
Changhwan Youn84bbc162010-07-16 12:12:07 +09005 *
Kukjin Kimc81a24f2011-02-14 16:10:55 +09006 * EXYNOS4 - IRQ definitions
Changhwan Youn84bbc162010-07-16 12:12:07 +09007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
Kukjin Kim35fc9502010-08-20 19:09:31 +090018/* PPI: Private Peripheral Interrupt */
19
Thomas Abraham1fb37262011-11-02 19:13:25 +090020#define IRQ_PPI(x) (x+16)
Changhwan Youn84bbc162010-07-16 12:12:07 +090021
Changhwan Youn3a062282011-10-04 17:02:58 +090022#define IRQ_MCT_LOCALTIMER IRQ_PPI(12)
23
Kukjin Kim35fc9502010-08-20 19:09:31 +090024/* SPI: Shared Peripheral Interrupt */
25
Thomas Abraham1fb37262011-11-02 19:13:25 +090026#define IRQ_SPI(x) (x+32)
Changhwan Youn84bbc162010-07-16 12:12:07 +090027
Changhwan Youn69644a82011-07-16 10:49:41 +090028#define IRQ_EINT0 IRQ_SPI(16)
29#define IRQ_EINT1 IRQ_SPI(17)
30#define IRQ_EINT2 IRQ_SPI(18)
31#define IRQ_EINT3 IRQ_SPI(19)
32#define IRQ_EINT4 IRQ_SPI(20)
33#define IRQ_EINT5 IRQ_SPI(21)
34#define IRQ_EINT6 IRQ_SPI(22)
35#define IRQ_EINT7 IRQ_SPI(23)
36#define IRQ_EINT8 IRQ_SPI(24)
37#define IRQ_EINT9 IRQ_SPI(25)
38#define IRQ_EINT10 IRQ_SPI(26)
39#define IRQ_EINT11 IRQ_SPI(27)
40#define IRQ_EINT12 IRQ_SPI(28)
41#define IRQ_EINT13 IRQ_SPI(29)
42#define IRQ_EINT14 IRQ_SPI(30)
43#define IRQ_EINT15 IRQ_SPI(31)
44#define IRQ_EINT16_31 IRQ_SPI(32)
Changhwan Younb45756f2010-11-29 16:58:29 +090045
Boojin Kim9ed76e02012-02-15 13:15:12 +090046#define IRQ_MDMA0 IRQ_SPI(33)
47#define IRQ_MDMA1 IRQ_SPI(34)
Changhwan Youn69644a82011-07-16 10:49:41 +090048#define IRQ_PDMA0 IRQ_SPI(35)
49#define IRQ_PDMA1 IRQ_SPI(36)
50#define IRQ_TIMER0_VIC IRQ_SPI(37)
51#define IRQ_TIMER1_VIC IRQ_SPI(38)
52#define IRQ_TIMER2_VIC IRQ_SPI(39)
53#define IRQ_TIMER3_VIC IRQ_SPI(40)
54#define IRQ_TIMER4_VIC IRQ_SPI(41)
55#define IRQ_MCT_L0 IRQ_SPI(42)
56#define IRQ_WDT IRQ_SPI(43)
57#define IRQ_RTC_ALARM IRQ_SPI(44)
58#define IRQ_RTC_TIC IRQ_SPI(45)
59#define IRQ_GPIO_XB IRQ_SPI(46)
60#define IRQ_GPIO_XA IRQ_SPI(47)
61#define IRQ_MCT_L1 IRQ_SPI(48)
62
63#define IRQ_UART0 IRQ_SPI(52)
64#define IRQ_UART1 IRQ_SPI(53)
65#define IRQ_UART2 IRQ_SPI(54)
66#define IRQ_UART3 IRQ_SPI(55)
67#define IRQ_UART4 IRQ_SPI(56)
68#define IRQ_MCT_G0 IRQ_SPI(57)
69#define IRQ_IIC IRQ_SPI(58)
70#define IRQ_IIC1 IRQ_SPI(59)
71#define IRQ_IIC2 IRQ_SPI(60)
72#define IRQ_IIC3 IRQ_SPI(61)
73#define IRQ_IIC4 IRQ_SPI(62)
74#define IRQ_IIC5 IRQ_SPI(63)
75#define IRQ_IIC6 IRQ_SPI(64)
76#define IRQ_IIC7 IRQ_SPI(65)
Padmavathi Venna74ac23a2011-12-26 16:42:15 +090077#define IRQ_SPI0 IRQ_SPI(66)
78#define IRQ_SPI1 IRQ_SPI(67)
79#define IRQ_SPI2 IRQ_SPI(68)
Changhwan Youn69644a82011-07-16 10:49:41 +090080
81#define IRQ_USB_HOST IRQ_SPI(70)
82#define IRQ_USB_HSOTG IRQ_SPI(71)
83#define IRQ_MODEM_IF IRQ_SPI(72)
84#define IRQ_HSMMC0 IRQ_SPI(73)
85#define IRQ_HSMMC1 IRQ_SPI(74)
86#define IRQ_HSMMC2 IRQ_SPI(75)
87#define IRQ_HSMMC3 IRQ_SPI(76)
Seungwon Jeond7919582011-07-21 00:34:58 +090088#define IRQ_DWMCI IRQ_SPI(77)
Changhwan Youn69644a82011-07-16 10:49:41 +090089
Sylwester Nawrocki5a1993f2011-08-12 19:03:16 +090090#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
91#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
Changhwan Youn69644a82011-07-16 10:49:41 +090092
93#define IRQ_ONENAND_AUDI IRQ_SPI(82)
94#define IRQ_ROTATOR IRQ_SPI(83)
95#define IRQ_FIMC0 IRQ_SPI(84)
96#define IRQ_FIMC1 IRQ_SPI(85)
97#define IRQ_FIMC2 IRQ_SPI(86)
98#define IRQ_FIMC3 IRQ_SPI(87)
99#define IRQ_JPEG IRQ_SPI(88)
100#define IRQ_2D IRQ_SPI(89)
101#define IRQ_PCIE IRQ_SPI(90)
102
Tomasz Stanislawskifbf05562011-09-19 16:44:42 +0900103#define IRQ_MIXER IRQ_SPI(91)
104#define IRQ_HDMI IRQ_SPI(92)
Tomasz Stanislawskic40e7e02011-09-16 18:44:36 +0900105#define IRQ_IIC_HDMIPHY IRQ_SPI(93)
Changhwan Youn69644a82011-07-16 10:49:41 +0900106#define IRQ_MFC IRQ_SPI(94)
Tomasz Stanislawskifbf05562011-09-19 16:44:42 +0900107#define IRQ_SDO IRQ_SPI(95)
Changhwan Youn69644a82011-07-16 10:49:41 +0900108
109#define IRQ_AUDIO_SS IRQ_SPI(96)
110#define IRQ_I2S0 IRQ_SPI(97)
111#define IRQ_I2S1 IRQ_SPI(98)
112#define IRQ_I2S2 IRQ_SPI(99)
113#define IRQ_AC97 IRQ_SPI(100)
114
115#define IRQ_SPDIF IRQ_SPI(104)
116#define IRQ_ADC0 IRQ_SPI(105)
117#define IRQ_PEN0 IRQ_SPI(106)
118#define IRQ_ADC1 IRQ_SPI(107)
119#define IRQ_PEN1 IRQ_SPI(108)
120#define IRQ_KEYPAD IRQ_SPI(109)
121#define IRQ_PMU IRQ_SPI(110)
122#define IRQ_GPS IRQ_SPI(111)
123#define IRQ_INTFEEDCTRL_SSS IRQ_SPI(112)
124#define IRQ_SLIMBUS IRQ_SPI(113)
125
126#define IRQ_TSI IRQ_SPI(115)
127#define IRQ_SATA IRQ_SPI(116)
Changhwan Youn84bbc162010-07-16 12:12:07 +0900128
129#define MAX_IRQ_IN_COMBINER 8
Changhwan Youn69644a82011-07-16 10:49:41 +0900130#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
Changhwan Youn84bbc162010-07-16 12:12:07 +0900131#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y)
132
Donguk Ryub55f6852011-01-13 13:35:31 +0900133#define IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
134#define IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
135#define IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
136#define IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3)
137#define IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4)
138#define IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5)
139#define IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6)
140#define IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7)
141
142#define IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0)
143#define IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1)
144#define IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2)
145#define IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3)
146#define IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4)
147#define IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5)
148#define IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6)
149#define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7)
150
Jonghun Han1aee2ad2011-07-21 15:46:19 +0900151#define IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0)
152#define IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1)
153#define IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2)
154
Changhwan Youn69644a82011-07-16 10:49:41 +0900155#define MAX_COMBINER_NR 16
Jongpill Leed2e7eca2010-10-14 15:52:16 +0900156
MyungJoo Ham0e9e5262011-07-20 21:08:18 +0900157#define IRQ_ADC IRQ_ADC0
158#define IRQ_TC IRQ_PEN0
159
Jongpill Leed2e7eca2010-10-14 15:52:16 +0900160#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0)
161
162#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE + 0)
163#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE + 16)
164
Marek Szyprowski721bbd42011-03-15 21:17:43 +0900165/* optional GPIO interrupts */
166#define S5P_GPIOINT_BASE (S5P_IRQ_EINT_BASE + 32)
167#define IRQ_GPIO1_NR_GROUPS 16
168#define IRQ_GPIO2_NR_GROUPS 9
169#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
Kukjin Kim35fc9502010-08-20 19:09:31 +0900170
Thomas Abraham1fb37262011-11-02 19:13:25 +0900171#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)
172
Marek Szyprowski721bbd42011-03-15 21:17:43 +0900173/* Set the default NR_IRQS */
Thomas Abraham1fb37262011-11-02 19:13:25 +0900174#define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
Changhwan Youn84bbc162010-07-16 12:12:07 +0900175
Kukjin Kim35fc9502010-08-20 19:09:31 +0900176#endif /* __ASM_ARCH_IRQS_H */