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Sundar R Iyer549931f2010-07-13 11:51:28 +05301/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
Bengt Jonsson79568b942011-03-11 11:54:46 +01006 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
Lee Jones547f3842013-03-28 16:11:14 +00008 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
Sundar R Iyer549931f2010-07-13 11:51:28 +05309 */
10
11#ifndef __LINUX_MFD_AB8500_REGULATOR_H
12#define __LINUX_MFD_AB8500_REGULATOR_H
13
Lee Jonesd1a82002013-03-28 16:11:01 +000014#include <linux/platform_device.h>
15
Sundar R Iyer549931f2010-07-13 11:51:28 +053016/* AB8500 regulators */
Bengt Jonssoncb189b02010-12-10 11:08:40 +010017enum ab8500_regulator_id {
18 AB8500_LDO_AUX1,
19 AB8500_LDO_AUX2,
20 AB8500_LDO_AUX3,
21 AB8500_LDO_INTCORE,
22 AB8500_LDO_TVOUT,
23 AB8500_LDO_AUDIO,
24 AB8500_LDO_ANAMIC1,
25 AB8500_LDO_ANAMIC2,
26 AB8500_LDO_DMIC,
27 AB8500_LDO_ANA,
28 AB8500_NUM_REGULATORS,
29};
Bengt Jonsson79568b942011-03-11 11:54:46 +010030
Lee Jones547f3842013-03-28 16:11:14 +000031/* AB8505 regulators */
32enum ab8505_regulator_id {
33 AB8505_LDO_AUX1,
34 AB8505_LDO_AUX2,
35 AB8505_LDO_AUX3,
36 AB8505_LDO_AUX4,
37 AB8505_LDO_AUX5,
38 AB8505_LDO_AUX6,
39 AB8505_LDO_INTCORE,
40 AB8505_LDO_ADC,
41 AB8505_LDO_USB,
42 AB8505_LDO_AUDIO,
43 AB8505_LDO_ANAMIC1,
44 AB8505_LDO_ANAMIC2,
45 AB8505_LDO_AUX8,
46 AB8505_LDO_ANA,
47 AB8505_SYSCLKREQ_2,
48 AB8505_SYSCLKREQ_4,
49 AB8505_NUM_REGULATORS,
50};
51
52/* AB9540 regulators */
Linus Walleijd6255522012-02-20 21:42:24 +010053enum ab9540_regulator_id {
54 AB9540_LDO_AUX1,
55 AB9540_LDO_AUX2,
56 AB9540_LDO_AUX3,
57 AB9540_LDO_AUX4,
58 AB9540_LDO_INTCORE,
59 AB9540_LDO_TVOUT,
60 AB9540_LDO_USB,
61 AB9540_LDO_AUDIO,
62 AB9540_LDO_ANAMIC1,
63 AB9540_LDO_ANAMIC2,
64 AB9540_LDO_DMIC,
65 AB9540_LDO_ANA,
66 AB9540_SYSCLKREQ_2,
67 AB9540_SYSCLKREQ_4,
68 AB9540_NUM_REGULATORS,
69};
70
Lee Jonesae0a9a32013-03-28 16:11:16 +000071/* AB8540 regulators */
72enum ab8540_regulator_id {
73 AB8540_LDO_AUX1,
74 AB8540_LDO_AUX2,
75 AB8540_LDO_AUX3,
76 AB8540_LDO_AUX4,
Zhenhua HUANG684d5ce2013-04-02 13:24:15 +010077 AB8540_LDO_AUX5,
78 AB8540_LDO_AUX6,
Lee Jonesae0a9a32013-03-28 16:11:16 +000079 AB8540_LDO_INTCORE,
80 AB8540_LDO_TVOUT,
81 AB8540_LDO_AUDIO,
82 AB8540_LDO_ANAMIC1,
83 AB8540_LDO_ANAMIC2,
84 AB8540_LDO_DMIC,
85 AB8540_LDO_ANA,
86 AB8540_LDO_SDIO,
87 AB8540_SYSCLKREQ_2,
88 AB8540_SYSCLKREQ_4,
89 AB8540_NUM_REGULATORS,
90};
91
Lee Jones547f3842013-03-28 16:11:14 +000092/* AB8500, AB8505, and AB9540 register initialization */
Bengt Jonsson79568b942011-03-11 11:54:46 +010093struct ab8500_regulator_reg_init {
94 int id;
Lee Jones3c1b8432013-03-21 15:59:01 +000095 u8 mask;
Bengt Jonsson79568b942011-03-11 11:54:46 +010096 u8 value;
97};
98
Lee Jones3c1b8432013-03-21 15:59:01 +000099#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
100 { \
101 .id = _id, \
102 .mask = _mask, \
103 .value = _value, \
Bengt Jonsson79568b942011-03-11 11:54:46 +0100104 }
105
106/* AB8500 registers */
107enum ab8500_regulator_reg {
108 AB8500_REGUREQUESTCTRL2,
109 AB8500_REGUREQUESTCTRL3,
110 AB8500_REGUREQUESTCTRL4,
111 AB8500_REGUSYSCLKREQ1HPVALID1,
112 AB8500_REGUSYSCLKREQ1HPVALID2,
113 AB8500_REGUHWHPREQ1VALID1,
114 AB8500_REGUHWHPREQ1VALID2,
115 AB8500_REGUHWHPREQ2VALID1,
116 AB8500_REGUHWHPREQ2VALID2,
117 AB8500_REGUSWHPREQVALID1,
118 AB8500_REGUSWHPREQVALID2,
119 AB8500_REGUSYSCLKREQVALID1,
120 AB8500_REGUSYSCLKREQVALID2,
121 AB8500_REGUMISC1,
122 AB8500_VAUDIOSUPPLY,
123 AB8500_REGUCTRL1VAMIC,
124 AB8500_VPLLVANAREGU,
125 AB8500_VREFDDR,
126 AB8500_EXTSUPPLYREGU,
127 AB8500_VAUX12REGU,
128 AB8500_VRF1VAUX3REGU,
129 AB8500_VAUX1SEL,
130 AB8500_VAUX2SEL,
131 AB8500_VRF1VAUX3SEL,
132 AB8500_REGUCTRL2SPARE,
133 AB8500_REGUCTRLDISCH,
134 AB8500_REGUCTRLDISCH2,
Bengt Jonsson79568b942011-03-11 11:54:46 +0100135 AB8500_NUM_REGULATOR_REGISTERS,
136};
137
Lee Jones547f3842013-03-28 16:11:14 +0000138/* AB8505 registers */
139enum ab8505_regulator_reg {
140 AB8505_REGUREQUESTCTRL1,
141 AB8505_REGUREQUESTCTRL2,
142 AB8505_REGUREQUESTCTRL3,
143 AB8505_REGUREQUESTCTRL4,
144 AB8505_REGUSYSCLKREQ1HPVALID1,
145 AB8505_REGUSYSCLKREQ1HPVALID2,
146 AB8505_REGUHWHPREQ1VALID1,
147 AB8505_REGUHWHPREQ1VALID2,
148 AB8505_REGUHWHPREQ2VALID1,
149 AB8505_REGUHWHPREQ2VALID2,
150 AB8505_REGUSWHPREQVALID1,
151 AB8505_REGUSWHPREQVALID2,
152 AB8505_REGUSYSCLKREQVALID1,
153 AB8505_REGUSYSCLKREQVALID2,
154 AB8505_REGUVAUX4REQVALID,
155 AB8505_REGUMISC1,
156 AB8505_VAUDIOSUPPLY,
157 AB8505_REGUCTRL1VAMIC,
158 AB8505_VSMPSAREGU,
159 AB8505_VSMPSBREGU,
160 AB8505_VSAFEREGU, /* NOTE! PRCMU register */
161 AB8505_VPLLVANAREGU,
162 AB8505_EXTSUPPLYREGU,
163 AB8505_VAUX12REGU,
164 AB8505_VRF1VAUX3REGU,
165 AB8505_VSMPSASEL1,
166 AB8505_VSMPSASEL2,
167 AB8505_VSMPSASEL3,
168 AB8505_VSMPSBSEL1,
169 AB8505_VSMPSBSEL2,
170 AB8505_VSMPSBSEL3,
171 AB8505_VSAFESEL1, /* NOTE! PRCMU register */
172 AB8505_VSAFESEL2, /* NOTE! PRCMU register */
173 AB8505_VSAFESEL3, /* NOTE! PRCMU register */
174 AB8505_VAUX1SEL,
175 AB8505_VAUX2SEL,
176 AB8505_VRF1VAUX3SEL,
177 AB8505_VAUX4REQCTRL,
178 AB8505_VAUX4REGU,
179 AB8505_VAUX4SEL,
180 AB8505_REGUCTRLDISCH,
181 AB8505_REGUCTRLDISCH2,
182 AB8505_REGUCTRLDISCH3,
183 AB8505_CTRLVAUX5,
184 AB8505_CTRLVAUX6,
185 AB8505_NUM_REGULATOR_REGISTERS,
186};
Linus Walleijd6255522012-02-20 21:42:24 +0100187
188/* AB9540 registers */
189enum ab9540_regulator_reg {
190 AB9540_REGUREQUESTCTRL1,
191 AB9540_REGUREQUESTCTRL2,
192 AB9540_REGUREQUESTCTRL3,
193 AB9540_REGUREQUESTCTRL4,
194 AB9540_REGUSYSCLKREQ1HPVALID1,
195 AB9540_REGUSYSCLKREQ1HPVALID2,
196 AB9540_REGUHWHPREQ1VALID1,
197 AB9540_REGUHWHPREQ1VALID2,
198 AB9540_REGUHWHPREQ2VALID1,
199 AB9540_REGUHWHPREQ2VALID2,
200 AB9540_REGUSWHPREQVALID1,
201 AB9540_REGUSWHPREQVALID2,
202 AB9540_REGUSYSCLKREQVALID1,
203 AB9540_REGUSYSCLKREQVALID2,
204 AB9540_REGUVAUX4REQVALID,
205 AB9540_REGUMISC1,
206 AB9540_VAUDIOSUPPLY,
207 AB9540_REGUCTRL1VAMIC,
208 AB9540_VSMPS1REGU,
209 AB9540_VSMPS2REGU,
210 AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
211 AB9540_VPLLVANAREGU,
212 AB9540_EXTSUPPLYREGU,
213 AB9540_VAUX12REGU,
214 AB9540_VRF1VAUX3REGU,
215 AB9540_VSMPS1SEL1,
216 AB9540_VSMPS1SEL2,
217 AB9540_VSMPS1SEL3,
218 AB9540_VSMPS2SEL1,
219 AB9540_VSMPS2SEL2,
220 AB9540_VSMPS2SEL3,
221 AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
222 AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
223 AB9540_VAUX1SEL,
224 AB9540_VAUX2SEL,
225 AB9540_VRF1VAUX3SEL,
226 AB9540_REGUCTRL2SPARE,
227 AB9540_VAUX4REQCTRL,
228 AB9540_VAUX4REGU,
229 AB9540_VAUX4SEL,
230 AB9540_REGUCTRLDISCH,
231 AB9540_REGUCTRLDISCH2,
232 AB9540_REGUCTRLDISCH3,
233 AB9540_NUM_REGULATOR_REGISTERS,
234};
235
Lee Jonesae0a9a32013-03-28 16:11:16 +0000236/* AB8540 registers */
237enum ab8540_regulator_reg {
238 AB8540_REGUREQUESTCTRL1,
239 AB8540_REGUREQUESTCTRL2,
240 AB8540_REGUREQUESTCTRL3,
241 AB8540_REGUREQUESTCTRL4,
242 AB8540_REGUSYSCLKREQ1HPVALID1,
243 AB8540_REGUSYSCLKREQ1HPVALID2,
244 AB8540_REGUHWHPREQ1VALID1,
245 AB8540_REGUHWHPREQ1VALID2,
246 AB8540_REGUHWHPREQ2VALID1,
247 AB8540_REGUHWHPREQ2VALID2,
248 AB8540_REGUSWHPREQVALID1,
249 AB8540_REGUSWHPREQVALID2,
250 AB8540_REGUSYSCLKREQVALID1,
251 AB8540_REGUSYSCLKREQVALID2,
252 AB8540_REGUVAUX4REQVALID,
253 AB8540_REGUVAUX5REQVALID,
254 AB8540_REGUVAUX6REQVALID,
255 AB8540_REGUVCLKBREQVALID,
256 AB8540_REGUVRF1REQVALID,
257 AB8540_REGUMISC1,
258 AB8540_VAUDIOSUPPLY,
259 AB8540_REGUCTRL1VAMIC,
260 AB8540_VHSIC,
261 AB8540_VSDIO,
262 AB8540_VSMPS1REGU,
263 AB8540_VSMPS2REGU,
264 AB8540_VSMPS3REGU,
265 AB8540_VPLLVANAREGU,
266 AB8540_EXTSUPPLYREGU,
267 AB8540_VAUX12REGU,
268 AB8540_VRF1VAUX3REGU,
269 AB8540_VSMPS1SEL1,
270 AB8540_VSMPS1SEL2,
271 AB8540_VSMPS1SEL3,
272 AB8540_VSMPS2SEL1,
273 AB8540_VSMPS2SEL2,
274 AB8540_VSMPS2SEL3,
275 AB8540_VSMPS3SEL1,
276 AB8540_VSMPS3SEL2,
277 AB8540_VAUX1SEL,
278 AB8540_VAUX2SEL,
279 AB8540_VRF1VAUX3SEL,
280 AB8540_REGUCTRL2SPARE,
281 AB8540_VAUX4REQCTRL,
282 AB8540_VAUX4REGU,
283 AB8540_VAUX4SEL,
284 AB8540_VAUX5REQCTRL,
285 AB8540_VAUX5REGU,
286 AB8540_VAUX5SEL,
287 AB8540_VAUX6REQCTRL,
288 AB8540_VAUX6REGU,
289 AB8540_VAUX6SEL,
290 AB8540_VCLKBREQCTRL,
291 AB8540_VCLKBREGU,
292 AB8540_VCLKBSEL,
293 AB8540_VRF1REQCTRL,
294 AB8540_REGUCTRLDISCH,
295 AB8540_REGUCTRLDISCH2,
296 AB8540_REGUCTRLDISCH3,
297 AB8540_REGUCTRLDISCH4,
298 AB8540_VSIMSYSCLKCTRL,
299 AB8540_VANAVPLLSEL,
300 AB8540_NUM_REGULATOR_REGISTERS,
301};
302
Lee Jonesd1a82002013-03-28 16:11:01 +0000303/* AB8500 external regulators */
Bengt Jonsson18bc2b32013-03-28 16:11:06 +0000304struct ab8500_ext_regulator_cfg {
305 bool hwreq; /* requires hw mode or high power mode */
306};
307
Lee Jonesd1a82002013-03-28 16:11:01 +0000308enum ab8500_ext_regulator_id {
309 AB8500_EXT_SUPPLY1,
310 AB8500_EXT_SUPPLY2,
311 AB8500_EXT_SUPPLY3,
312 AB8500_NUM_EXT_REGULATORS,
313};
314
315/* AB8500 regulator platform data */
Bengt Jonsson732805a2013-03-21 15:59:03 +0000316struct ab8500_regulator_platform_data {
317 int num_reg_init;
318 struct ab8500_regulator_reg_init *reg_init;
319 int num_regulator;
320 struct regulator_init_data *regulator;
Lee Jonesd1a82002013-03-28 16:11:01 +0000321 int num_ext_regulator;
322 struct regulator_init_data *ext_regulator;
Bengt Jonsson732805a2013-03-21 15:59:03 +0000323};
324
Lee Jonesda0b0c42013-03-28 16:11:09 +0000325#ifdef CONFIG_REGULATOR_AB8500_DEBUG
326int ab8500_regulator_debug_init(struct platform_device *pdev);
327int ab8500_regulator_debug_exit(struct platform_device *pdev);
328#else
329static inline int ab8500_regulator_debug_init(struct platform_device *pdev)
330{
331 return 0;
332}
333static inline int ab8500_regulator_debug_exit(struct platform_device *pdev)
334{
335 return 0;
336}
337#endif
338
Sundar R Iyer549931f2010-07-13 11:51:28 +0530339#endif