Anirudh Ghayal | fe98881 | 2018-01-10 10:21:54 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 13 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 14 | #include "skeleton.dtsi" |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 15 | #include <dt-bindings/clock/qcom,rpmh.h> |
Jonathan Avila | d59c0df | 2017-12-04 13:53:45 -0800 | [diff] [blame] | 16 | #include <dt-bindings/clock/qcom,cpu-a7.h> |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 17 | #include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h> |
Tirupathi Reddy | 242c131 | 2017-08-17 11:01:16 +0530 | [diff] [blame] | 18 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Amit Nischal | 226ef5b | 2017-09-07 12:56:07 +0530 | [diff] [blame] | 19 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Mao Jinlong | 0b02a04 | 2018-01-11 20:40:47 +0800 | [diff] [blame] | 20 | #include <dt-bindings/clock/qcom,aop-qmp.h> |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 21 | |
| 22 | / { |
| 23 | model = "Qualcomm Technologies, Inc. SDX POORWILLS"; |
| 24 | compatible = "qcom,sdxpoorwills"; |
Jeevan Shriram | 71f2f49 | 2017-11-21 13:13:00 -0800 | [diff] [blame] | 25 | qcom,msm-id = <334 0x0>, <335 0x0>; |
Archana Sathyakumar | 0a81d72 | 2017-11-01 10:59:33 -0600 | [diff] [blame] | 26 | interrupt-parent = <&pdc>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 27 | |
| 28 | reserved-memory { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <1>; |
| 31 | ranges; |
| 32 | |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 33 | peripheral2_mem: peripheral2_region@8fe00000 { |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 34 | compatible = "removed-dma-pool"; |
| 35 | no-map; |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 36 | reg = <0x8fe00000 0x200000>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 37 | label = "peripheral2_mem"; |
| 38 | }; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 39 | |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 40 | sbl_region: sbl_region@8fd00000 { |
| 41 | no-map; |
| 42 | reg = <0x8fd00000 0x100000>; |
| 43 | label = "sbl_mem"; |
| 44 | }; |
| 45 | |
Sudarshan Rajagopalan | 6542374 | 2018-03-12 13:02:19 -0700 | [diff] [blame] | 46 | flex_sec_apps_mem: flex_sec_apps_regions@8fcfd000 { |
| 47 | no-map; |
| 48 | reg = <0x8fcfd000 0x3000>; |
| 49 | }; |
| 50 | |
| 51 | access_control_mem: access_control_mem@8fc80000 { |
| 52 | no-map; |
| 53 | reg = <0x8fc80000 0x40000>; |
| 54 | }; |
| 55 | |
Raghavendra Rao Ananta | b929788 | 2017-11-28 17:15:15 -0800 | [diff] [blame] | 56 | hyp_region: hyp_region@8fc00000 { |
| 57 | no-map; |
| 58 | reg = <0x8fc00000 0x80000>; |
| 59 | label = "hyp_mem"; |
| 60 | }; |
| 61 | |
| 62 | mss_mem: mss_region@87400000 { |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 63 | compatible = "removed-dma-pool"; |
| 64 | no-map; |
Raghavendra Rao Ananta | 3314e0f | 2017-12-01 14:08:51 -0800 | [diff] [blame] | 65 | reg = <0x87400000 0x8300000>; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 66 | label = "mss_mem"; |
| 67 | }; |
Xiaoyu Ye | 84364ce | 2017-10-20 16:02:43 -0700 | [diff] [blame] | 68 | |
| 69 | audio_mem: audio_region@0 { |
| 70 | compatible = "shared-dma-pool"; |
| 71 | reusable; |
| 72 | size = <0x400000>; |
| 73 | }; |
Mao Jinlong | 5f1ac6c | 2018-02-27 21:41:43 +0800 | [diff] [blame] | 74 | |
| 75 | dump_mem: mem_dump_region { |
| 76 | compatible = "shared-dma-pool"; |
| 77 | reusable; |
| 78 | size = <0 0x2400000>; |
| 79 | }; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | cpus { |
| 83 | #size-cells = <0>; |
| 84 | #address-cells = <1>; |
| 85 | |
| 86 | CPU0: cpu@0 { |
Mao Jinlong | 207749c | 2018-01-16 16:26:39 +0800 | [diff] [blame] | 87 | device_type = "cpu"; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 88 | compatible = "arm,cortex-a7"; |
Archana Sathyakumar | 0a81d72 | 2017-11-01 10:59:33 -0600 | [diff] [blame] | 89 | enable-method = "psci"; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 90 | reg = <0x0>; |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 91 | #cooling-cells = <2>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 92 | }; |
| 93 | }; |
| 94 | |
Sahitya Tummala | 61f1d32 | 2017-06-06 13:49:19 +0530 | [diff] [blame] | 95 | aliases { |
| 96 | qpic_nand1 = &qnand_1; |
Tony Truong | 65dc748 | 2017-10-24 15:22:06 -0700 | [diff] [blame] | 97 | pci-domain0 = &pcie0; |
Umang Agrawal | 5151381 | 2017-11-02 18:18:54 +0530 | [diff] [blame] | 98 | sdhc1 = &sdhc_1; /* SDC1 eMMC/SD/SDIO slot */ |
Sahitya Tummala | 61f1d32 | 2017-06-06 13:49:19 +0530 | [diff] [blame] | 99 | }; |
| 100 | |
Archana Sathyakumar | 0a81d72 | 2017-11-01 10:59:33 -0600 | [diff] [blame] | 101 | psci { |
| 102 | compatible = "arm,psci-1.0"; |
| 103 | method = "smc"; |
| 104 | }; |
| 105 | |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 106 | soc: soc { }; |
| 107 | }; |
| 108 | |
| 109 | |
| 110 | &soc { |
| 111 | #address-cells = <1>; |
| 112 | #size-cells = <1>; |
| 113 | ranges; |
| 114 | |
| 115 | intc: interrupt-controller@17800000 { |
| 116 | compatible = "qcom,msm-qgic2"; |
| 117 | interrupt-controller; |
| 118 | #interrupt-cells = <3>; |
| 119 | reg = <0x17800000 0x1000>, |
| 120 | <0x17802000 0x1000>; |
Archana Sathyakumar | 0a81d72 | 2017-11-01 10:59:33 -0600 | [diff] [blame] | 121 | interrupt-parent = <&intc>; |
| 122 | }; |
| 123 | |
| 124 | pdc: interrupt-controller@b210000{ |
| 125 | compatible = "qcom,pdc-sdxpoorwills"; |
| 126 | reg = <0xb210000 0x30000>; |
| 127 | #interrupt-cells = <3>; |
| 128 | interrupt-parent = <&intc>; |
| 129 | interrupt-controller; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 130 | }; |
| 131 | |
| 132 | timer { |
| 133 | compatible = "arm,armv7-timer"; |
| 134 | interrupts = <1 13 0xf08>, |
| 135 | <1 12 0xf08>, |
| 136 | <1 10 0xf08>, |
| 137 | <1 11 0xf08>; |
| 138 | clock-frequency = <19200000>; |
| 139 | }; |
| 140 | |
| 141 | timer@17820000 { |
| 142 | #address-cells = <1>; |
| 143 | #size-cells = <1>; |
| 144 | ranges; |
| 145 | compatible = "arm,armv7-timer-mem"; |
| 146 | reg = <0x17820000 0x1000>; |
| 147 | clock-frequency = <19200000>; |
| 148 | |
| 149 | frame@17821000 { |
| 150 | frame-number = <0>; |
| 151 | interrupts = <0 7 0x4>, |
| 152 | <0 6 0x4>; |
| 153 | reg = <0x17821000 0x1000>, |
| 154 | <0x17822000 0x1000>; |
| 155 | }; |
| 156 | |
| 157 | frame@17823000 { |
| 158 | frame-number = <1>; |
| 159 | interrupts = <0 8 0x4>; |
| 160 | reg = <0x17823000 0x1000>; |
| 161 | status = "disabled"; |
| 162 | }; |
| 163 | |
| 164 | frame@17824000 { |
| 165 | frame-number = <2>; |
| 166 | interrupts = <0 9 0x4>; |
| 167 | reg = <0x17824000 0x1000>; |
| 168 | status = "disabled"; |
| 169 | }; |
| 170 | |
| 171 | frame@17825000 { |
| 172 | frame-number = <3>; |
| 173 | interrupts = <0 10 0x4>; |
| 174 | reg = <0x17825000 0x1000>; |
| 175 | status = "disabled"; |
| 176 | }; |
| 177 | |
| 178 | frame@17826000 { |
| 179 | frame-number = <4>; |
| 180 | interrupts = <0 11 0x4>; |
| 181 | reg = <0x17826000 0x1000>; |
| 182 | status = "disabled"; |
| 183 | }; |
| 184 | |
| 185 | frame@17827000 { |
| 186 | frame-number = <5>; |
| 187 | interrupts = <0 12 0x4>; |
| 188 | reg = <0x17827000 0x1000>; |
| 189 | status = "disabled"; |
| 190 | }; |
| 191 | |
| 192 | frame@17828000 { |
| 193 | frame-number = <6>; |
| 194 | interrupts = <0 13 0x4>; |
| 195 | reg = <0x17828000 0x1000>; |
| 196 | status = "disabled"; |
| 197 | }; |
| 198 | |
| 199 | frame@17829000 { |
| 200 | frame-number = <7>; |
| 201 | interrupts = <0 14 0x4>; |
| 202 | reg = <0x17829000 0x1000>; |
| 203 | status = "disabled"; |
| 204 | }; |
| 205 | }; |
| 206 | |
Jonathan Avila | d59c0df | 2017-12-04 13:53:45 -0800 | [diff] [blame] | 207 | msm_cpufreq: qcom,msm-cpufreq { |
| 208 | compatible = "qcom,msm-cpufreq"; |
| 209 | clocks = <&clock_cpu APCS_CLK>; |
| 210 | clock-names = "cpu0_clk"; |
| 211 | |
| 212 | qcom,cpufreq-table-0 = |
| 213 | < 153600 >, |
| 214 | < 300000 >, |
| 215 | < 345600 >, |
| 216 | < 576000 >, |
| 217 | < 1094400 >, |
| 218 | < 1497600 >; |
| 219 | }; |
| 220 | |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 221 | clock_gcc: qcom,gcc@100000 { |
Vicky Wallace | 15d7732 | 2017-12-06 19:22:05 -0800 | [diff] [blame] | 222 | compatible = "qcom,gcc-sdxpoorwills", "syscon"; |
Vicky Wallace | 8ca25b9 | 2017-09-20 18:21:59 -0700 | [diff] [blame] | 223 | reg = <0x100000 0x1f0000>; |
| 224 | reg-names = "cc_base"; |
| 225 | vdd_cx-supply = <&pmxpoorwills_s5_level>; |
| 226 | vdd_cx_ao-supply = <&pmxpoorwills_s5_level_ao>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 227 | #clock-cells = <1>; |
Deepak Katragadda | ef38d7b | 2017-05-30 15:29:19 -0700 | [diff] [blame] | 228 | #reset-cells = <1>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 229 | }; |
| 230 | |
Amit Nischal | 226ef5b | 2017-09-07 12:56:07 +0530 | [diff] [blame] | 231 | clock_cpu: qcom,clock-a7@17808100 { |
| 232 | compatible = "qcom,cpu-sdxpoorwills"; |
| 233 | clocks = <&clock_rpmh RPMH_CXO_CLK_A>; |
| 234 | clock-names = "xo_ao"; |
| 235 | qcom,a7cc-init-rate = <1497600000>; |
| 236 | reg = <0x17808100 0x7F10>; |
| 237 | reg-names = "apcs_pll"; |
| 238 | qcom,rcg-reg-offset = <0x7F08>; |
| 239 | |
| 240 | vdd_dig_ao-supply = <&pmxpoorwills_s5_level_ao>; |
| 241 | cpu-vdd-supply = <&pmxpoorwills_s5_level_ao>; |
| 242 | qcom,speed0-bin-v0 = |
| 243 | < 0 RPMH_REGULATOR_LEVEL_OFF>, |
| 244 | < 345600000 RPMH_REGULATOR_LEVEL_LOW_SVS>, |
| 245 | < 576000000 RPMH_REGULATOR_LEVEL_SVS>, |
| 246 | < 1094400000 RPMH_REGULATOR_LEVEL_NOM>, |
| 247 | < 1497600000 RPMH_REGULATOR_LEVEL_TURBO>; |
Osvaldo Banuelos | 3964117 | 2017-04-10 13:51:35 -0700 | [diff] [blame] | 248 | #clock-cells = <1>; |
| 249 | }; |
| 250 | |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 251 | clock_rpmh: qcom,rpmhclk { |
Tirupathi Reddy | eaf28a2 | 2017-10-31 09:32:02 +0530 | [diff] [blame] | 252 | compatible = "qcom,rpmh-clk-sdxpoorwills"; |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 253 | #clock-cells = <1>; |
Tirupathi Reddy | eaf28a2 | 2017-10-31 09:32:02 +0530 | [diff] [blame] | 254 | mboxes = <&apps_rsc 0>; |
| 255 | mbox-names = "apps"; |
Osvaldo Banuelos | 139d779 | 2017-05-03 13:58:54 -0700 | [diff] [blame] | 256 | }; |
| 257 | |
Mao Jinlong | 0b02a04 | 2018-01-11 20:40:47 +0800 | [diff] [blame] | 258 | clock_aop: qcom,aopclk { |
| 259 | compatible = "qcom,aop-qmp-clk-v1"; |
| 260 | #clock-cells = <1>; |
| 261 | mboxes = <&qmp_aop 0>; |
| 262 | mbox-names = "qdss_clk"; |
| 263 | }; |
| 264 | |
David Dai | 34103b3 | 2017-12-01 15:16:20 -0800 | [diff] [blame] | 265 | snoc_cnoc_keepalive: qcom,snoc_cnoc_keepalive { |
| 266 | compatible = "qcom,devbw"; |
| 267 | governor = "powersave"; |
| 268 | qcom,src-dst-ports = <53 747>; |
| 269 | qcom,active-only; |
| 270 | status = "ok"; |
| 271 | qcom,bw-tbl = |
| 272 | < 1 >; |
| 273 | }; |
| 274 | |
Vicky Wallace | 15d7732 | 2017-12-06 19:22:05 -0800 | [diff] [blame] | 275 | clock_debug: qcom,cc-debug { |
| 276 | compatible = "qcom,debugcc-sdxpoorwills"; |
| 277 | qcom,gcc = <&clock_gcc>; |
| 278 | clock-names = "xo_clk_src"; |
| 279 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 280 | #clock-cells = <1>; |
| 281 | }; |
| 282 | |
Jeevan Shriram | a99fb5b | 2017-11-28 08:13:04 -0800 | [diff] [blame] | 283 | serial_uart: serial@831000 { |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 284 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| 285 | reg = <0x831000 0x200>; |
| 286 | interrupts = <0 26 0>; |
| 287 | status = "disabled"; |
Vicky Wallace | df79778 | 2017-10-27 17:35:34 -0700 | [diff] [blame] | 288 | clocks = <&clock_gcc GCC_BLSP1_UART3_APPS_CLK>, |
Runmin Wang | 8dce5869 | 2017-05-01 15:19:18 -0700 | [diff] [blame] | 289 | <&clock_gcc GCC_BLSP1_AHB_CLK>; |
| 290 | clock-names = "core", "iface"; |
Jeevan Shriram | 5e00d53 | 2018-03-27 16:18:30 -0700 | [diff] [blame] | 291 | pinctrl-names = "default", "sleep"; |
| 292 | pinctrl-0 = <&uart3_console_active>; |
| 293 | pinctrl-1 = <&uart3_console_sleep>; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 294 | }; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 295 | |
| 296 | gdsc_usb30: qcom,gdsc@10b004 { |
| 297 | compatible = "qcom,gdsc"; |
| 298 | regulator-name = "gdsc_usb30"; |
| 299 | reg = <0x0010b004 0x4>; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 300 | }; |
| 301 | |
Yan He | bd0e961 | 2017-07-06 16:21:41 -0700 | [diff] [blame] | 302 | qcom,sps { |
| 303 | compatible = "qcom,msm_sps_4k"; |
| 304 | qcom,pipe-attr-ee; |
| 305 | }; |
| 306 | |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 307 | gdsc_pcie: qcom,gdsc@137004 { |
| 308 | compatible = "qcom,gdsc"; |
| 309 | regulator-name = "gdsc_pcie"; |
| 310 | reg = <0x00137004 0x4>; |
Vicky Wallace | 8ca25b9 | 2017-09-20 18:21:59 -0700 | [diff] [blame] | 311 | }; |
| 312 | |
Yan He | 43b854f | 2017-12-20 10:37:45 -0800 | [diff] [blame] | 313 | pcie_ep: qcom,pcie@40002000 { |
| 314 | compatible = "qcom,pcie-ep"; |
| 315 | |
| 316 | reg = <0x40002000 0x1000>, |
| 317 | <0x40000000 0xf1d>, |
| 318 | <0x40000f20 0xa8>, |
| 319 | <0x40001000 0x1000>, |
| 320 | <0x01c00000 0x2000>, |
| 321 | <0x01c02000 0x1000>, |
| 322 | <0x01c04000 0x1000>; |
| 323 | reg-names = "msi", "dm_core", "elbi", "iatu", "parf", |
| 324 | "phy", "mmio"; |
| 325 | |
| 326 | #address-cells = <0>; |
| 327 | interrupt-parent = <&pcie_ep>; |
| 328 | interrupts = <0>; |
| 329 | #interrupt-cells = <1>; |
| 330 | interrupt-map-mask = <0xffffffff>; |
| 331 | interrupt-map = <0 &intc 0 140 0>; |
| 332 | interrupt-names = "int_global"; |
| 333 | |
| 334 | pinctrl-names = "default"; |
| 335 | pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default |
| 336 | &pcie_ep_wake_default>; |
| 337 | |
| 338 | clkreq-gpio = <&tlmm 56 0>; |
| 339 | perst-gpio = <&tlmm 57 0>; |
| 340 | wake-gpio = <&tlmm 53 0>; |
| 341 | |
| 342 | gdsc-vdd-supply = <&gdsc_pcie>; |
| 343 | vreg-1.8-supply = <&pmxpoorwills_l1>; |
| 344 | vreg-0.9-supply = <&pmxpoorwills_l4>; |
| 345 | |
| 346 | qcom,vreg-1.8-voltage-level = <1200000 1200000 24000>; |
| 347 | qcom,vreg-0.9-voltage-level = <872000 872000 24000>; |
| 348 | |
| 349 | clocks = <&clock_gcc GCC_PCIE_PIPE_CLK>, |
| 350 | <&clock_gcc GCC_PCIE_CFG_AHB_CLK>, |
| 351 | <&clock_gcc GCC_PCIE_MSTR_AXI_CLK>, |
| 352 | <&clock_gcc GCC_PCIE_SLV_AXI_CLK>, |
| 353 | <&clock_gcc GCC_PCIE_AUX_CLK>, |
| 354 | <&clock_gcc GCC_PCIE_0_CLKREF_CLK>, |
| 355 | <&clock_gcc GCC_PCIE_SLEEP_CLK>, |
| 356 | <&clock_gcc GCC_PCIE_SLV_Q2A_AXI_CLK>; |
| 357 | |
| 358 | clock-names = "pcie_0_pipe_clk", "pcie_0_cfg_ahb_clk", |
| 359 | "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", |
| 360 | "pcie_0_aux_clk", "pcie_0_ldo", |
| 361 | "pcie_0_sleep_clk", |
| 362 | "pcie_0_slv_q2a_axi_clk"; |
| 363 | |
| 364 | resets = <&clock_gcc GCC_PCIE_BCR>, |
| 365 | <&clock_gcc GCC_PCIE_PHY_BCR>; |
| 366 | |
| 367 | reset-names = "pcie_0_core_reset", |
| 368 | "pcie_0_phy_reset"; |
| 369 | |
| 370 | qcom,msm-bus,name = "pcie-ep"; |
| 371 | qcom,msm-bus,num-cases = <2>; |
| 372 | qcom,msm-bus,num-paths = <1>; |
| 373 | qcom,msm-bus,vectors-KBps = |
| 374 | <45 512 0 0>, |
| 375 | <45 512 500 800>; |
| 376 | |
| 377 | qcom,pcie-link-speed = <2>; |
| 378 | qcom,pcie-phy-ver = <6>; |
| 379 | qcom,pcie-active-config; |
| 380 | qcom,pcie-aggregated-irq; |
| 381 | qcom,pcie-mhi-a7-irq; |
| 382 | qcom,phy-status-reg = <0x814>; |
| 383 | |
| 384 | qcom,phy-init = <0x840 0x001 0x0 0x1 |
| 385 | 0x094 0x000 0x0 0x1 |
| 386 | 0x058 0x00f 0x0 0x1 |
| 387 | 0x0a4 0x042 0x0 0x1 |
| 388 | 0x110 0x024 0x0 0x1 |
| 389 | 0x1bc 0x011 0x0 0x1 |
| 390 | 0x0bc 0x019 0x0 0x1 |
| 391 | 0x0b0 0x004 0x0 0x1 |
| 392 | 0x0ac 0x0ff 0x0 0x1 |
| 393 | 0x158 0x001 0x0 0x1 |
| 394 | 0x074 0x028 0x0 0x1 |
| 395 | 0x07c 0x00d 0x0 0x1 |
| 396 | 0x084 0x000 0x0 0x1 |
| 397 | 0x1b0 0x01d 0x0 0x1 |
| 398 | 0x1ac 0x056 0x0 0x1 |
| 399 | 0x04c 0x007 0x0 0x1 |
| 400 | 0x050 0x007 0x0 0x1 |
| 401 | 0x0f0 0x003 0x0 0x1 |
| 402 | 0x0ec 0x0fb 0x0 0x1 |
| 403 | 0x00c 0x002 0x0 0x1 |
| 404 | 0x29c 0x012 0x0 0x1 |
| 405 | 0x284 0x005 0x0 0x1 |
| 406 | 0x234 0x0d9 0x0 0x1 |
| 407 | 0x238 0x0cc 0x0 0x1 |
| 408 | 0x51c 0x003 0x0 0x1 |
| 409 | 0x518 0x01c 0x0 0x1 |
| 410 | 0x524 0x014 0x0 0x1 |
| 411 | 0x4ec 0x00e 0x0 0x1 |
| 412 | 0x4f0 0x04a 0x0 0x1 |
| 413 | 0x4f4 0x00f 0x0 0x1 |
| 414 | 0x5b4 0x004 0x0 0x1 |
| 415 | 0x434 0x07f 0x0 0x1 |
| 416 | 0x444 0x070 0x0 0x1 |
| 417 | 0x510 0x017 0x0 0x1 |
| 418 | 0x4d8 0x001 0x0 0x1 |
| 419 | 0x598 0x0e0 0x0 0x1 |
| 420 | 0x59c 0x0c8 0x0 0x1 |
| 421 | 0x5a0 0x0c8 0x0 0x1 |
| 422 | 0x5a4 0x009 0x0 0x1 |
| 423 | 0x5a8 0x0b1 0x0 0x1 |
| 424 | 0x584 0x024 0x0 0x1 |
| 425 | 0x588 0x0e4 0x0 0x1 |
| 426 | 0x58c 0x0ec 0x0 0x1 |
| 427 | 0x590 0x039 0x0 0x1 |
| 428 | 0x594 0x036 0x0 0x1 |
| 429 | 0x570 0x0ef 0x0 0x1 |
| 430 | 0x574 0x0ef 0x0 0x1 |
| 431 | 0x578 0x02f 0x0 0x1 |
| 432 | 0x57c 0x0d3 0x0 0x1 |
| 433 | 0x580 0x040 0x0 0x1 |
| 434 | 0x4fc 0x000 0x0 0x1 |
| 435 | 0x4f8 0x0c0 0x0 0x1 |
| 436 | 0x9a4 0x001 0x0 0x1 |
| 437 | 0x840 0x001 0x0 0x1 |
| 438 | 0x848 0x001 0x0 0x1 |
| 439 | 0x8a0 0x011 0x0 0x1 |
| 440 | 0x988 0x088 0x0 0x1 |
| 441 | 0x998 0x008 0x0 0x1 |
| 442 | 0x8dc 0x00d 0x0 0x1 |
| 443 | 0x800 0x000 0x0 0x1 |
| 444 | 0x844 0x003 0x0 0x1>; |
| 445 | |
| 446 | status = "disabled"; |
| 447 | }; |
| 448 | |
Siddartha Mohanadoss | 662c520 | 2018-02-20 15:43:44 -0800 | [diff] [blame] | 449 | mhi_device: mhi_dev@1c04000 { |
| 450 | compatible = "qcom,msm-mhi-dev"; |
| 451 | reg = <0x1c04000 0x1000>, |
| 452 | <0x1e22000 0x4>, |
| 453 | <0x1e22148 0x4>; |
| 454 | reg-names = "mhi_mmio_base", "ipa_uc_mbox_crdb", |
| 455 | "ipa_uc_mbox_erdb"; |
| 456 | qcom,mhi-ep-msi = <0>; |
| 457 | qcom,mhi-version = <0x1000000>; |
| 458 | qcom,use-ipa-software-channel; |
| 459 | interrupts = <0 145 0>; |
| 460 | interrupt-names = "mhi-device-inta"; |
| 461 | qcom,mhi-ifc-id = <0x030417cb>; |
| 462 | qcom,mhi-interrupt; |
| 463 | status = "disabled"; |
| 464 | }; |
| 465 | |
Vicky Wallace | 8ca25b9 | 2017-09-20 18:21:59 -0700 | [diff] [blame] | 466 | gdsc_emac: qcom,gdsc@147004 { |
| 467 | compatible = "qcom,gdsc"; |
| 468 | regulator-name = "gdsc_emac"; |
| 469 | reg = <0x00147004 0x4>; |
Osvaldo Banuelos | 8d9c87b | 2017-05-08 11:36:39 -0700 | [diff] [blame] | 470 | }; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 471 | |
Sahitya Tummala | 61f1d32 | 2017-06-06 13:49:19 +0530 | [diff] [blame] | 472 | qnand_1: nand@1b00000 { |
| 473 | compatible = "qcom,msm-nand"; |
| 474 | reg = < 0x01b00000 0x10000>, |
| 475 | <0x01b04000 0x1a000>; |
| 476 | reg-names = "nand_phys", |
| 477 | "bam_phys"; |
| 478 | qcom,reg-adjustment-offset = <0x4000>; |
| 479 | qcom,qpic-clk-rpmh; |
| 480 | |
| 481 | interrupts = <0 135 0>; |
| 482 | interrupt-names = "bam_irq"; |
| 483 | |
| 484 | qcom,msm-bus,name = "qpic_nand"; |
| 485 | qcom,msm-bus,num-cases = <2>; |
| 486 | qcom,msm-bus,num-paths = <1>; |
| 487 | |
| 488 | qcom,msm-bus,vectors-KBps = |
| 489 | <91 512 0 0>, |
| 490 | /* Voting for max b/w on PNOC bus for now */ |
| 491 | <91 512 400000 400000>; |
| 492 | |
| 493 | status = "disabled"; |
| 494 | }; |
| 495 | |
Umang Agrawal | 5151381 | 2017-11-02 18:18:54 +0530 | [diff] [blame] | 496 | sdhc_1: sdhci@8804000 { |
| 497 | compatible = "qcom,sdhci-msm-v5"; |
| 498 | reg = <0x8804000 0x1000>; |
| 499 | reg-names = "hc_mem"; |
| 500 | |
| 501 | interrupts = <0 210 0>, <0 227 0>; |
| 502 | interrupt-names = "hc_irq", "pwr_irq"; |
| 503 | |
| 504 | qcom,bus-width = <4>; |
| 505 | |
| 506 | qcom,msm-bus,name = "sdhc1"; |
| 507 | qcom,msm-bus,num-cases = <8>; |
| 508 | qcom,msm-bus,num-paths = <1>; |
| 509 | qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ |
| 510 | <78 512 1600 3200>, /* 400 KB/s*/ |
| 511 | <78 512 80000 160000>, /* 20 MB/s */ |
| 512 | <78 512 100000 200000>, /* 25 MB/s */ |
| 513 | <78 512 200000 400000>, /* 50 MB/s */ |
| 514 | <78 512 400000 800000>, /* 100 MB/s */ |
| 515 | <78 512 400000 800000>, /* 200 MB/s */ |
| 516 | <78 512 2048000 4096000>; /* Max. bandwidth */ |
| 517 | qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 |
| 518 | 100000000 200000000 4294967295>; |
| 519 | |
| 520 | /* PM QoS */ |
| 521 | qcom,pm-qos-cpu-groups = <0x0>; |
| 522 | qcom,pm-qos-cmdq-latency-us = <70>; |
| 523 | qcom,pm-qos-legacy-latency-us = <70>; |
| 524 | qcom,pm-qos-irq-type = "affine_cores"; |
| 525 | qcom,pm-qos-irq-cpu = <0>; |
| 526 | qcom,pm-qos-irq-latency = <70>; |
| 527 | |
| 528 | clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>, |
| 529 | <&clock_gcc GCC_SDCC1_APPS_CLK>; |
| 530 | clock-names = "iface_clk", "core_clk"; |
| 531 | |
Veerabhadrarao Badiganti | 0897625 | 2018-04-05 22:19:25 +0530 | [diff] [blame] | 532 | qcom,restore-after-cx-collapse; |
| 533 | |
Umang Agrawal | 5151381 | 2017-11-02 18:18:54 +0530 | [diff] [blame] | 534 | status = "disabled"; |
| 535 | }; |
| 536 | |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 537 | qcom,msm-imem@1468B000 { |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 538 | compatible = "qcom,msm-imem"; |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 539 | reg = <0x1468B000 0x1000>; /* Address and size of IMEM */ |
| 540 | ranges = <0x0 0x1468B000 0x1000>; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 541 | #address-cells = <1>; |
| 542 | #size-cells = <1>; |
| 543 | |
| 544 | mem_dump_table@10 { |
| 545 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 546 | reg = <0x10 8>; |
| 547 | }; |
| 548 | |
| 549 | restart_reason@65c { |
| 550 | compatible = "qcom,msm-imem-restart_reason"; |
| 551 | reg = <0x65c 4>; |
| 552 | }; |
| 553 | |
| 554 | boot_stats@6b0 { |
| 555 | compatible = "qcom,msm-imem-boot_stats"; |
| 556 | reg = <0x6b0 32>; |
| 557 | }; |
Raghavendra Rao Ananta | 2f2615d | 2017-10-26 10:51:32 -0700 | [diff] [blame] | 558 | |
| 559 | pil@94c { |
| 560 | compatible = "qcom,msm-imem-pil"; |
| 561 | reg = <0x94c 200>; |
| 562 | }; |
| 563 | |
| 564 | diag_dload@c8 { |
| 565 | compatible = "qcom,msm-imem-diag-dload"; |
| 566 | reg = <0xc8 200>; |
| 567 | }; |
Jeevan Shriram | f7fa290 | 2018-04-17 10:30:19 -0700 | [diff] [blame] | 568 | }; |
| 569 | |
| 570 | qcom,mpm2-sleep-counter@c221000 { |
| 571 | compatible = "qcom,mpm2-sleep-counter"; |
| 572 | reg = <0x0c221000 0x1000>; |
| 573 | clock-frequency = <32768>; |
| 574 | }; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 575 | |
Jeevan Shriram | b3a31b9 | 2017-12-11 09:53:13 -0800 | [diff] [blame] | 576 | restart@c264000 { |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 577 | compatible = "qcom,pshold"; |
Jeevan Shriram | b3a31b9 | 2017-12-11 09:53:13 -0800 | [diff] [blame] | 578 | reg = <0x0c264000 0x4>, |
| 579 | <0x01fd3000 0x4>; |
Runmin Wang | d039a4e | 2017-06-20 14:56:56 -0700 | [diff] [blame] | 580 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 581 | }; |
| 582 | |
Siddartha Mohanadoss | 6bbf859 | 2017-07-13 14:15:41 -0700 | [diff] [blame] | 583 | tsens0: tsens@c222000 { |
| 584 | compatible = "qcom,tsens24xx"; |
| 585 | reg = <0xc222000 0x4>, |
| 586 | <0xc263000 0x1ff>; |
| 587 | reg-names = "tsens_srot_physical", |
| 588 | "tsens_tm_physical"; |
| 589 | interrupts = <0 163 0>, <0 165 0>; |
| 590 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 591 | #thermal-sensor-cells = <1>; |
| 592 | }; |
| 593 | |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 594 | thermal_zones: thermal-zones { }; |
Siddartha Mohanadoss | 6bbf859 | 2017-07-13 14:15:41 -0700 | [diff] [blame] | 595 | |
Ghanim Fodi | c389d57 | 2017-08-03 17:56:27 +0300 | [diff] [blame] | 596 | qcom,ipa_fws { |
| 597 | compatible = "qcom,pil-tz-generic"; |
| 598 | qcom,pas-id = <0xf>; |
| 599 | qcom,firmware-name = "ipa_fws"; |
Michael Adisumarta | f0740fa | 2017-12-07 13:17:49 -0800 | [diff] [blame] | 600 | qcom,pil-force-shutdown; |
Ghanim Fodi | c389d57 | 2017-08-03 17:56:27 +0300 | [diff] [blame] | 601 | }; |
Tirupathi Reddy | 242c131 | 2017-08-17 11:01:16 +0530 | [diff] [blame] | 602 | |
| 603 | spmi_bus: qcom,spmi@c440000 { |
| 604 | compatible = "qcom,spmi-pmic-arb"; |
| 605 | reg = <0xc440000 0x1100>, |
| 606 | <0xc600000 0x2000000>, |
| 607 | <0xe600000 0x100000>, |
| 608 | <0xe700000 0xa0000>, |
| 609 | <0xc40a000 0x26000>; |
| 610 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 611 | interrupt-names = "periph_irq"; |
| 612 | interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>; |
| 613 | qcom,ee = <0>; |
| 614 | qcom,channel = <0>; |
| 615 | #address-cells = <2>; |
| 616 | #size-cells = <0>; |
| 617 | interrupt-controller; |
| 618 | #interrupt-cells = <4>; |
| 619 | cell-index = <0>; |
| 620 | }; |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 621 | |
| 622 | qcom,ipc-spinlock@1f40000 { |
| 623 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 624 | reg = <0x1f40000 0x8000>; |
| 625 | qcom,num-locks = <8>; |
| 626 | }; |
| 627 | |
| 628 | qcom,smem@8fe40000 { |
| 629 | compatible = "qcom,smem"; |
| 630 | reg = <0x8fe40000 0xc0000>, |
| 631 | <0x17811008 0x4>, |
| 632 | <0x1fd4000 0x8>; |
| 633 | reg-names = "smem", "irq-reg-base", |
| 634 | "smem_targ_info_reg"; |
| 635 | qcom,mpu-enabled; |
| 636 | }; |
| 637 | |
| 638 | qcom,glink-smem-native-xprt-modem@8fe40000 { |
| 639 | compatible = "qcom,glink-smem-native-xprt"; |
| 640 | reg = <0x8fe40000 0xc0000>, |
| 641 | <0x17811008 0x4>; |
| 642 | reg-names = "smem", "irq-reg-base"; |
Chris Lew | b9a1e96 | 2017-10-20 10:31:55 -0700 | [diff] [blame] | 643 | qcom,irq-mask = <0x8000>; |
| 644 | interrupts = <GIC_SPI 114 IRQ_TYPE_EDGE_RISING>; |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 645 | label = "mpss"; |
| 646 | }; |
| 647 | |
| 648 | qcom,ipc_router { |
| 649 | compatible = "qcom,ipc_router"; |
| 650 | qcom,node-id = <1>; |
| 651 | }; |
| 652 | |
| 653 | qcom,ipc_router_modem_xprt { |
| 654 | compatible = "qcom,ipc_router_glink_xprt"; |
| 655 | qcom,ch-name = "IPCRTR"; |
| 656 | qcom,xprt-remote = "mpss"; |
| 657 | qcom,glink-xprt = "smem"; |
| 658 | qcom,xprt-linkid = <1>; |
| 659 | qcom,xprt-version = <1>; |
| 660 | qcom,fragmented-data; |
| 661 | }; |
| 662 | |
Dhoat Harpal | 30c914c | 2018-04-10 20:55:40 +0530 | [diff] [blame] | 663 | qcom,glink-ssr-modem { |
| 664 | compatible = "qcom,glink_ssr"; |
| 665 | label = "modem"; |
| 666 | qcom,edge = "mpss"; |
| 667 | qcom,xprt = "smem"; |
| 668 | }; |
| 669 | |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 670 | qcom,glink_pkt { |
| 671 | compatible = "qcom,glinkpkt"; |
| 672 | |
| 673 | qcom,glinkpkt-at-mdm0 { |
| 674 | qcom,glinkpkt-transport = "smem"; |
| 675 | qcom,glinkpkt-edge = "mpss"; |
| 676 | qcom,glinkpkt-ch-name = "DS"; |
| 677 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 678 | }; |
| 679 | |
| 680 | qcom,glinkpkt-loopback_cntl { |
| 681 | qcom,glinkpkt-transport = "lloop"; |
| 682 | qcom,glinkpkt-edge = "local"; |
| 683 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 684 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 685 | }; |
| 686 | |
| 687 | qcom,glinkpkt-loopback_data { |
| 688 | qcom,glinkpkt-transport = "lloop"; |
| 689 | qcom,glinkpkt-edge = "local"; |
| 690 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 691 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 692 | }; |
| 693 | |
| 694 | qcom,glinkpkt-data40-cntl { |
| 695 | qcom,glinkpkt-transport = "smem"; |
| 696 | qcom,glinkpkt-edge = "mpss"; |
| 697 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 698 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 699 | }; |
| 700 | |
| 701 | qcom,glinkpkt-data1 { |
| 702 | qcom,glinkpkt-transport = "smem"; |
| 703 | qcom,glinkpkt-edge = "mpss"; |
| 704 | qcom,glinkpkt-ch-name = "DATA1"; |
| 705 | qcom,glinkpkt-dev-name = "smd7"; |
| 706 | }; |
| 707 | |
| 708 | qcom,glinkpkt-data4 { |
| 709 | qcom,glinkpkt-transport = "smem"; |
| 710 | qcom,glinkpkt-edge = "mpss"; |
| 711 | qcom,glinkpkt-ch-name = "DATA4"; |
| 712 | qcom,glinkpkt-dev-name = "smd8"; |
| 713 | }; |
| 714 | |
| 715 | qcom,glinkpkt-data11 { |
| 716 | qcom,glinkpkt-transport = "smem"; |
| 717 | qcom,glinkpkt-edge = "mpss"; |
| 718 | qcom,glinkpkt-ch-name = "DATA11"; |
| 719 | qcom,glinkpkt-dev-name = "smd11"; |
| 720 | }; |
| 721 | }; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 722 | |
| 723 | pil_modem: qcom,mss@4080000 { |
| 724 | compatible = "qcom,pil-tz-generic"; |
| 725 | reg = <0x4080000 0x100>; |
| 726 | interrupts = <0 250 1>; |
| 727 | |
| 728 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 729 | clock-names = "xo"; |
| 730 | qcom,proxy-clock-names = "xo"; |
| 731 | |
| 732 | vdd_cx-supply = <&pmxpoorwills_s5_level>; |
| 733 | qcom,proxy-reg-names = "vdd_cx"; |
| 734 | |
Raghavendra Rao Ananta | 198654b | 2018-01-10 11:30:26 -0800 | [diff] [blame] | 735 | qcom,pas-id = <4>; |
Satya Durga Srinivasu Prabhala | 12953b7 | 2017-07-24 16:50:55 -0700 | [diff] [blame] | 736 | qcom,smem-id = <421>; |
| 737 | qcom,proxy-timeout-ms = <10000>; |
| 738 | qcom,sysmon-id = <0>; |
| 739 | qcom,ssctl-instance-id = <0x12>; |
| 740 | qcom,firmware-name = "modem"; |
| 741 | memory-region = <&mss_mem>; |
| 742 | status = "ok"; |
| 743 | |
| 744 | /* GPIO inputs from mss */ |
| 745 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| 746 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| 747 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| 748 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| 749 | |
| 750 | /* GPIO output to mss */ |
| 751 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| 752 | }; |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 753 | |
| 754 | apps_rsc: mailbox@17840000 { |
| 755 | compatible = "qcom,tcs-drv"; |
| 756 | label = "apps_rsc"; |
| 757 | reg = <0x17840000 0x100>, <0x17840d00 0x3000>; |
| 758 | interrupts = <0 17 0>; |
| 759 | #mbox-cells = <1>; |
| 760 | qcom,drv-id = <1>; |
| 761 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 762 | <SLEEP_TCS 2>, |
| 763 | <WAKE_TCS 2>, |
| 764 | <CONTROL_TCS 1>; |
| 765 | }; |
| 766 | |
Mahesh Sivasubramanian | d306a2c | 2017-11-09 10:09:26 -0700 | [diff] [blame] | 767 | cmd_db: qcom,cmd-db@c37000c { |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 768 | compatible = "qcom,cmd-db"; |
Mahesh Sivasubramanian | d306a2c | 2017-11-09 10:09:26 -0700 | [diff] [blame] | 769 | reg = <0xc37000c 8>; |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 770 | }; |
| 771 | |
Mao Jinlong | 5f1ac6c | 2018-02-27 21:41:43 +0800 | [diff] [blame] | 772 | mem_dump { |
| 773 | compatible = "qcom,mem-dump"; |
| 774 | memory-region = <&dump_mem>; |
| 775 | |
| 776 | rpmh_dump { |
| 777 | qcom,dump-size = <0x2000000>; |
| 778 | qcom,dump-id = <0xec>; |
| 779 | }; |
| 780 | |
| 781 | fcm_dump { |
| 782 | qcom,dump-size = <0x8400>; |
| 783 | qcom,dump-id = <0xee>; |
| 784 | }; |
| 785 | |
| 786 | rpm_sw_dump { |
| 787 | qcom,dump-size = <0x28000>; |
| 788 | qcom,dump-id = <0xea>; |
| 789 | }; |
| 790 | |
| 791 | pmic_dump { |
| 792 | qcom,dump-size = <0x10000>; |
| 793 | qcom,dump-id = <0xe4>; |
| 794 | }; |
| 795 | |
| 796 | tmc_etf_dump { |
| 797 | qcom,dump-size = <0x10000>; |
| 798 | qcom,dump-id = <0xf0>; |
| 799 | }; |
| 800 | |
| 801 | tmc_etr_reg_dump { |
| 802 | qcom,dump-size = <0x1000>; |
| 803 | qcom,dump-id = <0x100>; |
| 804 | }; |
| 805 | |
| 806 | tmc_etf_reg_dump { |
| 807 | qcom,dump-size = <0x1000>; |
| 808 | qcom,dump-id = <0x101>; |
| 809 | }; |
| 810 | |
| 811 | misc_data_dump { |
| 812 | qcom,dump-size = <0x1000>; |
| 813 | qcom,dump-id = <0xe8>; |
| 814 | }; |
| 815 | |
| 816 | tpdm_swao_dump { |
| 817 | qcom,dump-size = <0x512>; |
| 818 | qcom,dump-id = <0xf2>; |
| 819 | }; |
| 820 | }; |
| 821 | |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 822 | qcom,msm_gsi { |
| 823 | compatible = "qcom,msm_gsi"; |
| 824 | }; |
| 825 | |
| 826 | qcom,rmnet-ipa { |
| 827 | compatible = "qcom,rmnet-ipa3"; |
| 828 | qcom,rmnet-ipa-ssr; |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 829 | }; |
| 830 | |
Mao Jinlong | b0bd8d0 | 2018-03-30 13:06:10 +0800 | [diff] [blame] | 831 | dcc: dcc_v2@10a2000 { |
| 832 | compatible = "qcom,dcc-v2"; |
| 833 | reg = <0x10a2000 0x1000>, |
| 834 | <0x10ae000 0x2000>; |
| 835 | reg-names = "dcc-base", "dcc-ram-base"; |
| 836 | |
| 837 | dcc-ram-offset = <0x6000>; |
| 838 | }; |
| 839 | |
Archana Sathyakumar | 3e365aa | 2017-04-27 13:35:54 -0600 | [diff] [blame] | 840 | system_pm { |
| 841 | compatible = "qcom,system-pm"; |
| 842 | mboxes = <&apps_rsc 0>; |
| 843 | }; |
Sunil Paidimarri | 6c422bc | 2017-10-05 12:41:32 -0700 | [diff] [blame] | 844 | |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 845 | ipa_hw: qcom,ipa@01e00000 { |
| 846 | compatible = "qcom,ipa"; |
| 847 | reg = <0x1e00000 0x34000>, |
| 848 | <0x1e04000 0x28000>; |
| 849 | reg-names = "ipa-base", "gsi-base"; |
| 850 | interrupts = |
| 851 | <0 241 0>, |
| 852 | <0 47 0>; |
| 853 | interrupt-names = "ipa-irq", "gsi-irq"; |
| 854 | qcom,ipa-hw-ver = <14>; /* IPA core version = IPAv4.0 */ |
| 855 | qcom,ipa-hw-mode = <0>; |
| 856 | qcom,ee = <0>; |
| 857 | qcom,use-ipa-tethering-bridge; |
Ghanim Fodi | bab254d | 2017-12-09 00:19:19 +0200 | [diff] [blame] | 858 | qcom,mhi-event-ring-id-limits = <9 10>; /* start and end */ |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 859 | qcom,modem-cfg-emb-pipe-flt; |
| 860 | qcom,use-ipa-pm; |
Michael Adisumarta | 2d9b6ff | 2018-03-08 12:26:59 -0800 | [diff] [blame] | 861 | qcom,arm-smmu; |
| 862 | qcom,smmu-fast-map; |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 863 | qcom,bandwidth-vote-for-ipa; |
| 864 | qcom,msm-bus,name = "ipa"; |
| 865 | qcom,msm-bus,num-cases = <5>; |
| 866 | qcom,msm-bus,num-paths = <4>; |
| 867 | qcom,msm-bus,vectors-KBps = |
| 868 | /* No vote */ |
| 869 | <90 512 0 0>, |
| 870 | <90 585 0 0>, |
| 871 | <1 676 0 0>, |
| 872 | <143 777 0 0>, |
| 873 | /* SVS2 */ |
| 874 | <90 512 3616000 7232000>, |
| 875 | <90 585 300000 600000>, |
| 876 | <1 676 90000 180000>, /*gcc_config_noc_clk_src */ |
| 877 | <143 777 0 120>, /* IB defined for IPA2X_clk in MHz*/ |
| 878 | /* SVS */ |
| 879 | <90 512 6640000 13280000>, |
| 880 | <90 585 400000 800000>, |
| 881 | <1 676 100000 200000>, |
| 882 | <143 777 0 250>, /* IB defined for IPA2X_clk in MHz*/ |
| 883 | /* NOMINAL */ |
| 884 | <90 512 10400000 20800000>, |
| 885 | <90 585 800000 1600000>, |
| 886 | <1 676 200000 400000>, |
| 887 | <143 777 0 440>, /* IB defined for IPA2X_clk in MHz*/ |
| 888 | /* TURBO */ |
| 889 | <90 512 10400000 20800000>, |
| 890 | <90 585 960000 1920000>, |
| 891 | <1 676 266000 532000>, |
| 892 | <143 777 0 500>; /* IB defined for IPA clk in MHz*/ |
| 893 | qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", |
| 894 | "TURBO"; |
| 895 | qcom,throughput-threshold = <310 600 1000>; |
| 896 | qcom,scaling-exceptions = <>; |
| 897 | |
Mohammed Javid | 906ee0c | 2018-03-06 20:39:35 +0530 | [diff] [blame] | 898 | /* ipa tz unlock registers */ |
| 899 | qcom,ipa-tz-unlock-reg = |
| 900 | <0x4043583c 0x1000>; /* 32-bit reg addr and size*/ |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 901 | |
| 902 | /* IPA RAM mmap */ |
| 903 | qcom,ipa-ram-mmap = < |
| 904 | 0x280 /* ofst_start; */ |
| 905 | 0x0 /* nat_ofst; */ |
| 906 | 0x0 /* nat_size; */ |
| 907 | 0x288 /* v4_flt_hash_ofst; */ |
| 908 | 0x78 /* v4_flt_hash_size; */ |
| 909 | 0x4000 /* v4_flt_hash_size_ddr; */ |
| 910 | 0x308 /* v4_flt_nhash_ofst; */ |
| 911 | 0x78 /* v4_flt_nhash_size; */ |
| 912 | 0x4000 /* v4_flt_nhash_size_ddr; */ |
| 913 | 0x388 /* v6_flt_hash_ofst; */ |
| 914 | 0x78 /* v6_flt_hash_size; */ |
| 915 | 0x4000 /* v6_flt_hash_size_ddr; */ |
| 916 | 0x408 /* v6_flt_nhash_ofst; */ |
| 917 | 0x78 /* v6_flt_nhash_size; */ |
| 918 | 0x4000 /* v6_flt_nhash_size_ddr; */ |
| 919 | 0xf /* v4_rt_num_index; */ |
| 920 | 0x0 /* v4_modem_rt_index_lo; */ |
| 921 | 0x7 /* v4_modem_rt_index_hi; */ |
| 922 | 0x8 /* v4_apps_rt_index_lo; */ |
| 923 | 0xe /* v4_apps_rt_index_hi; */ |
| 924 | 0x488 /* v4_rt_hash_ofst; */ |
| 925 | 0x78 /* v4_rt_hash_size; */ |
| 926 | 0x4000 /* v4_rt_hash_size_ddr; */ |
| 927 | 0x508 /* v4_rt_nhash_ofst; */ |
| 928 | 0x78 /* v4_rt_nhash_size; */ |
| 929 | 0x4000 /* v4_rt_nhash_size_ddr; */ |
| 930 | 0xf /* v6_rt_num_index; */ |
| 931 | 0x0 /* v6_modem_rt_index_lo; */ |
| 932 | 0x7 /* v6_modem_rt_index_hi; */ |
| 933 | 0x8 /* v6_apps_rt_index_lo; */ |
| 934 | 0xe /* v6_apps_rt_index_hi; */ |
| 935 | 0x588 /* v6_rt_hash_ofst; */ |
| 936 | 0x78 /* v6_rt_hash_size; */ |
| 937 | 0x4000 /* v6_rt_hash_size_ddr; */ |
| 938 | 0x608 /* v6_rt_nhash_ofst; */ |
| 939 | 0x78 /* v6_rt_nhash_size; */ |
| 940 | 0x4000 /* v6_rt_nhash_size_ddr; */ |
| 941 | 0x688 /* modem_hdr_ofst; */ |
| 942 | 0x140 /* modem_hdr_size; */ |
| 943 | 0x7c8 /* apps_hdr_ofst; */ |
| 944 | 0x0 /* apps_hdr_size; */ |
| 945 | 0x800 /* apps_hdr_size_ddr; */ |
| 946 | 0x7d0 /* modem_hdr_proc_ctx_ofst; */ |
| 947 | 0x200 /* modem_hdr_proc_ctx_size; */ |
| 948 | 0x9d0 /* apps_hdr_proc_ctx_ofst; */ |
| 949 | 0x200 /* apps_hdr_proc_ctx_size; */ |
| 950 | 0x0 /* apps_hdr_proc_ctx_size_ddr; */ |
| 951 | 0x0 /* modem_comp_decomp_ofst; diff */ |
| 952 | 0x0 /* modem_comp_decomp_size; diff */ |
| 953 | 0x13f0 /* modem_ofst; */ |
| 954 | 0x100c /* modem_size; */ |
| 955 | 0x23fc /* apps_v4_flt_hash_ofst; */ |
| 956 | 0x0 /* apps_v4_flt_hash_size; */ |
| 957 | 0x23fc /* apps_v4_flt_nhash_ofst; */ |
| 958 | 0x0 /* apps_v4_flt_nhash_size; */ |
| 959 | 0x23fc /* apps_v6_flt_hash_ofst; */ |
| 960 | 0x0 /* apps_v6_flt_hash_size; */ |
| 961 | 0x23fc /* apps_v6_flt_nhash_ofst; */ |
| 962 | 0x0 /* apps_v6_flt_nhash_size; */ |
| 963 | 0x80 /* uc_info_ofst; */ |
| 964 | 0x200 /* uc_info_size; */ |
| 965 | 0x2800 /* end_ofst; */ |
| 966 | 0x23fc /* apps_v4_rt_hash_ofst; */ |
| 967 | 0x0 /* apps_v4_rt_hash_size; */ |
| 968 | 0x23fc /* apps_v4_rt_nhash_ofst; */ |
| 969 | 0x0 /* apps_v4_rt_nhash_size; */ |
| 970 | 0x23fc /* apps_v6_rt_hash_ofst; */ |
| 971 | 0x0 /* apps_v6_rt_hash_size; */ |
| 972 | 0x23fc /* apps_v6_rt_nhash_ofst; */ |
| 973 | 0x0 /* apps_v6_rt_nhash_size; */ |
| 974 | 0x2400 /* uc_event_ring_ofst; */ |
| 975 | 0x400 /* uc_event_ring_size;*/ |
| 976 | 0xbd8 /* pdn_config_ofst; */ |
| 977 | 0x50 /* pdn_config_size; */ |
| 978 | 0xc30 /* stats_quota_ofst */ |
| 979 | 0x60 /* stats_quota_size */ |
| 980 | 0xc90 /* stats_tethering_ofst */ |
| 981 | 0x140 /* stats_tethering_size */ |
| 982 | 0xdd0 /* stats_flt_v4_ofst */ |
| 983 | 0x180 /* stats_flt_v4_size */ |
| 984 | 0xf50 /* stats_flt_v6_ofst */ |
| 985 | 0x180 /* stats_flt_v6_size */ |
| 986 | 0x10d0 /* stats_rt_v4_ofst */ |
| 987 | 0x180 /* stats_rt_v4_size */ |
| 988 | 0x1250 /* stats_rt_v6_ofst */ |
| 989 | 0x180 /* stats_rt_v6_size */ |
| 990 | 0x13d0 /* stats_drop_ofst */ |
| 991 | 0x20 /* stats_drop_size */ |
| 992 | >; |
| 993 | |
| 994 | /* smp2p gpio information */ |
| 995 | qcom,smp2pgpio_map_ipa_1_out { |
| 996 | compatible = "qcom,smp2pgpio-map-ipa-1-out"; |
| 997 | gpios = <&smp2pgpio_ipa_1_out 0 0>; |
| 998 | }; |
| 999 | |
| 1000 | qcom,smp2pgpio_map_ipa_1_in { |
| 1001 | compatible = "qcom,smp2pgpio-map-ipa-1-in"; |
| 1002 | gpios = <&smp2pgpio_ipa_1_in 0 0>; |
| 1003 | }; |
Michael Adisumarta | 2d9b6ff | 2018-03-08 12:26:59 -0800 | [diff] [blame] | 1004 | |
| 1005 | ipa_smmu_ap: ipa_smmu_ap { |
| 1006 | compatible = "qcom,ipa-smmu-ap-cb"; |
| 1007 | qcom,smmu-s1-bypass; |
| 1008 | iommus = <&apps_smmu 0x5E0 0x0>; |
| 1009 | qcom,iova-mapping = <0x20000000 0x40000000>; |
| 1010 | qcom,additional-mapping = |
| 1011 | /* modem tables in IMEM */ |
| 1012 | <0x14686000 0x14686000 0x3000>; |
Michael Adisumarta | 56e8287 | 2018-04-06 10:56:05 -0700 | [diff] [blame] | 1013 | qcom,ipa-q6-smem-size = <16384>; |
Michael Adisumarta | 2d9b6ff | 2018-03-08 12:26:59 -0800 | [diff] [blame] | 1014 | }; |
| 1015 | |
| 1016 | ipa_smmu_wlan: ipa_smmu_wlan { |
| 1017 | compatible = "qcom,ipa-smmu-wlan-cb"; |
| 1018 | qcom,smmu-s1-bypass; |
| 1019 | iommus = <&apps_smmu 0x5E1 0x0>; |
| 1020 | qcom,additional-mapping = |
| 1021 | /* ipa-uc ram */ |
| 1022 | <0x1E60000 0x1E60000 0xA000>; |
| 1023 | }; |
| 1024 | |
| 1025 | ipa_smmu_uc: ipa_smmu_uc { |
| 1026 | compatible = "qcom,ipa-smmu-uc-cb"; |
| 1027 | qcom,smmu-s1-bypass; |
| 1028 | iommus = <&apps_smmu 0x5E2 0x0>; |
| 1029 | qcom,iova-mapping = <0x40000000 0x20000000>; |
| 1030 | }; |
Michael Adisumarta | 062cf64 | 2017-12-05 15:06:09 -0800 | [diff] [blame] | 1031 | }; |
| 1032 | |
Chris Lew | a4245c9 | 2017-10-11 16:34:51 -0700 | [diff] [blame] | 1033 | qmp_aop: qcom,qmp-aop@c300000 { |
| 1034 | compatible = "qcom,qmp-mbox"; |
| 1035 | label = "aop"; |
| 1036 | reg = <0xc300000 0x400>, |
| 1037 | <0x17811008 0x4>; |
| 1038 | reg-names = "msgram", "irq-reg-base"; |
Chris Lew | 72a4bb0 | 2017-12-06 17:40:44 -0800 | [diff] [blame] | 1039 | qcom,irq-mask = <0x2>; |
Chris Lew | a4245c9 | 2017-10-11 16:34:51 -0700 | [diff] [blame] | 1040 | interrupts = <GIC_SPI 221 IRQ_TYPE_EDGE_RISING>; |
| 1041 | priority = <0>; |
| 1042 | mbox-desc-offset = <0x0>; |
| 1043 | #mbox-cells = <1>; |
| 1044 | }; |
Anirudh Ghayal | fe98881 | 2018-01-10 10:21:54 +0530 | [diff] [blame] | 1045 | |
Anirudh Ghayal | eddac03 | 2018-02-16 22:48:20 +0530 | [diff] [blame] | 1046 | vbus_detect: qcom,pmd-vbus-det { |
| 1047 | compatible = "qcom,pmd-vbus-det"; |
Anirudh Ghayal | fe98881 | 2018-01-10 10:21:54 +0530 | [diff] [blame] | 1048 | interrupt-parent = <&spmi_bus>; |
| 1049 | interrupts = <0x0 0x0d 0x0 IRQ_TYPE_NONE>; |
Anirudh Ghayal | eddac03 | 2018-02-16 22:48:20 +0530 | [diff] [blame] | 1050 | interrupt-names = "usb_vbus"; |
Anirudh Ghayal | fe98881 | 2018-01-10 10:21:54 +0530 | [diff] [blame] | 1051 | status = "disabled"; |
| 1052 | }; |
Jeevan Shriram | 97101d5 | 2018-02-07 14:51:22 -0800 | [diff] [blame] | 1053 | |
| 1054 | qcom,wdt@17817000{ |
| 1055 | compatible = "qcom,msm-watchdog"; |
| 1056 | reg = <0x17817000 0x1000>; |
| 1057 | reg-names = "wdt-base"; |
| 1058 | interrupts = <1 3 0>, <1 2 0>; |
| 1059 | qcom,bark-time = <11000>; |
| 1060 | qcom,pet-time = <10000>; |
| 1061 | }; |
Jeevan Shriram | 465ef8d | 2018-02-09 15:02:51 -0800 | [diff] [blame] | 1062 | |
Brahmaji K | a42631c | 2018-02-08 18:12:40 +0530 | [diff] [blame] | 1063 | qcom_rng: qrng@793000{ |
| 1064 | compatible = "qcom,msm-rng"; |
| 1065 | reg = <0x793000 0x1000>; |
| 1066 | qcom,msm-rng-iface-clk; |
| 1067 | qcom,no-qrng-config; |
| 1068 | qcom,msm-bus,name = "msm-rng-noc"; |
| 1069 | qcom,msm-bus,num-cases = <2>; |
| 1070 | qcom,msm-bus,num-paths = <1>; |
| 1071 | qcom,msm-bus,vectors-KBps = |
| 1072 | <1 618 0 0>, /* No vote */ |
| 1073 | <1 618 0 800>; /* 100 KHz */ |
| 1074 | clocks = <&clock_gcc GCC_PRNG_AHB_CLK>; |
| 1075 | clock-names = "iface_clk"; |
| 1076 | }; |
| 1077 | |
Brahmaji K | 9791334 | 2018-02-08 17:58:00 +0530 | [diff] [blame] | 1078 | qcom_cedev: qcedev@1de0000 { |
| 1079 | compatible = "qcom,qcedev"; |
| 1080 | reg = <0x1de0000 0x20000>, |
| 1081 | <0x1dc4000 0x24000>; |
| 1082 | reg-names = "crypto-base","crypto-bam-base"; |
| 1083 | interrupts = <0 252 0>; |
| 1084 | qcom,bam-pipe-pair = <3>; |
| 1085 | qcom,ce-hw-instance = <0>; |
| 1086 | qcom,ce-device = <0>; |
| 1087 | qcom,bam-ee = <0>; |
| 1088 | qcom,ce-hw-shared; |
| 1089 | qcom,clk-mgmt-sus-res; |
| 1090 | qcom,msm-bus,name = "qcedev-noc"; |
| 1091 | qcom,msm-bus,num-cases = <2>; |
| 1092 | qcom,msm-bus,num-paths = <1>; |
| 1093 | qcom,msm-bus,vectors-KBps = |
| 1094 | <125 512 0 0>, |
| 1095 | <125 512 393600 393600>; |
| 1096 | clock-names = "core_clk_src", "core_clk", |
| 1097 | "iface_clk", "bus_clk"; |
| 1098 | clocks = <&clock_gcc GCC_CE1_CLK>, |
| 1099 | <&clock_gcc GCC_CE1_CLK>, |
| 1100 | <&clock_gcc GCC_CE1_AHB_CLK>, |
| 1101 | <&clock_gcc GCC_CE1_AXI_CLK>; |
| 1102 | qcom,ce-opp-freq = <171430000>; |
| 1103 | qcom,request-bw-before-clk; |
| 1104 | iommus = <&apps_smmu 0x66 0x1>, |
| 1105 | <&apps_smmu 0x76 0x1>; |
| 1106 | }; |
| 1107 | |
| 1108 | qcom_crypto: qcrypto@1de0000 { |
| 1109 | compatible = "qcom,qcrypto"; |
| 1110 | reg = <0x1de0000 0x20000>, |
| 1111 | <0x1dc4000 0x24000>; |
| 1112 | reg-names = "crypto-base","crypto-bam-base"; |
| 1113 | interrupts = <0 252 0>; |
| 1114 | qcom,bam-pipe-pair = <2>; |
| 1115 | qcom,ce-hw-instance = <0>; |
| 1116 | qcom,ce-device = <0>; |
| 1117 | qcom,bam-ee = <0>; |
| 1118 | qcom,ce-hw-shared; |
| 1119 | qcom,clk-mgmt-sus-res; |
| 1120 | qcom,msm-bus,name = "qcrypto-noc"; |
| 1121 | qcom,msm-bus,num-cases = <2>; |
| 1122 | qcom,msm-bus,num-paths = <1>; |
| 1123 | qcom,msm-bus,vectors-KBps = |
| 1124 | <125 512 0 0>, |
| 1125 | <125 512 393600 393600>; |
| 1126 | clock-names = "core_clk_src", "core_clk", |
| 1127 | "iface_clk", "bus_clk"; |
| 1128 | clocks = <&clock_gcc GCC_CE1_CLK>, |
| 1129 | <&clock_gcc GCC_CE1_CLK>, |
| 1130 | <&clock_gcc GCC_CE1_AHB_CLK>, |
| 1131 | <&clock_gcc GCC_CE1_AXI_CLK>; |
| 1132 | qcom,ce-opp-freq = <171430000>; |
| 1133 | qcom,request-bw-before-clk; |
| 1134 | qcom,use-sw-aes-cbc-ecb-ctr-algo; |
| 1135 | qcom,use-sw-aes-xts-algo; |
| 1136 | qcom,use-sw-aes-ccm-algo; |
| 1137 | qcom,use-sw-aead-algo; |
| 1138 | qcom,use-sw-ahash-algo; |
| 1139 | qcom,use-sw-hmac-algo; |
| 1140 | iommus = <&apps_smmu 0x64 0x1>, |
| 1141 | <&apps_smmu 0x74 0x1>; |
| 1142 | }; |
| 1143 | |
Jeevan Shriram | 465ef8d | 2018-02-09 15:02:51 -0800 | [diff] [blame] | 1144 | qcom,msm-rtb { |
| 1145 | compatible = "qcom,msm-rtb"; |
| 1146 | qcom,rtb-size = <0x100000>; |
| 1147 | }; |
jiad | a09bdec | 2018-01-29 22:46:37 +0800 | [diff] [blame] | 1148 | |
| 1149 | cnss_pcie: qcom,cnss { |
| 1150 | compatible = "qcom,cnss"; |
| 1151 | wlan-en-gpio = <&tlmm 52 0>; |
| 1152 | vdd-wlan-supply = <&vreg_wlan>; |
| 1153 | vdd-wlan-xtal-supply = <&pmxpoorwills_l6>; |
| 1154 | vdd-wlan-io-supply = <&pmxpoorwills_l6>; |
| 1155 | qcom,notify-modem-status; |
| 1156 | pinctrl-names = "wlan_en_active", "wlan_en_sleep"; |
| 1157 | pinctrl-0 = <&cnss_wlan_en_active>; |
| 1158 | pinctrl-1 = <&cnss_wlan_en_sleep>; |
| 1159 | qcom,wlan-rc-num = <0>; |
| 1160 | qcom,wlan-ramdump-dynamic = <0x200000>; |
| 1161 | |
| 1162 | qcom,msm-bus,name = "msm-cnss"; |
| 1163 | qcom,msm-bus,num-cases = <4>; |
| 1164 | qcom,msm-bus,num-paths = <2>; |
| 1165 | qcom,msm-bus,vectors-KBps = |
| 1166 | <45 512 0 0>, <1 512 0 0>, |
| 1167 | /* Upto 200 Mbps */ |
| 1168 | <45 512 41421 655360>, <1 512 41421 655360>, |
| 1169 | /* Upto 400 Mbps */ |
| 1170 | <45 512 98572 655360>, <1 512 98572 1600000>, |
| 1171 | /* Upto 800 Mbps */ |
| 1172 | <45 512 207108 1146880>, <1 512 207108 3124992>; |
| 1173 | }; |
| 1174 | |
| 1175 | cnss_sdio: qcom,cnss_sdio { |
| 1176 | compatible = "qcom,cnss_sdio"; |
| 1177 | subsys-name = "AR6320_SDIO"; |
| 1178 | vdd-wlan-supply = <&vreg_wlan>; |
jiad | a09bdec | 2018-01-29 22:46:37 +0800 | [diff] [blame] | 1179 | vdd-wlan-io-supply = <&pmxpoorwills_l6>; |
| 1180 | qcom,wlan-ramdump-dynamic = <0x200000>; |
| 1181 | pinctrl-names = "active", "sleep"; |
| 1182 | pinctrl-0 = <&cnss_sdio_active>; |
| 1183 | pinctrl-1 = <&cnss_sdio_sleep>; |
| 1184 | qcom,is-antenna-shared; |
| 1185 | status = "disabled"; |
| 1186 | }; |
Jeevan Shriram | dcb8b91 | 2017-03-19 20:27:35 -0700 | [diff] [blame] | 1187 | }; |
Anirudh Ghayal | 1a97b5c | 2017-05-03 16:16:26 +0530 | [diff] [blame] | 1188 | |
Tirupathi Reddy | 8cbe498 | 2017-08-17 12:01:11 +0530 | [diff] [blame] | 1189 | #include "pmxpoorwills.dtsi" |
Shrey Vijay | a139af9 | 2017-08-10 12:00:44 +0530 | [diff] [blame] | 1190 | #include "sdxpoorwills-blsp.dtsi" |
Anirudh Ghayal | 1a97b5c | 2017-05-03 16:16:26 +0530 | [diff] [blame] | 1191 | #include "sdxpoorwills-regulator.dtsi" |
Chris Lew | 929d9ba | 2017-08-11 14:42:55 -0700 | [diff] [blame] | 1192 | #include "sdxpoorwills-smp2p.dtsi" |
Devdutt Patnaik | 4ff5bcd6 | 2017-05-05 19:45:01 -0700 | [diff] [blame] | 1193 | #include "sdxpoorwills-usb.dtsi" |
Tony Truong | 65dc748 | 2017-10-24 15:22:06 -0700 | [diff] [blame] | 1194 | #include "sdxpoorwills-pcie.dtsi" |
David Dai | 8e41b1f | 2017-06-19 16:01:01 -0700 | [diff] [blame] | 1195 | #include "sdxpoorwills-bus.dtsi" |
Ram Chandrasekar | c6b9e8c | 2017-10-11 15:52:31 -0600 | [diff] [blame] | 1196 | #include "sdxpoorwills-thermal.dtsi" |
Xiaoyu Ye | 84364ce | 2017-10-20 16:02:43 -0700 | [diff] [blame] | 1197 | #include "sdxpoorwills-audio.dtsi" |
Sudarshan Rajagopalan | f99336d | 2017-06-02 14:44:48 -0700 | [diff] [blame] | 1198 | #include "sdxpoorwills-ion.dtsi" |
Sudarshan Rajagopalan | 2577314 | 2017-06-19 10:41:46 -0700 | [diff] [blame] | 1199 | #include "msm-arm-smmu-sdxpoorwills.dtsi" |
Mao Jinlong | 9c7f418 | 2018-01-11 20:48:58 +0800 | [diff] [blame] | 1200 | #include "sdxpoorwills-coresight.dtsi" |
skylar chang | 88a3009 | 2018-01-17 17:04:06 -0800 | [diff] [blame] | 1201 | |
| 1202 | &soc { |
| 1203 | emac_hw: qcom,emac@00020000 { |
| 1204 | compatible = "qcom,emac-dwc-eqos"; |
| 1205 | reg = <0x20000 0x10000>, |
skylar chang | 7964609 | 2018-01-25 16:11:17 -0800 | [diff] [blame] | 1206 | <0x36000 0x100>, |
| 1207 | <0x3900000 0x300000>; |
| 1208 | reg-names = "emac-base", "rgmii-base", "tlmm-central-base"; |
Sunil Paidimarri | 908e6e0 | 2018-03-23 15:12:58 -0700 | [diff] [blame] | 1209 | interrupts-extended = <&pdc 0 62 4>, <&pdc 0 60 4>, |
| 1210 | <&tlmm 84 2>, <&pdc 0 49 4>, |
| 1211 | <&pdc 0 50 4>, <&pdc 0 51 4>, |
| 1212 | <&pdc 0 52 4>, <&pdc 0 53 4>, |
| 1213 | <&pdc 0 54 4>, <&pdc 0 55 4>, |
| 1214 | <&pdc 0 56 4>, <&pdc 0 57 4>; |
skylar chang | 88a3009 | 2018-01-17 17:04:06 -0800 | [diff] [blame] | 1215 | interrupt-names = "sbd-intr", "lpi-intr", |
Sunil Paidimarri | fe19a65 | 2018-04-04 23:50:14 -0700 | [diff] [blame] | 1216 | "phy-intr", "tx-ch0-intr", |
skylar chang | 88a3009 | 2018-01-17 17:04:06 -0800 | [diff] [blame] | 1217 | "tx-ch1-intr", "tx-ch2-intr", |
| 1218 | "tx-ch3-intr", "tx-ch4-intr", |
| 1219 | "rx-ch0-intr", "rx-ch1-intr", |
| 1220 | "rx-ch2-intr", "rx-ch3-intr"; |
| 1221 | qcom,msm-bus,name = "emac"; |
| 1222 | qcom,msm-bus,num-cases = <3>; |
| 1223 | qcom,msm-bus,num-paths = <2>; |
| 1224 | qcom,msm-bus,vectors-KBps = |
| 1225 | <98 512 1250 0>, <1 781 0 40000>, /* 10Mbps vote */ |
| 1226 | <98 512 12500 0>, <1 781 0 40000>, /* 100Mbps vote */ |
| 1227 | <98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */ |
| 1228 | qcom,bus-vector-names = "10", "100", "1000"; |
| 1229 | clocks = <&clock_gcc GCC_ETH_AXI_CLK>, |
| 1230 | <&clock_gcc GCC_ETH_PTP_CLK>, |
| 1231 | <&clock_gcc GCC_ETH_RGMII_CLK>, |
| 1232 | <&clock_gcc GCC_ETH_SLAVE_AHB_CLK>; |
| 1233 | clock-names = "eth_axi_clk", "eth_ptp_clk", |
| 1234 | "eth_rgmii_clk", "eth_slave_ahb_clk"; |
| 1235 | qcom,phy-intr-redirect = <&tlmm 84 GPIO_ACTIVE_LOW>; |
| 1236 | qcom,phy-reset = <&tlmm 85 GPIO_ACTIVE_LOW>; |
| 1237 | vreg_rgmii-supply = <&vreg_rgmii>; |
| 1238 | vreg_emac_phy-supply = <&vreg_emac_phy>; |
| 1239 | vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>; |
| 1240 | gdsc_emac-supply = <&gdsc_emac>; |
| 1241 | io-macro-info { |
| 1242 | io-macro-bypass-mode = <0>; |
| 1243 | io-interface = "rgmii"; |
| 1244 | }; |
| 1245 | }; |
Sunil Paidimarri | 89db2d3 | 2018-02-28 13:47:28 -0800 | [diff] [blame] | 1246 | |
| 1247 | ess-instance { |
| 1248 | num_devices = <0x1>; |
| 1249 | ess-switch@0 { |
| 1250 | compatible = "qcom,ess-switch-qca83xx"; |
| 1251 | qcom,switch-access-mode = "mdio"; |
| 1252 | qcom,ar8327-initvals = < |
| 1253 | 0x0000c 0x7600000 /* PAD6_MODE */ |
| 1254 | 0x00008 0x0 /* PAD5_MODE */ |
| 1255 | 0x000e4 0xaa545 /* MAC_POWER_SEL */ |
| 1256 | 0x000e0 0xc74164de /* SGMII_CTRL */ |
| 1257 | 0x0007c 0x4e /* PORT0_STATUS */ |
| 1258 | 0x00094 0x4e /* PORT6_STATUS */ |
| 1259 | >; |
| 1260 | qcom,link-intr-gpio = <2>; |
| 1261 | qcom,switch-cpu-bmp = <0x40>; /* cpu port bitmap */ |
| 1262 | qcom,switch-lan-bmp = <0x3e>; /* lan port bitmap */ |
| 1263 | qcom,switch-wan-bmp = <0x0>; /* wan port bitmap */ |
| 1264 | }; |
| 1265 | }; |
skylar chang | 88a3009 | 2018-01-17 17:04:06 -0800 | [diff] [blame] | 1266 | }; |
Archana Sathyakumar | 0a81d72 | 2017-11-01 10:59:33 -0600 | [diff] [blame] | 1267 | |
| 1268 | #include "pmxpoorwills.dtsi" |
| 1269 | #include "sdxpoorwills-blsp.dtsi" |
| 1270 | #include "sdxpoorwills-regulator.dtsi" |
| 1271 | #include "sdxpoorwills-smp2p.dtsi" |
| 1272 | #include "sdxpoorwills-usb.dtsi" |
| 1273 | #include "sdxpoorwills-pcie.dtsi" |
| 1274 | #include "sdxpoorwills-bus.dtsi" |
| 1275 | #include "sdxpoorwills-thermal.dtsi" |
| 1276 | #include "sdxpoorwills-audio.dtsi" |
| 1277 | #include "sdxpoorwills-ion.dtsi" |
| 1278 | #include "msm-arm-smmu-sdxpoorwills.dtsi" |
| 1279 | #include "sdxpoorwills-pm.dtsi" |