viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 1 | /* |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 2 | * SPEAr platform shared irq layer header file |
| 3 | * |
Viresh Kumar | df1590d | 2012-11-12 22:56:03 +0530 | [diff] [blame] | 4 | * Copyright (C) 2009-2012 ST Microelectronics |
Viresh Kumar | 10d8935 | 2012-06-20 12:53:02 -0700 | [diff] [blame] | 5 | * Viresh Kumar <viresh.linux@gmail.com> |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public |
| 8 | * License version 2. This program is licensed "as is" without any |
| 9 | * warranty of any kind, whether express or implied. |
| 10 | */ |
| 11 | |
Viresh Kumar | df1590d | 2012-11-12 22:56:03 +0530 | [diff] [blame] | 12 | #ifndef __SPEAR_SHIRQ_H |
| 13 | #define __SPEAR_SHIRQ_H |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 14 | |
| 15 | #include <linux/irq.h> |
| 16 | #include <linux/types.h> |
| 17 | |
| 18 | /* |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 19 | * struct shirq_regs: shared irq register configuration |
| 20 | * |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 21 | * enb_reg: enable register offset |
| 22 | * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt |
| 23 | * status_reg: status register offset |
| 24 | * status_reg_mask: status register valid mask |
| 25 | * clear_reg: clear register offset |
| 26 | * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt |
| 27 | */ |
| 28 | struct shirq_regs { |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 29 | u32 enb_reg; |
| 30 | u32 reset_to_enb; |
| 31 | u32 status_reg; |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 32 | u32 clear_reg; |
| 33 | u32 reset_to_clear; |
| 34 | }; |
| 35 | |
| 36 | /* |
| 37 | * struct spear_shirq: shared irq structure |
| 38 | * |
| 39 | * irq: hardware irq number |
Shiraz Hashim | 80515a5a | 2012-08-03 15:33:10 +0530 | [diff] [blame] | 40 | * irq_base: base irq in linux domain |
| 41 | * irq_nr: no. of shared interrupts in a particular block |
| 42 | * irq_bit_off: starting bit offset in the status register |
| 43 | * invalid_irq: irq group is currently disabled |
| 44 | * base: base address of shared irq register |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 45 | * regs: register configuration for shared irq block |
| 46 | */ |
| 47 | struct spear_shirq { |
| 48 | u32 irq; |
Shiraz Hashim | 80515a5a | 2012-08-03 15:33:10 +0530 | [diff] [blame] | 49 | u32 irq_base; |
| 50 | u32 irq_nr; |
| 51 | u32 irq_bit_off; |
| 52 | int invalid_irq; |
| 53 | void __iomem *base; |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 54 | struct shirq_regs regs; |
| 55 | }; |
| 56 | |
Shiraz Hashim | 80515a5a | 2012-08-03 15:33:10 +0530 | [diff] [blame] | 57 | int __init spear300_shirq_of_init(struct device_node *np, |
| 58 | struct device_node *parent); |
| 59 | int __init spear310_shirq_of_init(struct device_node *np, |
| 60 | struct device_node *parent); |
| 61 | int __init spear320_shirq_of_init(struct device_node *np, |
| 62 | struct device_node *parent); |
viresh kumar | 4c18e77 | 2010-05-03 09:24:30 +0100 | [diff] [blame] | 63 | |
Viresh Kumar | df1590d | 2012-11-12 22:56:03 +0530 | [diff] [blame] | 64 | #endif /* __SPEAR_SHIRQ_H */ |