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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_IRQ_VECTORS_H
2#define _ASM_X86_IRQ_VECTORS_H
Thomas Gleixner9b7dc562008-05-02 20:10:09 +02003
4#include <linux/threads.h>
5
Ingo Molnar9fc2e792009-01-31 02:48:17 +01006/*
7 * Linux IRQ vector layout.
8 *
9 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
10 * be defined by Linux. They are used as a jump table by the CPU when a
11 * given vector is triggered - by a CPU-external, CPU-internal or
12 * software-triggered event.
13 *
14 * Linux sets the kernel code address each entry jumps to early during
15 * bootup, and never changes them. This is the general layout of the
16 * IDT entries:
17 *
18 * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
19 * Vectors 32 ... 127 : device interrupts
20 * Vector 128 : legacy int80 syscall interface
21 * Vectors 129 ... 237 : device interrupts
22 * Vectors 238 ... 255 : special interrupts
23 *
24 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
25 *
26 * This file enumerates the exact layout of them:
27 */
28
29#define NMI_VECTOR 0x02
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020030
31/*
32 * IDT vectors usable for external interrupt sources start
33 * at 0x20:
34 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010035#define FIRST_EXTERNAL_VECTOR 0x20
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020036
37#ifdef CONFIG_X86_32
Ingo Molnar9fc2e792009-01-31 02:48:17 +010038# define SYSCALL_VECTOR 0x80
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020039#else
Ingo Molnar9fc2e792009-01-31 02:48:17 +010040# define IA32_SYSCALL_VECTOR 0x80
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020041#endif
42
43/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020044 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
Yinghai Lu497c9a12008-08-19 20:50:28 -070045 * cleanup after irq migration.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020046 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010047#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020048
49/*
Yinghai Lu497c9a12008-08-19 20:50:28 -070050 * Vectors 0x30-0x3f are used for ISA interrupts.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020051 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010052#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
53
54#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
55#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
56#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
57#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
58#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
59#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
60#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
61#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
62#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
63#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
64#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
65#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
66#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
67#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
68#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020069
70/*
71 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
72 *
73 * some of the following vectors are 'rare', they are merged
74 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
75 * TLB, reschedule and local APIC vectors are performance-critical.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020076 */
Ingo Molnar5da690d2009-01-31 02:10:03 +010077
78#define SPURIOUS_APIC_VECTOR 0xff
Ingo Molnar647ad942009-01-31 02:06:50 +010079/*
80 * Sanity check
81 */
82#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
83# error SPURIOUS_APIC_VECTOR definition error
84#endif
85
Ingo Molnar5da690d2009-01-31 02:10:03 +010086#define ERROR_APIC_VECTOR 0xfe
87#define RESCHEDULE_VECTOR 0xfd
88#define CALL_FUNCTION_VECTOR 0xfc
89#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
90#define THERMAL_APIC_VECTOR 0xfa
91
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020092#ifdef CONFIG_X86_32
Tejun Heo02cf94c2009-01-21 17:26:06 +090093/* 0xf8 - 0xf9 : free */
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020094#else
Tejun Heo6dd01be2009-01-21 17:26:06 +090095# define THRESHOLD_APIC_VECTOR 0xf9
96# define UV_BAU_MESSAGE 0xf8
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020097#endif
98
Ingo Molnar5da690d2009-01-31 02:10:03 +010099/* f0-f7 used for spreading out TLB flushes: */
100#define INVALIDATE_TLB_VECTOR_END 0xf7
101#define INVALIDATE_TLB_VECTOR_START 0xf0
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100102#define NUM_INVALIDATE_TLB_VECTORS 8
Ingo Molnar5da690d2009-01-31 02:10:03 +0100103
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200104/*
105 * Local APIC timer IRQ vector is on a different priority level,
106 * to work around the 'lost local interrupt if more than 2 IRQ
107 * sources per level' errata.
108 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100109#define LOCAL_TIMER_VECTOR 0xef
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200110
111/*
Ingo Molnar193c81b2009-01-31 02:23:27 +0100112 * Performance monitoring interrupt vector:
113 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100114#define LOCAL_PERF_VECTOR 0xee
Ingo Molnar193c81b2009-01-31 02:23:27 +0100115
116/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200117 * First APIC vector available to drivers: (vectors 0x30-0xee) we
118 * start at 0x31(0x41) to spread out vectors evenly between priority
119 * levels. (0x80 is the syscall vector)
120 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100121#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200122
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100123#define NR_VECTORS 256
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200124
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100125#define FPU_IRQ 13
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200126
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100127#define FIRST_VM86_IRQ 3
128#define LAST_VM86_IRQ 15
129#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200130
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100131#define NR_IRQS_LEGACY 16
Yinghai Lu99d093d2008-12-05 18:58:32 -0800132
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100133#ifdef CONFIG_X86_IO_APIC
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800134
Mike Travis9332fcc2009-01-10 22:24:07 -0800135#include <asm/apicnum.h> /* need MAX_IO_APICS */
136
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800137#ifndef CONFIG_SPARSE_IRQ
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700138# if NR_CPUS < MAX_IO_APICS
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100139# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700140# else
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100141# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700142# endif
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800143#else
Yinghai Lu4a046d12009-01-12 17:39:24 -0800144# define NR_IRQS \
145 ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \
Mike Travis9332fcc2009-01-10 22:24:07 -0800146 (NR_VECTORS + (8 * NR_CPUS)) : \
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100147 (NR_VECTORS + (32 * MAX_IO_APICS)))
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800148#endif
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700149
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100150#else /* !CONFIG_X86_IO_APIC: */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100151# define NR_IRQS 16
Yinghai Lu1b489762008-11-04 14:10:13 -0800152#endif
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200153
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700154#endif /* _ASM_X86_IRQ_VECTORS_H */