Thomas Gleixner | e6bea9c | 2011-02-09 13:16:52 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Internal header to deal with irq_desc->status which will be renamed |
| 3 | * to irq_desc->settings. |
| 4 | */ |
| 5 | enum { |
| 6 | _IRQ_DEFAULT_INIT_FLAGS = IRQ_DEFAULT_INIT_FLAGS, |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame^] | 7 | _IRQ_PER_CPU = IRQ_PER_CPU, |
| 8 | _IRQ_NO_BALANCING = IRQ_NO_BALANCING, |
| 9 | _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, |
Thomas Gleixner | e6bea9c | 2011-02-09 13:16:52 +0100 | [diff] [blame] | 10 | }; |
Thomas Gleixner | 009b4c3 | 2011-02-07 21:48:49 +0100 | [diff] [blame] | 11 | |
| 12 | #undef IRQ_INPROGRESS |
| 13 | #define IRQ_INPROGRESS GOT_YOU_MORON |
Thomas Gleixner | 163ef30 | 2011-02-08 11:39:15 +0100 | [diff] [blame] | 14 | #undef IRQ_REPLAY |
| 15 | #define IRQ_REPLAY GOT_YOU_MORON |
| 16 | #undef IRQ_WAITING |
| 17 | #define IRQ_WAITING GOT_YOU_MORON |
Thomas Gleixner | c1594b7 | 2011-02-07 22:11:30 +0100 | [diff] [blame] | 18 | #undef IRQ_DISABLED |
| 19 | #define IRQ_DISABLED GOT_YOU_MORON |
Thomas Gleixner | 2a0d6fb | 2011-02-08 12:17:57 +0100 | [diff] [blame] | 20 | #undef IRQ_PENDING |
| 21 | #define IRQ_PENDING GOT_YOU_MORON |
Thomas Gleixner | 6e40262 | 2011-02-08 12:36:06 +0100 | [diff] [blame] | 22 | #undef IRQ_MASKED |
| 23 | #define IRQ_MASKED GOT_YOU_MORON |
Thomas Gleixner | 6d2cd17 | 2011-02-08 14:34:18 +0100 | [diff] [blame] | 24 | #undef IRQ_WAKEUP |
| 25 | #define IRQ_WAKEUP GOT_YOU_MORON |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 26 | #undef IRQ_MOVE_PENDING |
| 27 | #define IRQ_MOVE_PENDING GOT_YOU_MORON |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame^] | 28 | #undef IRQ_PER_CPU |
| 29 | #define IRQ_PER_CPU GOT_YOU_MORON |
| 30 | #undef IRQ_NO_BALANCING |
| 31 | #define IRQ_NO_BALANCING GOT_YOU_MORON |
| 32 | #undef IRQF_MODIFY_MASK |
| 33 | #define IRQF_MODIFY_MASK GOT_YOU_MORON |
| 34 | |
| 35 | static inline void |
| 36 | irq_settings_clr_and_set(struct irq_desc *desc, u32 clr, u32 set) |
| 37 | { |
| 38 | desc->status &= ~(clr & _IRQF_MODIFY_MASK); |
| 39 | desc->status |= (set & _IRQF_MODIFY_MASK); |
| 40 | } |
| 41 | |
| 42 | static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) |
| 43 | { |
| 44 | return desc->status & _IRQ_PER_CPU; |
| 45 | } |
| 46 | |
| 47 | static inline void irq_settings_set_per_cpu(struct irq_desc *desc) |
| 48 | { |
| 49 | desc->status |= _IRQ_PER_CPU; |
| 50 | } |
| 51 | |
| 52 | static inline void irq_settings_set_no_balancing(struct irq_desc *desc) |
| 53 | { |
| 54 | desc->status |= _IRQ_NO_BALANCING; |
| 55 | } |
| 56 | |
| 57 | static inline bool irq_settings_has_no_balance_set(struct irq_desc *desc) |
| 58 | { |
| 59 | return desc->status & _IRQ_NO_BALANCING; |
| 60 | } |