| Ohad Ben-Cohen | bd9a4c7 | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 1 | # |
| 2 | # Generic HWSPINLOCK framework |
| 3 | # |
| 4 | |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 5 | # HWSPINLOCK always gets selected by whoever wants it. |
| Ohad Ben-Cohen | bd9a4c7 | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 6 | config HWSPINLOCK |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 7 | tristate |
| Ohad Ben-Cohen | bd9a4c7 | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 8 | |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 9 | menu "Hardware Spinlock drivers" |
| Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 10 | |
| 11 | config HWSPINLOCK_OMAP |
| 12 | tristate "OMAP Hardware Spinlock device" |
| Suman Anna | ceca89e8 | 2014-07-02 18:01:00 -0500 | [diff] [blame] | 13 | depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 14 | select HWSPINLOCK |
| Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 15 | help |
| 16 | Say y here to support the OMAP Hardware Spinlock device (firstly |
| 17 | introduced in OMAP4). |
| 18 | |
| 19 | If unsure, say N. |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 20 | |
| Bjorn Andersson | 19a0f61 | 2015-03-24 10:11:05 -0700 | [diff] [blame] | 21 | config HWSPINLOCK_QCOM |
| 22 | tristate "Qualcomm Hardware Spinlock device" |
| 23 | depends on ARCH_QCOM |
| 24 | select HWSPINLOCK |
| 25 | select MFD_SYSCON |
| 26 | help |
| 27 | Say y here to support the Qualcomm Hardware Mutex functionality, which |
| 28 | provides a synchronisation mechanism for the various processors on |
| 29 | the SoC. |
| 30 | |
| 31 | If unsure, say N. |
| 32 | |
| Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 33 | config HWSPINLOCK_SIRF |
| 34 | tristate "SIRF Hardware Spinlock device" |
| 35 | depends on ARCH_SIRF |
| 36 | select HWSPINLOCK |
| 37 | help |
| 38 | Say y here to support the SIRF Hardware Spinlock device, which |
| 39 | provides a synchronisation mechanism for the various processors |
| 40 | on the SoC. |
| 41 | |
| 42 | It's safe to say n here if you're not interested in SIRF hardware |
| 43 | spinlock or just want a bare minimum kernel. |
| 44 | |
| Mathieu J. Poirier | f84a8ec | 2011-09-08 22:47:40 +0300 | [diff] [blame] | 45 | config HSEM_U8500 |
| 46 | tristate "STE Hardware Semaphore functionality" |
| 47 | depends on ARCH_U8500 |
| 48 | select HWSPINLOCK |
| 49 | help |
| 50 | Say y here to support the STE Hardware Semaphore functionality, which |
| 51 | provides a synchronisation mechanism for the various processor on the |
| 52 | SoC. |
| 53 | |
| 54 | If unsure, say N. |
| 55 | |
| Chris Lew | 63b2d6b | 2016-08-01 10:59:49 -0700 | [diff] [blame] | 56 | config REMOTE_SPINLOCK_MSM |
| 57 | bool "MSM Remote Spinlock Functionality" |
| 58 | depends on ARCH_QCOM |
| 59 | select HWSPINLOCK |
| 60 | help |
| 61 | Say y here to support the MSM Remote Spinlock functionality, which |
| 62 | provides a synchronisation mechanism for the various processor on the |
| 63 | SoC. |
| 64 | |
| 65 | If unsure, say N. |
| 66 | |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 67 | endmenu |