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Thomas Gleixnere1d91972008-01-30 13:30:37 +01001#ifndef __ASM_IO_APIC_H
2#define __ASM_IO_APIC_H
3
Akinobu Mitaa1a33fa2008-04-19 23:55:13 +09004#include <linux/types.h>
Thomas Gleixnere1d91972008-01-30 13:30:37 +01005#include <asm/mpspec.h>
6#include <asm/apicdef.h>
7
8/*
9 * Intel IO-APIC support for SMP and UP systems.
10 *
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */
13
Cyrill Gorcunovd3f020d2008-06-07 19:53:56 +040014/* I/O Unit Redirection Table */
15#define IO_APIC_REDIR_VECTOR_MASK 0x000FF
16#define IO_APIC_REDIR_DEST_LOGICAL 0x00800
17#define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
18#define IO_APIC_REDIR_SEND_PENDING (1 << 12)
19#define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
20#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
21#define IO_APIC_REDIR_MASKED (1 << 16)
22
Thomas Gleixnere1d91972008-01-30 13:30:37 +010023/*
24 * The structure of the IO-APIC:
25 */
26union IO_APIC_reg_00 {
27 u32 raw;
28 struct {
29 u32 __reserved_2 : 14,
30 LTS : 1,
31 delivery_type : 1,
32 __reserved_1 : 8,
33 ID : 8;
34 } __attribute__ ((packed)) bits;
35};
36
37union IO_APIC_reg_01 {
38 u32 raw;
39 struct {
40 u32 version : 8,
41 __reserved_2 : 7,
42 PRQ : 1,
43 entries : 8,
44 __reserved_1 : 8;
45 } __attribute__ ((packed)) bits;
46};
47
48union IO_APIC_reg_02 {
49 u32 raw;
50 struct {
51 u32 __reserved_2 : 24,
52 arbitration : 4,
53 __reserved_1 : 4;
54 } __attribute__ ((packed)) bits;
55};
56
57union IO_APIC_reg_03 {
58 u32 raw;
59 struct {
60 u32 boot_DT : 1,
61 __reserved_1 : 31;
62 } __attribute__ ((packed)) bits;
63};
64
65enum ioapic_irq_destination_types {
66 dest_Fixed = 0,
67 dest_LowestPrio = 1,
68 dest_SMI = 2,
69 dest__reserved_1 = 3,
70 dest_NMI = 4,
71 dest_INIT = 5,
72 dest__reserved_2 = 6,
73 dest_ExtINT = 7
74};
75
76struct IO_APIC_route_entry {
77 __u32 vector : 8,
78 delivery_mode : 3, /* 000: FIXED
79 * 001: lowest prio
80 * 111: ExtINT
81 */
82 dest_mode : 1, /* 0: physical, 1: logical */
83 delivery_status : 1,
84 polarity : 1,
85 irr : 1,
86 trigger : 1, /* 0: edge, 1: level */
87 mask : 1, /* 0: enabled, 1: disabled */
88 __reserved_2 : 15;
89
Thomas Gleixner96a388d2007-10-11 11:20:03 +020090#ifdef CONFIG_X86_32
Thomas Gleixnere1d91972008-01-30 13:30:37 +010091 union {
92 struct {
93 __u32 __reserved_1 : 24,
94 physical_dest : 4,
95 __reserved_2 : 4;
96 } physical;
97
98 struct {
99 __u32 __reserved_1 : 24,
100 logical_dest : 8;
101 } logical;
102 } dest;
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200103#else
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100104 __u32 __reserved_3 : 24,
105 dest : 8;
106#endif
107
108} __attribute__ ((packed));
109
110#ifdef CONFIG_X86_IO_APIC
111
112/*
113 * # of IO-APICs and # of IRQ routing registers
114 */
115extern int nr_ioapics;
116extern int nr_ioapic_registers[MAX_IO_APICS];
117
118/*
119 * MP-BIOS irq configuration table structures:
120 */
121
Akinobu Mitaa1a33fa2008-04-19 23:55:13 +0900122#define MP_MAX_IOAPIC_PIN 127
123
Alexey Starikovskiyec2cd0a2008-05-14 19:03:10 +0400124struct mp_config_ioapic {
125 unsigned long mp_apicaddr;
126 unsigned int mp_apicid;
127 unsigned char mp_type;
128 unsigned char mp_apicver;
129 unsigned char mp_flags;
130};
131
Alexey Starikovskiy2fddb6e282008-05-14 19:03:17 +0400132struct mp_config_intsrc {
133 unsigned int mp_dstapic;
134 unsigned char mp_type;
135 unsigned char mp_irqtype;
136 unsigned short mp_irqflag;
137 unsigned char mp_srcbus;
138 unsigned char mp_srcbusirq;
139 unsigned char mp_dstirq;
Alexey Starikovskiy9e5c5f12008-04-04 23:41:26 +0400140};
141
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100142/* I/O APIC entries */
Alexey Starikovskiyec2cd0a2008-05-14 19:03:10 +0400143extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100144
145/* # of MP IRQ source entries */
146extern int mp_irq_entries;
147
148/* MP IRQ source entries */
Alexey Starikovskiy2fddb6e282008-05-14 19:03:17 +0400149extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100150
151/* non-0 if default (table-less) MP configuration */
152extern int mpc_default_type;
153
154/* Older SiS APIC requires we rewrite the index register */
155extern int sis_apic_bug;
156
157/* 1 if "noapic" boot option passed */
158extern int skip_ioapic_setup;
159
Maciej W. Rozycki35542c52008-05-21 22:10:22 +0100160/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
161extern int timer_through_8259;
162
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100163static inline void disable_ioapic_setup(void)
164{
165 skip_ioapic_setup = 1;
166}
167
168/*
169 * If we use the IO-APIC for IRQ routing, disable automatic
170 * assignment of PCI IRQ's.
171 */
172#define io_apic_assign_pci_irqs \
173 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
174
175#ifdef CONFIG_ACPI
176extern int io_apic_get_unique_id(int ioapic, int apic_id);
177extern int io_apic_get_version(int ioapic);
178extern int io_apic_get_redir_entries(int ioapic);
179extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
180 int edge_level, int active_high_low);
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100181#endif /* CONFIG_ACPI */
182
183extern int (*ioapic_renumber_irq)(int ioapic, int irq);
184extern void ioapic_init_mappings(void);
185
186#else /* !CONFIG_X86_IO_APIC */
187#define io_apic_assign_pci_irqs 0
Maciej W. Rozycki35542c52008-05-21 22:10:22 +0100188static const int timer_through_8259 = 0;
Yinghai Luf3294a32008-06-27 01:41:56 -0700189static inline void ioapic_init_mappings(void) { }
Thomas Gleixnere1d91972008-01-30 13:30:37 +0100190#endif
191
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200192#endif