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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __X86_64_MMU_CONTEXT_H
2#define __X86_64_MMU_CONTEXT_H
3
Linus Torvalds1da177e2005-04-16 15:20:36 -07004#include <asm/pda.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005
Linus Torvalds1da177e2005-04-16 15:20:36 -07006static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
7{
Brian Gerste4b59392006-01-11 22:46:09 +01008#ifdef CONFIG_SMP
Joe Perchesc4fe7602008-03-23 01:02:43 -07009 if (read_pda(mmu_state) == TLBSTATE_OK)
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 write_pda(mmu_state, TLBSTATE_LAZY);
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#endif
Brian Gerste4b59392006-01-11 22:46:09 +010012}
Linus Torvalds1da177e2005-04-16 15:20:36 -070013
Joe Perchesc4fe7602008-03-23 01:02:43 -070014static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
Linus Torvalds1da177e2005-04-16 15:20:36 -070015 struct task_struct *tsk)
16{
17 unsigned cpu = smp_processor_id();
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
Akinobu Mita3d1712c2006-03-24 03:15:11 -080020 cpu_clear(cpu, prev->cpu_vm_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#ifdef CONFIG_SMP
22 write_pda(mmu_state, TLBSTATE_OK);
23 write_pda(active_mm, next);
24#endif
Akinobu Mita3d1712c2006-03-24 03:15:11 -080025 cpu_set(cpu, next->cpu_vm_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 load_cr3(next->pgd);
27
Joe Perchesc4fe7602008-03-23 01:02:43 -070028 if (unlikely(next->context.ldt != prev->context.ldt))
Glauber de Oliveira Costa881c2972008-01-30 13:31:14 +010029 load_LDT_nolock(&next->context);
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 }
31#ifdef CONFIG_SMP
32 else {
33 write_pda(mmu_state, TLBSTATE_OK);
34 if (read_pda(active_mm) != next)
Thomas Gleixner3abf0242008-01-30 13:30:28 +010035 BUG();
Akinobu Mita3d1712c2006-03-24 03:15:11 -080036 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
Joe Perchesc4fe7602008-03-23 01:02:43 -070037 /* We were in lazy tlb mode and leave_mm disabled
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 * tlb flush IPI delivery. We must reload CR3
39 * to make sure to use no freed page tables.
40 */
41 load_cr3(next->pgd);
Glauber de Oliveira Costa881c2972008-01-30 13:31:14 +010042 load_LDT_nolock(&next->context);
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 }
44 }
45#endif
46}
47
Joe Perchesc4fe7602008-03-23 01:02:43 -070048#define deactivate_mm(tsk, mm) \
49do { \
50 load_gs_index(0); \
51 asm volatile("movl %0,%%fs"::"r"(0)); \
52} while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070053
Linus Torvalds1da177e2005-04-16 15:20:36 -070054#endif