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Mike Frysinger5d1617b2008-04-24 05:03:26 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2007 David Rowe
4 * 2006 Intratrade Ltd.
5 * Ivan Danov <idanov@gmail.com>
6 * 2005 National ICT Australia (NICTA)
7 * Aidan Williams <aidan@nicta.com.au>
Mike Frysinger5d1617b2008-04-24 05:03:26 +08008 *
Robin Getz96f10502009-09-24 14:11:24 +00009 * Licensed under the GPL-2 or later.
Mike Frysinger5d1617b2008-04-24 05:03:26 +080010 */
11
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/mtd.h>
15#include <linux/mtd/partitions.h>
16#include <linux/spi/spi.h>
17#include <linux/spi/flash.h>
18#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19#include <linux/usb/isp1362.h>
20#endif
21#include <asm/irq.h>
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000022#include <asm/dma.h>
Mike Frysinger5d1617b2008-04-24 05:03:26 +080023#include <asm/bfin5xx_spi.h>
Mike Frysinger99e452e2009-12-03 23:37:07 +000024#include <asm/portmux.h>
Mike Frysinger5d1617b2008-04-24 05:03:26 +080025
26/*
27 * Name the Board for the /proc/cpuinfo
28 */
29const char bfin_board_name[] = "IP04/IP08";
30
31/*
32 * Driver needs to know address, irq and flag pin.
33 */
34#if defined(CONFIG_BFIN532_IP0X)
35#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
36
37#include <linux/dm9000.h>
38
39static struct resource dm9000_resource1[] = {
40 {
41 .start = 0x20100000,
42 .end = 0x20100000 + 1,
43 .flags = IORESOURCE_MEM
44 },{
45 .start = 0x20100000 + 2,
46 .end = 0x20100000 + 3,
47 .flags = IORESOURCE_MEM
48 },{
49 .start = IRQ_PF15,
50 .end = IRQ_PF15,
51 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
52 }
53};
54
55static struct resource dm9000_resource2[] = {
56 {
57 .start = 0x20200000,
58 .end = 0x20200000 + 1,
59 .flags = IORESOURCE_MEM
60 },{
61 .start = 0x20200000 + 2,
62 .end = 0x20200000 + 3,
63 .flags = IORESOURCE_MEM
64 },{
65 .start = IRQ_PF14,
66 .end = IRQ_PF14,
67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
68 }
69};
70
71/*
72* for the moment we limit ourselves to 16bit IO until some
73* better IO routines can be written and tested
74*/
75static struct dm9000_plat_data dm9000_platdata1 = {
76 .flags = DM9000_PLATF_16BITONLY,
77};
78
79static struct platform_device dm9000_device1 = {
80 .name = "dm9000",
81 .id = 0,
82 .num_resources = ARRAY_SIZE(dm9000_resource1),
83 .resource = dm9000_resource1,
84 .dev = {
85 .platform_data = &dm9000_platdata1,
86 }
87};
88
89static struct dm9000_plat_data dm9000_platdata2 = {
90 .flags = DM9000_PLATF_16BITONLY,
91};
92
93static struct platform_device dm9000_device2 = {
94 .name = "dm9000",
95 .id = 1,
96 .num_resources = ARRAY_SIZE(dm9000_resource2),
97 .resource = dm9000_resource2,
98 .dev = {
99 .platform_data = &dm9000_platdata2,
100 }
101};
102
103#endif
104#endif
105
106
107#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
108/* all SPI peripherals info goes here */
109
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800110#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
111static struct bfin5xx_spi_chip mmc_spi_chip_info = {
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800112 .enable_dma = 0, /* if 1 - block!!! */
113 .bits_per_word = 8,
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800114};
115#endif
116
117/* Notice: for blackfin, the speed_hz is the value of register
118 * SPI_BAUD, not the real baudrate */
119static struct spi_board_info bfin_spi_board_info[] __initdata = {
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800120#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800121 {
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800122 .modalias = "mmc_spi",
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800123 .max_speed_hz = 2,
124 .bus_num = 1,
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800125 .chip_select = 5,
126 .controller_data = &mmc_spi_chip_info,
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800127 },
128#endif
129};
130
131/* SPI controller data */
132static struct bfin5xx_spi_master spi_bfin_master_info = {
133 .num_chipselect = 8,
134 .enable_dma = 1, /* master has the ability to do dma transfer */
135};
136
137static struct platform_device spi_bfin_master_device = {
138 .name = "bfin-spi-master",
139 .id = 1, /* Bus number */
140 .dev = {
141 .platform_data = &spi_bfin_master_info, /* Passed to driver */
142 },
143};
144#endif /* spi master and devices */
145
146#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000147#ifdef CONFIG_SERIAL_BFIN_UART0
148static struct resource bfin_uart0_resources[] = {
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800149 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000150 .start = BFIN_UART_THR,
151 .end = BFIN_UART_GCTL+2,
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800152 .flags = IORESOURCE_MEM,
153 },
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000154 {
155 .start = IRQ_UART0_RX,
156 .end = IRQ_UART0_RX + 1,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = IRQ_UART0_ERROR,
161 .end = IRQ_UART0_ERROR,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
165 .start = CH_UART0_TX,
166 .end = CH_UART0_TX,
167 .flags = IORESOURCE_DMA,
168 },
169 {
170 .start = CH_UART0_RX,
171 .end = CH_UART0_RX,
172 .flags = IORESOURCE_DMA,
173 },
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800174};
175
Mike Frysingera8b19882010-11-24 09:23:04 +0000176static unsigned short bfin_uart0_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000177 P_UART0_TX, P_UART0_RX, 0
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800178};
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000179
180static struct platform_device bfin_uart0_device = {
181 .name = "bfin-uart",
182 .id = 0,
183 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
184 .resource = bfin_uart0_resources,
185 .dev = {
186 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
187 },
188};
189#endif
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800190#endif
191
Graf Yang5be36d22008-04-25 03:09:15 +0800192#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800193#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800194static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800195 {
196 .start = 0xFFC00400,
197 .end = 0xFFC004FF,
198 .flags = IORESOURCE_MEM,
199 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800200 {
201 .start = IRQ_UART0_RX,
202 .end = IRQ_UART0_RX+1,
203 .flags = IORESOURCE_IRQ,
204 },
205 {
206 .start = CH_UART0_RX,
207 .end = CH_UART0_RX+1,
208 .flags = IORESOURCE_DMA,
209 },
Graf Yang5be36d22008-04-25 03:09:15 +0800210};
211
Graf Yang42bd8bc2009-01-07 23:14:39 +0800212static struct platform_device bfin_sir0_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800213 .name = "bfin_sir",
214 .id = 0,
Graf Yang42bd8bc2009-01-07 23:14:39 +0800215 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
216 .resource = bfin_sir0_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800217};
218#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800219#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800220
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800221#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
222static struct resource isp1362_hcd_resources[] = {
223 {
224 .start = 0x20300000,
225 .end = 0x20300000 + 1,
226 .flags = IORESOURCE_MEM,
227 },{
228 .start = 0x20300000 + 2,
229 .end = 0x20300000 + 3,
230 .flags = IORESOURCE_MEM,
231 },{
232 .start = IRQ_PF11,
233 .end = IRQ_PF11,
Michael Hennerich9e758942010-03-18 12:51:49 +0000234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800235 },
236};
237
238static struct isp1362_platform_data isp1362_priv = {
239 .sel15Kres = 1,
240 .clknotstop = 0,
241 .oc_enable = 0, /* external OC */
242 .int_act_high = 0,
243 .int_edge_triggered = 0,
244 .remote_wakeup_connected = 0,
245 .no_power_switching = 1,
246 .power_switching_mode = 0,
247};
248
249static struct platform_device isp1362_hcd_device = {
250 .name = "isp1362-hcd",
251 .id = 0,
252 .dev = {
253 .platform_data = &isp1362_priv,
254 },
255 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
256 .resource = isp1362_hcd_resources,
257};
258#endif
259
260
261static struct platform_device *ip0x_devices[] __initdata = {
262#if defined(CONFIG_BFIN532_IP0X)
263#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
264 &dm9000_device1,
265 &dm9000_device2,
266#endif
267#endif
268
269#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
270 &spi_bfin_master_device,
271#endif
272
273#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000274#ifdef CONFIG_SERIAL_BFIN_UART0
275 &bfin_uart0_device,
276#endif
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800277#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800278
279#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800280#ifdef CONFIG_BFIN_SIR0
281 &bfin_sir0_device,
282#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800283#endif
284
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800285#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
286 &isp1362_hcd_device,
287#endif
288};
289
290static int __init ip0x_init(void)
291{
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800292 printk(KERN_INFO "%s(): registering device resources\n", __func__);
293 platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
294
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800295 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Mike Frysinger5d1617b2008-04-24 05:03:26 +0800296
297 return 0;
298}
299
300arch_initcall(ip0x_init);
Sonic Zhangc13ce9f2009-09-23 09:37:46 +0000301
302static struct platform_device *ip0x_early_devices[] __initdata = {
303#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
304#ifdef CONFIG_SERIAL_BFIN_UART0
305 &bfin_uart0_device,
306#endif
307#endif
308};
309
310void __init native_machine_early_platform_add_devices(void)
311{
312 printk(KERN_INFO "register early platform devices\n");
313 early_platform_add_devices(ip0x_early_devices,
314 ARRAY_SIZE(ip0x_early_devices));
315}