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Linus Walleij70ee6572012-11-20 22:39:49 +01001/*
2 * Clock driver for the ARM Integrator/IM-PD1 board
Linus Walleij8e048b92013-11-22 16:25:09 +01003 * Copyright (C) 2012-2013 Linus Walleij
Linus Walleij70ee6572012-11-20 22:39:49 +01004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/clk-provider.h>
10#include <linux/clk.h>
11#include <linux/clkdev.h>
12#include <linux/err.h>
13#include <linux/io.h>
14#include <linux/platform_data/clk-integrator.h>
15
Linus Walleij70ee6572012-11-20 22:39:49 +010016#include "clk-icst.h"
17
Linus Walleijcc0cc4c2014-02-13 20:07:26 +010018#define IMPD1_OSC1 0x00
19#define IMPD1_OSC2 0x04
20#define IMPD1_LOCK 0x08
21
Linus Walleij70ee6572012-11-20 22:39:49 +010022struct impd1_clk {
Linus Walleij222cb1b2014-04-15 10:29:45 +020023 char *pclkname;
24 struct clk *pclk;
Linus Walleij8e048b92013-11-22 16:25:09 +010025 char *vco1name;
26 struct clk *vco1clk;
27 char *vco2name;
28 struct clk *vco2clk;
29 struct clk *mmciclk;
30 char *uartname;
Linus Walleij70ee6572012-11-20 22:39:49 +010031 struct clk *uartclk;
Linus Walleij8e048b92013-11-22 16:25:09 +010032 char *spiname;
33 struct clk *spiclk;
34 char *scname;
35 struct clk *scclk;
Linus Walleij222cb1b2014-04-15 10:29:45 +020036 struct clk_lookup *clks[15];
Linus Walleij70ee6572012-11-20 22:39:49 +010037};
38
Linus Walleij8e048b92013-11-22 16:25:09 +010039/* One entry for each connected IM-PD1 LM */
Linus Walleij70ee6572012-11-20 22:39:49 +010040static struct impd1_clk impd1_clks[4];
41
42/*
Linus Walleij8e048b92013-11-22 16:25:09 +010043 * There are two VCO's on the IM-PD1
Linus Walleij70ee6572012-11-20 22:39:49 +010044 */
45
Linus Walleij8e048b92013-11-22 16:25:09 +010046static const struct icst_params impd1_vco1_params = {
Linus Walleij70ee6572012-11-20 22:39:49 +010047 .ref = 24000000, /* 24 MHz */
48 .vco_max = ICST525_VCO_MAX_3V,
49 .vco_min = ICST525_VCO_MIN,
50 .vd_min = 12,
51 .vd_max = 519,
52 .rd_min = 3,
53 .rd_max = 120,
54 .s2div = icst525_s2div,
55 .idx2s = icst525_idx2s,
56};
57
58static const struct clk_icst_desc impd1_icst1_desc = {
Linus Walleij8e048b92013-11-22 16:25:09 +010059 .params = &impd1_vco1_params,
Linus Walleij70ee6572012-11-20 22:39:49 +010060 .vco_offset = IMPD1_OSC1,
61 .lock_offset = IMPD1_LOCK,
62};
63
Linus Walleij8e048b92013-11-22 16:25:09 +010064static const struct icst_params impd1_vco2_params = {
65 .ref = 24000000, /* 24 MHz */
66 .vco_max = ICST525_VCO_MAX_3V,
67 .vco_min = ICST525_VCO_MIN,
68 .vd_min = 12,
69 .vd_max = 519,
70 .rd_min = 3,
71 .rd_max = 120,
72 .s2div = icst525_s2div,
73 .idx2s = icst525_idx2s,
74};
75
76static const struct clk_icst_desc impd1_icst2_desc = {
77 .params = &impd1_vco2_params,
78 .vco_offset = IMPD1_OSC2,
79 .lock_offset = IMPD1_LOCK,
80};
81
Linus Walleij70ee6572012-11-20 22:39:49 +010082/**
83 * integrator_impd1_clk_init() - set up the integrator clock tree
84 * @base: base address of the logic module (LM)
85 * @id: the ID of this LM
86 */
87void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
88{
89 struct impd1_clk *imc;
90 struct clk *clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +020091 struct clk *pclk;
Linus Walleij70ee6572012-11-20 22:39:49 +010092 int i;
93
94 if (id > 3) {
95 pr_crit("no more than 4 LMs can be attached\n");
96 return;
97 }
98 imc = &impd1_clks[id];
99
Linus Walleij222cb1b2014-04-15 10:29:45 +0200100 /* Register the fixed rate PCLK */
101 imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
102 pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL,
103 CLK_IS_ROOT, 0);
104 imc->pclk = pclk;
105
Linus Walleij8e048b92013-11-22 16:25:09 +0100106 imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);
Linus Walleijbf6edb42014-01-20 21:31:41 +0100107 clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL,
108 base);
Linus Walleijae6e6942013-11-22 11:30:05 +0100109 imc->vco1clk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200110 imc->clks[0] = clkdev_alloc(pclk, "apb_pclk", "lm%x:01000", id);
111 imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
Linus Walleij70ee6572012-11-20 22:39:49 +0100112
Linus Walleij8e048b92013-11-22 16:25:09 +0100113 /* VCO2 is also called "CLK2" */
114 imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id);
Linus Walleijbf6edb42014-01-20 21:31:41 +0100115 clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, NULL,
116 base);
Linus Walleij8e048b92013-11-22 16:25:09 +0100117 imc->vco2clk = clk;
118
119 /* MMCI uses CLK2 right off */
Linus Walleij222cb1b2014-04-15 10:29:45 +0200120 imc->clks[2] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00700", id);
121 imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100122
123 /* UART reference clock divides CLK2 by a fixed factor 4 */
124 imc->uartname = kasprintf(GFP_KERNEL, "lm%x-uartclk", id);
125 clk = clk_register_fixed_factor(NULL, imc->uartname, imc->vco2name,
126 CLK_IGNORE_UNUSED, 1, 4);
Linus Walleij70ee6572012-11-20 22:39:49 +0100127 imc->uartclk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200128 imc->clks[4] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00100", id);
129 imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
130 imc->clks[6] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00200", id);
131 imc->clks[7] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100132
133 /* SPI PL022 clock divides CLK2 by a fixed factor 64 */
134 imc->spiname = kasprintf(GFP_KERNEL, "lm%x-spiclk", id);
135 clk = clk_register_fixed_factor(NULL, imc->spiname, imc->vco2name,
136 CLK_IGNORE_UNUSED, 1, 64);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200137 imc->clks[8] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00300", id);
138 imc->clks[9] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
139
140 /* The GPIO blocks and AACI have only PCLK */
141 imc->clks[10] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00400", id);
142 imc->clks[11] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00500", id);
143 imc->clks[12] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00800", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100144
145 /* Smart Card clock divides CLK2 by a fixed factor 4 */
146 imc->scname = kasprintf(GFP_KERNEL, "lm%x-scclk", id);
147 clk = clk_register_fixed_factor(NULL, imc->scname, imc->vco2name,
148 CLK_IGNORE_UNUSED, 1, 4);
149 imc->scclk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200150 imc->clks[13] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00600", id);
151 imc->clks[14] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
Linus Walleij70ee6572012-11-20 22:39:49 +0100152
153 for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
154 clkdev_add(imc->clks[i]);
155}
Arnd Bergmanna218d7f2014-05-08 16:56:16 +0200156EXPORT_SYMBOL_GPL(integrator_impd1_clk_init);
Linus Walleij70ee6572012-11-20 22:39:49 +0100157
158void integrator_impd1_clk_exit(unsigned int id)
159{
160 int i;
161 struct impd1_clk *imc;
162
163 if (id > 3)
164 return;
165 imc = &impd1_clks[id];
166
167 for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
168 clkdev_drop(imc->clks[i]);
Linus Walleij8e048b92013-11-22 16:25:09 +0100169 clk_unregister(imc->spiclk);
Linus Walleij70ee6572012-11-20 22:39:49 +0100170 clk_unregister(imc->uartclk);
Linus Walleij8e048b92013-11-22 16:25:09 +0100171 clk_unregister(imc->vco2clk);
172 clk_unregister(imc->vco1clk);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200173 clk_unregister(imc->pclk);
Linus Walleij8e048b92013-11-22 16:25:09 +0100174 kfree(imc->scname);
175 kfree(imc->spiname);
176 kfree(imc->uartname);
177 kfree(imc->vco2name);
178 kfree(imc->vco1name);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200179 kfree(imc->pclkname);
Linus Walleij70ee6572012-11-20 22:39:49 +0100180}
Arnd Bergmanna218d7f2014-05-08 16:56:16 +0200181EXPORT_SYMBOL_GPL(integrator_impd1_clk_exit);