blob: 6d5444b58e6cffe2626b0eea0d864c0d47c9b7c0 [file] [log] [blame]
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27/*
28 * Set enviroment defines for rt2x00.h
29 */
30#define DRV_NAME "rt2500usb"
31
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/init.h>
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/usb.h>
38
39#include "rt2x00.h"
40#include "rt2x00usb.h"
41#include "rt2500usb.h"
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
56static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
57 const unsigned int offset,
58 u16 *value)
59{
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65}
66
67static inline void rt2500usb_register_multiread(const struct rt2x00_dev
68 *rt2x00dev,
69 const unsigned int offset,
70 void *value, const u16 length)
71{
72 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
73 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
74 USB_VENDOR_REQUEST_IN, offset,
75 value, length, timeout);
76}
77
78static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
79 const unsigned int offset,
80 u16 value)
81{
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 USB_VENDOR_REQUEST_OUT, offset,
85 &reg, sizeof(u16), REGISTER_TIMEOUT);
86}
87
88static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
89 *rt2x00dev,
90 const unsigned int offset,
91 void *value, const u16 length)
92{
93 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 value, length, timeout);
97}
98
99static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100{
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112}
113
114static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const unsigned int word, const u8 value)
116{
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137}
138
139static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const unsigned int word, u8 *value)
141{
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174}
175
176static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const unsigned int word, const u32 value)
178{
179 u16 reg;
180 unsigned int i;
181
182 if (!word)
183 return;
184
185 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
186 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
187 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
188 goto rf_write;
189 udelay(REGISTER_BUSY_DELAY);
190 }
191
192 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
193 return;
194
195rf_write:
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
198 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
199
200 reg = 0;
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
203 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
204 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
205
206 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
207 rt2x00_rf_write(rt2x00dev, word, value);
208}
209
210#ifdef CONFIG_RT2X00_LIB_DEBUGFS
211#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
212
213static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
214 const unsigned int word, u32 *data)
215{
216 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
217}
218
219static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
220 const unsigned int word, u32 data)
221{
222 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
223}
224
225static const struct rt2x00debug rt2500usb_rt2x00debug = {
226 .owner = THIS_MODULE,
227 .csr = {
228 .read = rt2500usb_read_csr,
229 .write = rt2500usb_write_csr,
230 .word_size = sizeof(u16),
231 .word_count = CSR_REG_SIZE / sizeof(u16),
232 },
233 .eeprom = {
234 .read = rt2x00_eeprom_read,
235 .write = rt2x00_eeprom_write,
236 .word_size = sizeof(u16),
237 .word_count = EEPROM_SIZE / sizeof(u16),
238 },
239 .bbp = {
240 .read = rt2500usb_bbp_read,
241 .write = rt2500usb_bbp_write,
242 .word_size = sizeof(u8),
243 .word_count = BBP_SIZE / sizeof(u8),
244 },
245 .rf = {
246 .read = rt2x00_rf_read,
247 .write = rt2500usb_rf_write,
248 .word_size = sizeof(u32),
249 .word_count = RF_SIZE / sizeof(u32),
250 },
251};
252#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
253
254/*
255 * Configuration handlers.
256 */
Ivo van Doorn4abee4b2007-10-06 14:11:46 +0200257static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
258 __le32 *mac)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700259{
Ivo van Doorn4abee4b2007-10-06 14:11:46 +0200260 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &mac,
261 (3 * sizeof(__le16)));
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700262}
263
Ivo van Doorn4abee4b2007-10-06 14:11:46 +0200264static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
265 __le32 *bssid)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700266{
Ivo van Doorn4abee4b2007-10-06 14:11:46 +0200267 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
268 (3 * sizeof(__le16)));
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700269}
270
Ivo van Doornfeb24692007-10-06 14:14:29 +0200271static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
272 const int tsf_sync)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700273{
274 u16 reg;
275
276 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
277
278 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700279 * Enable beacon config
280 */
281 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
282 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
283 (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6);
Ivo van Doornfeb24692007-10-06 14:14:29 +0200284 if (type == IEEE80211_IF_TYPE_STA)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700285 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
286 else
287 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
288 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
289
290 /*
291 * Enable synchronisation.
292 */
293 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
294 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
295 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
296
297 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
Johannes Berg4150c572007-09-17 01:29:23 -0400298 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
299 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700300 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
Ivo van Doornfeb24692007-10-06 14:14:29 +0200301 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
303}
304
305static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
306{
307 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
308 u16 reg;
309 u16 value;
310 u16 preamble;
311
312 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
313 preamble = SHORT_PREAMBLE;
314 else
315 preamble = PREAMBLE;
316
317 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
318
319 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
320
321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
322 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
323 SHORT_DIFS : DIFS) +
324 PLCP + preamble + get_duration(ACK_SIZE, 10);
325 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
326 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
327
328 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
329 if (preamble == SHORT_PREAMBLE)
330 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1);
331 else
332 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0);
333 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
334}
335
336static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
337 const int phymode)
338{
339 struct ieee80211_hw_mode *mode;
340 struct ieee80211_rate *rate;
341
342 if (phymode == MODE_IEEE80211A)
343 rt2x00dev->curr_hwmode = HWMODE_A;
344 else if (phymode == MODE_IEEE80211B)
345 rt2x00dev->curr_hwmode = HWMODE_B;
346 else
347 rt2x00dev->curr_hwmode = HWMODE_G;
348
349 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
350 rate = &mode->rates[mode->num_rates - 1];
351
352 rt2500usb_config_rate(rt2x00dev, rate->val2);
353
354 if (phymode == MODE_IEEE80211B) {
355 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
356 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
357 } else {
358 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
359 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
360 }
361}
362
363static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
364 const int index, const int channel,
365 const int txpower)
366{
367 struct rf_channel reg;
368
369 /*
370 * Fill rf_reg structure.
371 */
372 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
373
374 /*
375 * Set TXpower.
376 */
377 rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
378
379 /*
380 * For RT2525E we should first set the channel to half band higher.
381 */
382 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
383 static const u32 vals[] = {
384 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
385 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
386 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
387 0x00000902, 0x00000906
388 };
389
390 rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]);
391 if (reg.rf4)
392 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
393 }
394
395 rt2500usb_rf_write(rt2x00dev, 1, reg.rf1);
396 rt2500usb_rf_write(rt2x00dev, 2, reg.rf2);
397 rt2500usb_rf_write(rt2x00dev, 3, reg.rf3);
398 if (reg.rf4)
399 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
400}
401
402static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
403 const int txpower)
404{
405 u32 rf3;
406
407 rt2x00_rf_read(rt2x00dev, 3, &rf3);
408 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
409 rt2500usb_rf_write(rt2x00dev, 3, rf3);
410}
411
412static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
413 const int antenna_tx, const int antenna_rx)
414{
415 u8 r2;
416 u8 r14;
417 u16 csr5;
418 u16 csr6;
419
420 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
421 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
422 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
423 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
424
425 /*
426 * Configure the TX antenna.
427 */
428 switch (antenna_tx) {
429 case ANTENNA_SW_DIVERSITY:
430 case ANTENNA_HW_DIVERSITY:
431 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
432 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
433 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
434 break;
435 case ANTENNA_A:
436 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
437 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
438 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
439 break;
440 case ANTENNA_B:
441 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
442 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
443 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
444 break;
445 }
446
447 /*
448 * Configure the RX antenna.
449 */
450 switch (antenna_rx) {
451 case ANTENNA_SW_DIVERSITY:
452 case ANTENNA_HW_DIVERSITY:
453 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
454 break;
455 case ANTENNA_A:
456 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
457 break;
458 case ANTENNA_B:
459 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
460 break;
461 }
462
463 /*
464 * RT2525E and RT5222 need to flip TX I/Q
465 */
466 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
467 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
468 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
469 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
470 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
471
472 /*
473 * RT2525E does not need RX I/Q Flip.
474 */
475 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
476 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
477 } else {
478 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
479 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
480 }
481
482 rt2500usb_bbp_write(rt2x00dev, 2, r2);
483 rt2500usb_bbp_write(rt2x00dev, 14, r14);
484 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
485 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
486}
487
488static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
489 const int short_slot_time,
490 const int beacon_int)
491{
492 u16 reg;
493
494 rt2500usb_register_write(rt2x00dev, MAC_CSR10,
495 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
496
497 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
498 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
499 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
500}
501
502static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
503 const unsigned int flags,
504 struct ieee80211_conf *conf)
505{
506 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
507
508 if (flags & CONFIG_UPDATE_PHYMODE)
509 rt2500usb_config_phymode(rt2x00dev, conf->phymode);
510 if (flags & CONFIG_UPDATE_CHANNEL)
511 rt2500usb_config_channel(rt2x00dev, conf->channel_val,
512 conf->channel, conf->power_level);
513 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
514 rt2500usb_config_txpower(rt2x00dev, conf->power_level);
515 if (flags & CONFIG_UPDATE_ANTENNA)
516 rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx,
517 conf->antenna_sel_rx);
518 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
519 rt2500usb_config_duration(rt2x00dev, short_slot_time,
520 conf->beacon_int);
521}
522
523/*
524 * LED functions.
525 */
526static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
527{
528 u16 reg;
529
530 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
531 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
532 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
533 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
534
535 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
536
537 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
538 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
539 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
540 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
541 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
542 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
543 } else {
544 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
545 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
546 }
547
548 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
549}
550
551static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
552{
553 u16 reg;
554
555 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
556 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
557 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
558 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
559}
560
561/*
562 * Link tuning
563 */
564static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev)
565{
566 u16 reg;
567
568 /*
569 * Update FCS error count from register.
570 */
571 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
572 rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
573
574 /*
575 * Update False CCA count from register.
576 */
577 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
578 rt2x00dev->link.false_cca =
579 rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
580}
581
582static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
583{
584 u16 eeprom;
585 u16 value;
586
587 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
588 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
589 rt2500usb_bbp_write(rt2x00dev, 24, value);
590
591 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
592 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
593 rt2500usb_bbp_write(rt2x00dev, 25, value);
594
595 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
596 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
597 rt2500usb_bbp_write(rt2x00dev, 61, value);
598
599 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
600 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
601 rt2500usb_bbp_write(rt2x00dev, 17, value);
602
603 rt2x00dev->link.vgc_level = value;
604}
605
606static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
607{
608 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
609 u16 bbp_thresh;
610 u16 vgc_bound;
611 u16 sens;
612 u16 r24;
613 u16 r25;
614 u16 r61;
615 u16 r17_sens;
616 u8 r17;
617 u8 up_bound;
618 u8 low_bound;
619
620 /*
621 * Determine the BBP tuning threshold and correctly
622 * set BBP 24, 25 and 61.
623 */
624 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
625 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
626
627 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
628 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
629 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
630
631 if ((rssi + bbp_thresh) > 0) {
632 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
633 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
634 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
635 } else {
636 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
637 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
638 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
639 }
640
641 rt2500usb_bbp_write(rt2x00dev, 24, r24);
642 rt2500usb_bbp_write(rt2x00dev, 25, r25);
643 rt2500usb_bbp_write(rt2x00dev, 61, r61);
644
645 /*
646 * Read current r17 value, as well as the sensitivity values
647 * for the r17 register.
648 */
649 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
650 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
651
652 /*
653 * A too low RSSI will cause too much false CCA which will
654 * then corrupt the R17 tuning. To remidy this the tuning should
655 * be stopped (While making sure the R17 value will not exceed limits)
656 */
657 if (rssi >= -40) {
658 if (r17 != 0x60)
659 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
660 return;
661 }
662
663 /*
664 * Special big-R17 for short distance
665 */
666 if (rssi >= -58) {
667 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
668 if (r17 != sens)
669 rt2500usb_bbp_write(rt2x00dev, 17, sens);
670 return;
671 }
672
673 /*
674 * Special mid-R17 for middle distance
675 */
676 if (rssi >= -74) {
677 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
678 if (r17 != sens)
679 rt2500usb_bbp_write(rt2x00dev, 17, sens);
680 return;
681 }
682
683 /*
684 * Leave short or middle distance condition, restore r17
685 * to the dynamic tuning range.
686 */
687 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
688 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
689
690 low_bound = 0x32;
691 if (rssi >= -77)
692 up_bound = vgc_bound;
693 else
694 up_bound = vgc_bound - (-77 - rssi);
695
696 if (up_bound < low_bound)
697 up_bound = low_bound;
698
699 if (r17 > up_bound) {
700 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
701 rt2x00dev->link.vgc_level = up_bound;
702 } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
703 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
704 rt2x00dev->link.vgc_level = r17;
705 } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
706 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
707 rt2x00dev->link.vgc_level = r17;
708 }
709}
710
711/*
712 * Initialization functions.
713 */
714static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
715{
716 u16 reg;
717
718 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
719 USB_MODE_TEST, REGISTER_TIMEOUT);
720 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
721 0x00f0, REGISTER_TIMEOUT);
722
723 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
724 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
725 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
726
727 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
728 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
729
730 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
731 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
732 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
733 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
734 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
735
736 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
737 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
738 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
739 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
740 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
741
742 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
743 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
744 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
745 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
746 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
747 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
748
749 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
750 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
751 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
752 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
753 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
754 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
755
756 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
757 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
758 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
759 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
760 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
761 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
762
763 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
764 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
765 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
766 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
767 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
768 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
769
770 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
771 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
772
773 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
774 return -EBUSY;
775
776 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
777 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
778 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
779 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
780 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
781
782 if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
783 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
784 reg &= ~0x0002;
785 } else {
786 reg = 0x3002;
787 }
788 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
789
790 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
791 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
792 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
793 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
794
795 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
796 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
797 rt2x00dev->rx->data_size);
798 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
799
800 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
801 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
802 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
803 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
804
805 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
806 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
807 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
808
809 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
810 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
811 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
812
813 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
814 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
815 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
816
817 return 0;
818}
819
820static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
821{
822 unsigned int i;
823 u16 eeprom;
824 u8 value;
825 u8 reg_id;
826
827 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
828 rt2500usb_bbp_read(rt2x00dev, 0, &value);
829 if ((value != 0xff) && (value != 0x00))
830 goto continue_csr_init;
831 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
832 udelay(REGISTER_BUSY_DELAY);
833 }
834
835 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
836 return -EACCES;
837
838continue_csr_init:
839 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
840 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
841 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
842 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
843 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
844 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
845 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
846 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
847 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
848 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
849 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
850 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
851 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
852 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
853 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
854 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
855 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
856 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
857 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
858 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
859 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
860 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
861 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
862 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
863 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
864 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
865 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
866 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
867 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
868 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
869 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
870
871 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
872 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
873 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
874
875 if (eeprom != 0xffff && eeprom != 0x0000) {
876 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
877 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
878 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
879 reg_id, value);
880 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
881 }
882 }
883 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
884
885 return 0;
886}
887
888/*
889 * Device state switch handlers.
890 */
891static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
892 enum dev_state state)
893{
894 u16 reg;
895
896 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
897 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
898 state == STATE_RADIO_RX_OFF);
899 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
900}
901
902static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
903{
904 /*
905 * Initialize all registers.
906 */
907 if (rt2500usb_init_registers(rt2x00dev) ||
908 rt2500usb_init_bbp(rt2x00dev)) {
909 ERROR(rt2x00dev, "Register initialization failed.\n");
910 return -EIO;
911 }
912
913 rt2x00usb_enable_radio(rt2x00dev);
914
915 /*
916 * Enable LED
917 */
918 rt2500usb_enable_led(rt2x00dev);
919
920 return 0;
921}
922
923static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
924{
925 /*
926 * Disable LED
927 */
928 rt2500usb_disable_led(rt2x00dev);
929
930 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
931 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
932
933 /*
934 * Disable synchronisation.
935 */
936 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
937
938 rt2x00usb_disable_radio(rt2x00dev);
939}
940
941static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
942 enum dev_state state)
943{
944 u16 reg;
945 u16 reg2;
946 unsigned int i;
947 char put_to_sleep;
948 char bbp_state;
949 char rf_state;
950
951 put_to_sleep = (state != STATE_AWAKE);
952
953 reg = 0;
954 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
955 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
956 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
957 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
958 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
959 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
960
961 /*
962 * Device is not guaranteed to be in the requested state yet.
963 * We must wait until the register indicates that the
964 * device has entered the correct state.
965 */
966 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
967 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
968 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
969 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
970 if (bbp_state == state && rf_state == state)
971 return 0;
972 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
973 msleep(30);
974 }
975
976 NOTICE(rt2x00dev, "Device failed to enter state %d, "
977 "current device state: bbp %d and rf %d.\n",
978 state, bbp_state, rf_state);
979
980 return -EBUSY;
981}
982
983static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
984 enum dev_state state)
985{
986 int retval = 0;
987
988 switch (state) {
989 case STATE_RADIO_ON:
990 retval = rt2500usb_enable_radio(rt2x00dev);
991 break;
992 case STATE_RADIO_OFF:
993 rt2500usb_disable_radio(rt2x00dev);
994 break;
995 case STATE_RADIO_RX_ON:
996 case STATE_RADIO_RX_OFF:
997 rt2500usb_toggle_rx(rt2x00dev, state);
998 break;
999 case STATE_DEEP_SLEEP:
1000 case STATE_SLEEP:
1001 case STATE_STANDBY:
1002 case STATE_AWAKE:
1003 retval = rt2500usb_set_state(rt2x00dev, state);
1004 break;
1005 default:
1006 retval = -ENOTSUPP;
1007 break;
1008 }
1009
1010 return retval;
1011}
1012
1013/*
1014 * TX descriptor initialization
1015 */
1016static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1017 struct data_desc *txd,
Johannes Berg4150c572007-09-17 01:29:23 -04001018 struct txdata_entry_desc *desc,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001019 struct ieee80211_hdr *ieee80211hdr,
1020 unsigned int length,
1021 struct ieee80211_tx_control *control)
1022{
1023 u32 word;
1024
1025 /*
1026 * Start writing the descriptor words.
1027 */
1028 rt2x00_desc_read(txd, 1, &word);
1029 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1030 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1031 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1032 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1033 rt2x00_desc_write(txd, 1, word);
1034
1035 rt2x00_desc_read(txd, 2, &word);
1036 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1037 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1038 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1039 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1040 rt2x00_desc_write(txd, 2, word);
1041
1042 rt2x00_desc_read(txd, 0, &word);
1043 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1044 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1045 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1046 rt2x00_set_field32(&word, TXD_W0_ACK,
1047 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1048 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1049 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1050 rt2x00_set_field32(&word, TXD_W0_OFDM,
1051 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1052 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1053 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1054 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1055 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1056 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1057 rt2x00_desc_write(txd, 0, word);
1058}
1059
1060/*
1061 * TX data initialization
1062 */
1063static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1064 unsigned int queue)
1065{
1066 u16 reg;
1067
1068 if (queue != IEEE80211_TX_QUEUE_BEACON)
1069 return;
1070
1071 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1072 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1073 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1074 /*
1075 * Beacon generation will fail initially.
1076 * To prevent this we need to register the TXRX_CSR19
1077 * register several times.
1078 */
1079 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1080 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1081 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1082 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1083 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1084 }
1085}
1086
1087/*
1088 * RX control handlers
1089 */
Johannes Berg4150c572007-09-17 01:29:23 -04001090static void rt2500usb_fill_rxdone(struct data_entry *entry,
1091 struct rxdata_entry_desc *desc)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001092{
1093 struct urb *urb = entry->priv;
1094 struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
1095 (urb->actual_length -
1096 entry->ring->desc_size));
1097 u32 word0;
1098 u32 word1;
1099
1100 rt2x00_desc_read(rxd, 0, &word0);
1101 rt2x00_desc_read(rxd, 1, &word1);
1102
Johannes Berg4150c572007-09-17 01:29:23 -04001103 desc->flags = 0;
1104 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1105 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1106 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1107 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001108
1109 /*
1110 * Obtain the status about this packet.
1111 */
Johannes Berg4150c572007-09-17 01:29:23 -04001112 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1113 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001114 entry->ring->rt2x00dev->rssi_offset;
Johannes Berg4150c572007-09-17 01:29:23 -04001115 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1116 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001117
Johannes Berg4150c572007-09-17 01:29:23 -04001118 return;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001119}
1120
1121/*
1122 * Interrupt functions.
1123 */
1124static void rt2500usb_beacondone(struct urb *urb)
1125{
1126 struct data_entry *entry = (struct data_entry *)urb->context;
1127 struct data_ring *ring = entry->ring;
1128
1129 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1130 return;
1131
1132 /*
1133 * Check if this was the guardian beacon,
1134 * if that was the case we need to send the real beacon now.
1135 * Otherwise we should free the sk_buffer, the device
1136 * should be doing the rest of the work now.
1137 */
1138 if (ring->index == 1) {
1139 rt2x00_ring_index_done_inc(ring);
1140 entry = rt2x00_get_data_entry(ring);
1141 usb_submit_urb(entry->priv, GFP_ATOMIC);
1142 rt2x00_ring_index_inc(ring);
1143 } else if (ring->index_done == 1) {
1144 entry = rt2x00_get_data_entry_done(ring);
1145 if (entry->skb) {
1146 dev_kfree_skb(entry->skb);
1147 entry->skb = NULL;
1148 }
1149 rt2x00_ring_index_done_inc(ring);
1150 }
1151}
1152
1153/*
1154 * Device probe functions.
1155 */
1156static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1157{
1158 u16 word;
1159 u8 *mac;
1160
1161 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1162
1163 /*
1164 * Start validation of the data that has been read.
1165 */
1166 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1167 if (!is_valid_ether_addr(mac)) {
Joe Perches0795af52007-10-03 17:59:30 -07001168 DECLARE_MAC_BUF(macbuf);
1169
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001170 random_ether_addr(mac);
Joe Perches0795af52007-10-03 17:59:30 -07001171 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001172 }
1173
1174 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1175 if (word == 0xffff) {
1176 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1177 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1178 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1179 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1180 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1181 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1182 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1183 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1184 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1185 }
1186
1187 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1188 if (word == 0xffff) {
1189 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1190 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1191 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1192 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1193 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1194 }
1195
1196 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1197 if (word == 0xffff) {
1198 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1199 DEFAULT_RSSI_OFFSET);
1200 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1201 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1202 }
1203
1204 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1205 if (word == 0xffff) {
1206 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1207 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1208 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1209 }
1210
1211 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1212 if (word == 0xffff) {
1213 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1214 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1215 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1216 }
1217
1218 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1219 if (word == 0xffff) {
1220 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1221 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1222 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1223 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1224 }
1225
1226 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1227 if (word == 0xffff) {
1228 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1229 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1230 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1231 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1232 }
1233
1234 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1235 if (word == 0xffff) {
1236 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1237 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1238 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1239 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1240 }
1241
1242 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1243 if (word == 0xffff) {
1244 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1245 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1246 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1247 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1248 }
1249
1250 return 0;
1251}
1252
1253static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1254{
1255 u16 reg;
1256 u16 value;
1257 u16 eeprom;
1258
1259 /*
1260 * Read EEPROM word for configuration.
1261 */
1262 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1263
1264 /*
1265 * Identify RF chipset.
1266 */
1267 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1268 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1269 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1270
1271 if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) {
1272 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1273 return -ENODEV;
1274 }
1275
1276 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1277 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1278 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1279 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1280 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1281 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1282 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1283 return -ENODEV;
1284 }
1285
1286 /*
1287 * Identify default antenna configuration.
1288 */
1289 rt2x00dev->hw->conf.antenna_sel_tx =
1290 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1291 rt2x00dev->hw->conf.antenna_sel_rx =
1292 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1293
1294 /*
1295 * Store led mode, for correct led behaviour.
1296 */
1297 rt2x00dev->led_mode =
1298 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1299
1300 /*
1301 * Check if the BBP tuning should be disabled.
1302 */
1303 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1304 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1305 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1306
1307 /*
1308 * Read the RSSI <-> dBm offset information.
1309 */
1310 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1311 rt2x00dev->rssi_offset =
1312 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1313
1314 return 0;
1315}
1316
1317/*
1318 * RF value list for RF2522
1319 * Supports: 2.4 GHz
1320 */
1321static const struct rf_channel rf_vals_bg_2522[] = {
1322 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1323 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1324 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1325 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1326 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1327 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1328 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1329 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1330 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1331 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1332 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1333 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1334 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1335 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1336};
1337
1338/*
1339 * RF value list for RF2523
1340 * Supports: 2.4 GHz
1341 */
1342static const struct rf_channel rf_vals_bg_2523[] = {
1343 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1344 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1345 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1346 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1347 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1348 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1349 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1350 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1351 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1352 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1353 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1354 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1355 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1356 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1357};
1358
1359/*
1360 * RF value list for RF2524
1361 * Supports: 2.4 GHz
1362 */
1363static const struct rf_channel rf_vals_bg_2524[] = {
1364 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1365 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1366 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1367 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1368 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1369 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1370 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1371 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1372 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1373 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1374 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1375 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1376 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1377 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1378};
1379
1380/*
1381 * RF value list for RF2525
1382 * Supports: 2.4 GHz
1383 */
1384static const struct rf_channel rf_vals_bg_2525[] = {
1385 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1386 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1387 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1388 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1389 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1390 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1391 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1392 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1393 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1394 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1395 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1396 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1397 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1398 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1399};
1400
1401/*
1402 * RF value list for RF2525e
1403 * Supports: 2.4 GHz
1404 */
1405static const struct rf_channel rf_vals_bg_2525e[] = {
1406 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1407 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1408 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1409 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1410 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1411 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1412 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1413 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1414 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1415 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1416 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1417 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1418 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1419 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1420};
1421
1422/*
1423 * RF value list for RF5222
1424 * Supports: 2.4 GHz & 5.2 GHz
1425 */
1426static const struct rf_channel rf_vals_5222[] = {
1427 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1428 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1429 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1430 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1431 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1432 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1433 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1434 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1435 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1436 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1437 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1438 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1439 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1440 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1441
1442 /* 802.11 UNI / HyperLan 2 */
1443 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1444 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1445 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1446 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1447 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1448 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1449 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1450 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1451
1452 /* 802.11 HyperLan 2 */
1453 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1454 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1455 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1456 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1457 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1458 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1459 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1460 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1461 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1462 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1463
1464 /* 802.11 UNII */
1465 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1466 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1467 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1468 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1469 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1470};
1471
1472static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1473{
1474 struct hw_mode_spec *spec = &rt2x00dev->spec;
1475 u8 *txpower;
1476 unsigned int i;
1477
1478 /*
1479 * Initialize all hw fields.
1480 */
1481 rt2x00dev->hw->flags =
1482 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1483 IEEE80211_HW_RX_INCLUDES_FCS |
Johannes Berg4150c572007-09-17 01:29:23 -04001484 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001485 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1486 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1487 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1488 rt2x00dev->hw->queues = 2;
1489
1490 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1491 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1492 rt2x00_eeprom_addr(rt2x00dev,
1493 EEPROM_MAC_ADDR_0));
1494
1495 /*
1496 * Convert tx_power array in eeprom.
1497 */
1498 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1499 for (i = 0; i < 14; i++)
1500 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1501
1502 /*
1503 * Initialize hw_mode information.
1504 */
1505 spec->num_modes = 2;
1506 spec->num_rates = 12;
1507 spec->tx_power_a = NULL;
1508 spec->tx_power_bg = txpower;
1509 spec->tx_power_default = DEFAULT_TXPOWER;
1510
1511 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1512 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1513 spec->channels = rf_vals_bg_2522;
1514 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1515 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1516 spec->channels = rf_vals_bg_2523;
1517 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1518 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1519 spec->channels = rf_vals_bg_2524;
1520 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1521 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1522 spec->channels = rf_vals_bg_2525;
1523 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1524 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1525 spec->channels = rf_vals_bg_2525e;
1526 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1527 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1528 spec->channels = rf_vals_5222;
1529 spec->num_modes = 3;
1530 }
1531}
1532
1533static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1534{
1535 int retval;
1536
1537 /*
1538 * Allocate eeprom data.
1539 */
1540 retval = rt2500usb_validate_eeprom(rt2x00dev);
1541 if (retval)
1542 return retval;
1543
1544 retval = rt2500usb_init_eeprom(rt2x00dev);
1545 if (retval)
1546 return retval;
1547
1548 /*
1549 * Initialize hw specifications.
1550 */
1551 rt2500usb_probe_hw_mode(rt2x00dev);
1552
1553 /*
Johannes Berg4150c572007-09-17 01:29:23 -04001554 * This device requires the beacon ring
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001555 */
Ivo van Doorn066cb632007-09-25 20:55:39 +02001556 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001557
1558 /*
1559 * Set the rssi offset.
1560 */
1561 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1562
1563 return 0;
1564}
1565
1566/*
1567 * IEEE80211 stack callback functions.
1568 */
Johannes Berg4150c572007-09-17 01:29:23 -04001569static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1570 unsigned int changed_flags,
1571 unsigned int *total_flags,
1572 int mc_count,
1573 struct dev_addr_list *mc_list)
1574{
1575 struct rt2x00_dev *rt2x00dev = hw->priv;
1576 struct interface *intf = &rt2x00dev->interface;
1577 u16 reg;
1578
1579 /*
1580 * Mask off any flags we are going to ignore from
1581 * the total_flags field.
1582 */
1583 *total_flags &=
1584 FIF_ALLMULTI |
1585 FIF_FCSFAIL |
1586 FIF_PLCPFAIL |
1587 FIF_CONTROL |
1588 FIF_OTHER_BSS |
1589 FIF_PROMISC_IN_BSS;
1590
1591 /*
1592 * Apply some rules to the filters:
1593 * - Some filters imply different filters to be set.
1594 * - Some things we can't filter out at all.
1595 * - Some filters are set based on interface type.
1596 */
1597 if (mc_count)
1598 *total_flags |= FIF_ALLMULTI;
Ivo van Doorn5886d0d2007-10-06 14:13:38 +02001599 if (*total_flags & FIF_OTHER_BSS ||
1600 *total_flags & FIF_PROMISC_IN_BSS)
Johannes Berg4150c572007-09-17 01:29:23 -04001601 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1602 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1603 *total_flags |= FIF_PROMISC_IN_BSS;
1604
1605 /*
1606 * Check if there is any work left for us.
1607 */
1608 if (intf->filter == *total_flags)
1609 return;
1610 intf->filter = *total_flags;
1611
1612 /*
1613 * When in atomic context, reschedule and let rt2x00lib
1614 * call this function again.
1615 */
1616 if (in_atomic()) {
1617 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1618 return;
1619 }
1620
1621 /*
1622 * Start configuration steps.
1623 * Note that the version error will always be dropped
1624 * and broadcast frames will always be accepted since
1625 * there is no filter for it at this time.
1626 */
1627 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1628 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1629 !(*total_flags & FIF_FCSFAIL));
1630 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1631 !(*total_flags & FIF_PLCPFAIL));
1632 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1633 !(*total_flags & FIF_CONTROL));
1634 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1635 !(*total_flags & FIF_PROMISC_IN_BSS));
1636 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1637 !(*total_flags & FIF_PROMISC_IN_BSS));
1638 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1639 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1640 !(*total_flags & FIF_ALLMULTI));
1641 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1642 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1643}
1644
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001645static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1646 struct sk_buff *skb,
1647 struct ieee80211_tx_control *control)
1648{
1649 struct rt2x00_dev *rt2x00dev = hw->priv;
1650 struct usb_device *usb_dev =
1651 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1652 struct data_ring *ring =
1653 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1654 struct data_entry *beacon;
1655 struct data_entry *guardian;
1656 int length;
1657
1658 /*
1659 * Just in case the ieee80211 doesn't set this,
1660 * but we need this queue set for the descriptor
1661 * initialization.
1662 */
1663 control->queue = IEEE80211_TX_QUEUE_BEACON;
1664
1665 /*
1666 * Obtain 2 entries, one for the guardian byte,
1667 * the second for the actual beacon.
1668 */
1669 guardian = rt2x00_get_data_entry(ring);
1670 rt2x00_ring_index_inc(ring);
1671 beacon = rt2x00_get_data_entry(ring);
1672
1673 /*
1674 * First we create the beacon.
1675 */
1676 skb_push(skb, ring->desc_size);
1677 rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1678 (struct ieee80211_hdr *)(skb->data +
1679 ring->desc_size),
1680 skb->len - ring->desc_size, control);
1681
1682 /*
1683 * Length passed to usb_fill_urb cannot be an odd number,
1684 * so add 1 byte to make it even.
1685 */
1686 length = skb->len;
1687 if (length % 2)
1688 length++;
1689
1690 usb_fill_bulk_urb(beacon->priv, usb_dev,
1691 usb_sndbulkpipe(usb_dev, 1),
1692 skb->data, length, rt2500usb_beacondone, beacon);
1693
1694 beacon->skb = skb;
1695
1696 /*
1697 * Second we need to create the guardian byte.
1698 * We only need a single byte, so lets recycle
1699 * the 'flags' field we are not using for beacons.
1700 */
1701 guardian->flags = 0;
1702 usb_fill_bulk_urb(guardian->priv, usb_dev,
1703 usb_sndbulkpipe(usb_dev, 1),
1704 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1705
1706 /*
1707 * Send out the guardian byte.
1708 */
1709 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1710
1711 /*
1712 * Enable beacon generation.
1713 */
1714 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1715
1716 return 0;
1717}
1718
1719static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1720 .tx = rt2x00mac_tx,
Johannes Berg4150c572007-09-17 01:29:23 -04001721 .start = rt2x00mac_start,
1722 .stop = rt2x00mac_stop,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001723 .add_interface = rt2x00mac_add_interface,
1724 .remove_interface = rt2x00mac_remove_interface,
1725 .config = rt2x00mac_config,
1726 .config_interface = rt2x00mac_config_interface,
Johannes Berg4150c572007-09-17 01:29:23 -04001727 .configure_filter = rt2500usb_configure_filter,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001728 .get_stats = rt2x00mac_get_stats,
1729 .conf_tx = rt2x00mac_conf_tx,
1730 .get_tx_stats = rt2x00mac_get_tx_stats,
1731 .beacon_update = rt2500usb_beacon_update,
1732};
1733
1734static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1735 .probe_hw = rt2500usb_probe_hw,
1736 .initialize = rt2x00usb_initialize,
1737 .uninitialize = rt2x00usb_uninitialize,
1738 .set_device_state = rt2500usb_set_device_state,
1739 .link_stats = rt2500usb_link_stats,
1740 .reset_tuner = rt2500usb_reset_tuner,
1741 .link_tuner = rt2500usb_link_tuner,
1742 .write_tx_desc = rt2500usb_write_tx_desc,
1743 .write_tx_data = rt2x00usb_write_tx_data,
1744 .kick_tx_queue = rt2500usb_kick_tx_queue,
1745 .fill_rxdone = rt2500usb_fill_rxdone,
1746 .config_mac_addr = rt2500usb_config_mac_addr,
1747 .config_bssid = rt2500usb_config_bssid,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001748 .config_type = rt2500usb_config_type,
1749 .config = rt2500usb_config,
1750};
1751
1752static const struct rt2x00_ops rt2500usb_ops = {
1753 .name = DRV_NAME,
1754 .rxd_size = RXD_DESC_SIZE,
1755 .txd_size = TXD_DESC_SIZE,
1756 .eeprom_size = EEPROM_SIZE,
1757 .rf_size = RF_SIZE,
1758 .lib = &rt2500usb_rt2x00_ops,
1759 .hw = &rt2500usb_mac80211_ops,
1760#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1761 .debugfs = &rt2500usb_rt2x00debug,
1762#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1763};
1764
1765/*
1766 * rt2500usb module information.
1767 */
1768static struct usb_device_id rt2500usb_device_table[] = {
1769 /* ASUS */
1770 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1771 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1772 /* Belkin */
1773 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1774 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1775 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1776 /* Cisco Systems */
1777 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1778 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1779 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1780 /* Conceptronic */
1781 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1782 /* D-LINK */
1783 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1784 /* Gigabyte */
1785 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1786 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1787 /* Hercules */
1788 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1789 /* Melco */
1790 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1791 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1792 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1793 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1794
1795 /* MSI */
1796 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1797 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1798 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1799 /* Ralink */
1800 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1801 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1802 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1803 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1804 /* Siemens */
1805 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1806 /* SMC */
1807 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1808 /* Spairon */
1809 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1810 /* Trust */
1811 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1812 /* Zinwell */
1813 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1814 { 0, }
1815};
1816
1817MODULE_AUTHOR(DRV_PROJECT);
1818MODULE_VERSION(DRV_VERSION);
1819MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1820MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1821MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1822MODULE_LICENSE("GPL");
1823
1824static struct usb_driver rt2500usb_driver = {
1825 .name = DRV_NAME,
1826 .id_table = rt2500usb_device_table,
1827 .probe = rt2x00usb_probe,
1828 .disconnect = rt2x00usb_disconnect,
1829 .suspend = rt2x00usb_suspend,
1830 .resume = rt2x00usb_resume,
1831};
1832
1833static int __init rt2500usb_init(void)
1834{
1835 return usb_register(&rt2500usb_driver);
1836}
1837
1838static void __exit rt2500usb_exit(void)
1839{
1840 usb_deregister(&rt2500usb_driver);
1841}
1842
1843module_init(rt2500usb_init);
1844module_exit(rt2500usb_exit);