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Alan Coxda9bb1d2006-01-18 17:44:13 -08001#
2# EDAC Kconfig
Doug Thompson4577ca52009-04-02 16:58:43 -07003# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
Alan Coxda9bb1d2006-01-18 17:44:13 -08004# Licensed and distributed under the GPL
5#
Alan Coxda9bb1d2006-01-18 17:44:13 -08006
Jan Engelhardt751cb5e2007-07-15 23:39:27 -07007menuconfig EDAC
GeunSik Lime24aca62009-06-17 16:28:02 -07008 bool "EDAC (Error Detection And Correction) reporting"
Martin Schwidefskye25df122007-05-10 15:45:57 +02009 depends on HAS_IOMEM
Andrew Morton4c6a1c12007-07-26 10:41:10 -070010 depends on X86 || PPC
Alan Coxda9bb1d2006-01-18 17:44:13 -080011 help
12 EDAC is designed to report errors in the core system.
13 These are low-level errors that are reported in the CPU or
Douglas Thompson8cb2a392007-07-19 01:50:12 -070014 supporting chipset or other subsystems:
15 memory errors, cache errors, PCI errors, thermal throttling, etc..
16 If unsure, select 'Y'.
Alan Coxda9bb1d2006-01-18 17:44:13 -080017
Tim Small57c432b2006-03-09 17:33:50 -080018 If this code is reporting problems on your system, please
19 see the EDAC project web pages for more information at:
20
21 <http://bluesmoke.sourceforge.net/>
22
23 and:
24
25 <http://buttersideup.com/edacwiki>
26
27 There is also a mailing list for the EDAC project, which can
28 be found via the sourceforge page.
29
Jan Engelhardt751cb5e2007-07-15 23:39:27 -070030if EDAC
Alan Coxda9bb1d2006-01-18 17:44:13 -080031
32comment "Reporting subsystems"
Alan Coxda9bb1d2006-01-18 17:44:13 -080033
34config EDAC_DEBUG
35 bool "Debugging"
Alan Coxda9bb1d2006-01-18 17:44:13 -080036 help
37 This turns on debugging information for the entire EDAC
38 sub-system. You can insert module with "debug_level=x", current
39 there're four debug levels (x=0,1,2,3 from low to high).
40 Usually you should select 'N'.
41
Hitoshi Mitakecc18e3c2009-04-02 16:58:43 -070042config EDAC_DEBUG_VERBOSE
43 bool "More verbose debugging"
44 depends on EDAC_DEBUG
45 help
46 This option makes debugging information more verbose.
47 Source file name and line number where debugging message
48 printed will be added to debugging message.
49
Borislav Petkov0d18b2e2009-10-02 15:31:48 +020050 config EDAC_DECODE_MCE
51 tristate "Decode MCEs in human-readable form (only on AMD for now)"
52 depends on CPU_SUP_AMD && X86_MCE
53 default y
54 ---help---
55 Enable this option if you want to decode Machine Check Exceptions
56 occuring on your machine in human-readable form.
57
58 You should definitely say Y here in case you want to decode MCEs
59 which occur really early upon boot, before the module infrastructure
60 has been initialized.
61
Alan Coxda9bb1d2006-01-18 17:44:13 -080062config EDAC_MM_EDAC
63 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
Alan Coxda9bb1d2006-01-18 17:44:13 -080064 help
65 Some systems are able to detect and correct errors in main
66 memory. EDAC can report statistics on memory error
67 detection and correction (EDAC - or commonly referred to ECC
68 errors). EDAC will also try to decode where these errors
69 occurred so that a particular failing memory module can be
70 replaced. If unsure, select 'Y'.
71
Doug Thompson7d6034d2009-04-27 20:01:01 +020072config EDAC_AMD64
73 tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h"
Borislav Petkov0d18b2e2009-10-02 15:31:48 +020074 depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && EDAC_DECODE_MCE
Doug Thompson7d6034d2009-04-27 20:01:01 +020075 help
Borislav Petkov3d373292009-05-20 20:18:46 +020076 Support for error detection and correction on the AMD 64
77 Families of Memory Controllers (K8, F10h and F11h)
Doug Thompson7d6034d2009-04-27 20:01:01 +020078
79config EDAC_AMD64_ERROR_INJECTION
80 bool "Sysfs Error Injection facilities"
81 depends on EDAC_AMD64
82 help
83 Recent Opterons (Family 10h and later) provide for Memory Error
84 Injection into the ECC detection circuits. The amd64_edac module
85 allows the operator/user to inject Uncorrectable and Correctable
86 errors into DRAM.
87
88 When enabled, in each of the respective memory controller directories
89 (/sys/devices/system/edac/mc/mcX), there are 3 input files:
90
91 - inject_section (0..3, 16-byte section of 64-byte cacheline),
92 - inject_word (0..8, 16-bit word of 16-byte section),
93 - inject_ecc_vector (hex ecc vector: select bits of inject word)
94
95 In addition, there are two control files, inject_read and inject_write,
96 which trigger the DRAM ECC Read and Write respectively.
Alan Coxda9bb1d2006-01-18 17:44:13 -080097
98config EDAC_AMD76X
99 tristate "AMD 76x (760, 762, 768)"
Dave Jones90cbc452006-02-03 03:04:11 -0800100 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800101 help
102 Support for error detection and correction on the AMD 76x
103 series of chipsets used with the Athlon processor.
104
105config EDAC_E7XXX
106 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800107 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800108 help
109 Support for error detection and correction on the Intel
110 E7205, E7500, E7501 and E7505 server chipsets.
111
112config EDAC_E752X
Andrei Konovalov5135b792008-04-29 01:03:13 -0700113 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
Randy Dunlapda960a62006-03-31 02:30:34 -0800114 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
Alan Coxda9bb1d2006-01-18 17:44:13 -0800115 help
116 Support for error detection and correction on the Intel
117 E7520, E7525, E7320 server chipsets.
118
Tim Small5a2c6752007-07-19 01:49:42 -0700119config EDAC_I82443BXGX
120 tristate "Intel 82443BX/GX (440BX/GX)"
121 depends on EDAC_MM_EDAC && PCI && X86_32
Andrew Morton28f96eea2007-07-19 01:49:45 -0700122 depends on BROKEN
Tim Small5a2c6752007-07-19 01:49:42 -0700123 help
124 Support for error detection and correction on the Intel
125 82443BX/GX memory controllers (440BX/GX chipsets).
126
Alan Coxda9bb1d2006-01-18 17:44:13 -0800127config EDAC_I82875P
128 tristate "Intel 82875p (D82875P, E7210)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800129 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800130 help
131 Support for error detection and correction on the Intel
132 DP82785P and E7210 server chipsets.
133
Ranganathan Desikan420390f2007-07-19 01:50:31 -0700134config EDAC_I82975X
135 tristate "Intel 82975x (D82975x)"
136 depends on EDAC_MM_EDAC && PCI && X86
137 help
138 Support for error detection and correction on the Intel
139 DP82975x server chipsets.
140
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700141config EDAC_I3000
142 tristate "Intel 3000/3010"
Jason Uhlenkottf5c04542008-02-07 00:15:01 -0800143 depends on EDAC_MM_EDAC && PCI && X86
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700144 help
145 Support for error detection and correction on the Intel
146 3000 and 3010 server chipsets.
147
Jason Uhlenkottdd8ef1d2009-09-23 15:57:27 -0700148config EDAC_I3200
149 tristate "Intel 3200"
150 depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
151 help
152 Support for error detection and correction on the Intel
153 3200 and 3210 server chipsets.
154
Hitoshi Mitakedf8bc08c2008-10-29 14:00:50 -0700155config EDAC_X38
156 tristate "Intel X38"
157 depends on EDAC_MM_EDAC && PCI && X86
158 help
159 Support for error detection and correction on the Intel
160 X38 server chipsets.
161
Mauro Carvalho Chehab920c8df2009-01-06 14:43:00 -0800162config EDAC_I5400
163 tristate "Intel 5400 (Seaburg) chipsets"
164 depends on EDAC_MM_EDAC && PCI && X86
165 help
166 Support for error detection and correction the Intel
167 i5400 MCH chipset (Seaburg).
168
Alan Coxda9bb1d2006-01-18 17:44:13 -0800169config EDAC_I82860
170 tristate "Intel 82860"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800171 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800172 help
173 Support for error detection and correction on the Intel
174 82860 chipset.
175
176config EDAC_R82600
177 tristate "Radisys 82600 embedded chipset"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800178 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800179 help
180 Support for error detection and correction on the Radisys
181 82600 embedded chipset.
182
Eric Wolleseneb607052007-07-19 01:49:39 -0700183config EDAC_I5000
184 tristate "Intel Greencreek/Blackford chipset"
185 depends on EDAC_MM_EDAC && X86 && PCI
186 help
187 Support for error detection and correction the Intel
188 Greekcreek/Blackford chipsets.
189
Arthur Jones8f421c592008-07-25 01:49:04 -0700190config EDAC_I5100
191 tristate "Intel San Clemente MCH"
192 depends on EDAC_MM_EDAC && X86 && PCI
193 help
194 Support for error detection and correction the Intel
195 San Clemente MCH.
196
Dave Jianga9a753d2008-02-07 00:14:55 -0800197config EDAC_MPC85XX
Ira W. Snyderb4846252009-09-23 15:57:25 -0700198 tristate "Freescale MPC83xx / MPC85xx"
199 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx)
Dave Jianga9a753d2008-02-07 00:14:55 -0800200 help
201 Support for error detection and correction on the Freescale
Ira W. Snyderb4846252009-09-23 15:57:25 -0700202 MPC8349, MPC8560, MPC8540, MPC8548
Dave Jianga9a753d2008-02-07 00:14:55 -0800203
Dave Jiang4f4aeea2008-02-07 00:14:56 -0800204config EDAC_MV64X60
205 tristate "Marvell MV64x60"
206 depends on EDAC_MM_EDAC && MV64X60
207 help
208 Support for error detection and correction on the Marvell
209 MV64360 and MV64460 chipsets.
210
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700211config EDAC_PASEMI
212 tristate "PA Semi PWRficient"
213 depends on EDAC_MM_EDAC && PCI
Doug Thompsonddcc3052007-07-26 10:41:16 -0700214 depends on PPC_PASEMI
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700215 help
216 Support for error detection and correction on PA Semi
217 PWRficient.
218
Benjamin Herrenschmidt48764e42008-02-07 00:14:53 -0800219config EDAC_CELL
220 tristate "Cell Broadband Engine memory controller"
Benjamin Krilldef434c2008-11-27 16:15:44 +0100221 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
Benjamin Herrenschmidt48764e42008-02-07 00:14:53 -0800222 help
223 Support for error detection and correction on the
224 Cell Broadband Engine internal memory controller
225 on platform without a hypervisor
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700226
Grant Ericksondba7a772009-04-02 16:58:45 -0700227config EDAC_PPC4XX
228 tristate "PPC4xx IBM DDR2 Memory Controller"
229 depends on EDAC_MM_EDAC && 4xx
230 help
231 This enables support for EDAC on the ECC memory used
232 with the IBM DDR2 memory controller found in various
233 PowerPC 4xx embedded processors such as the 405EX[r],
234 440SP, 440SPe, 460EX, 460GT and 460SX.
235
Harry Ciaoe8765582009-04-02 16:58:51 -0700236config EDAC_AMD8131
237 tristate "AMD8131 HyperTransport PCI-X Tunnel"
Harry Ciao715fe7a2009-05-28 14:34:43 -0700238 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
Harry Ciaoe8765582009-04-02 16:58:51 -0700239 help
240 Support for error detection and correction on the
241 AMD8131 HyperTransport PCI-X Tunnel chip.
Harry Ciao715fe7a2009-05-28 14:34:43 -0700242 Note, add more Kconfig dependency if it's adopted
243 on some machine other than Maple.
Harry Ciaoe8765582009-04-02 16:58:51 -0700244
Harry Ciao58b4ce62009-04-02 16:58:51 -0700245config EDAC_AMD8111
246 tristate "AMD8111 HyperTransport I/O Hub"
Harry Ciao715fe7a2009-05-28 14:34:43 -0700247 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
Harry Ciao58b4ce62009-04-02 16:58:51 -0700248 help
249 Support for error detection and correction on the
250 AMD8111 HyperTransport I/O Hub chip.
Harry Ciao715fe7a2009-05-28 14:34:43 -0700251 Note, add more Kconfig dependency if it's adopted
252 on some machine other than Maple.
Harry Ciao58b4ce62009-04-02 16:58:51 -0700253
Harry Ciao2a9036a2009-06-17 16:27:58 -0700254config EDAC_CPC925
255 tristate "IBM CPC925 Memory Controller (PPC970FX)"
256 depends on EDAC_MM_EDAC && PPC64
257 help
258 Support for error detection and correction on the
259 IBM CPC925 Bridge and Memory Controller, which is
260 a companion chip to the PowerPC 970 family of
261 processors.
262
Jan Engelhardt751cb5e2007-07-15 23:39:27 -0700263endif # EDAC