| Mark Brown | 1dcf98f | 2009-07-01 18:28:54 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm8523.h -- WM8423 ASoC driver |
| 3 | * |
| 4 | * Copyright 2009 Wolfson Microelectronics, plc |
| 5 | * |
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * Based on wm8753.h |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _WM8523_H |
| 16 | #define _WM8523_H |
| 17 | |
| 18 | /* |
| 19 | * Register values. |
| 20 | */ |
| 21 | #define WM8523_DEVICE_ID 0x00 |
| 22 | #define WM8523_REVISION 0x01 |
| 23 | #define WM8523_PSCTRL1 0x02 |
| 24 | #define WM8523_AIF_CTRL1 0x03 |
| 25 | #define WM8523_AIF_CTRL2 0x04 |
| 26 | #define WM8523_DAC_CTRL3 0x05 |
| 27 | #define WM8523_DAC_GAINL 0x06 |
| 28 | #define WM8523_DAC_GAINR 0x07 |
| 29 | #define WM8523_ZERO_DETECT 0x08 |
| 30 | |
| 31 | #define WM8523_REGISTER_COUNT 9 |
| 32 | #define WM8523_MAX_REGISTER 0x08 |
| 33 | |
| 34 | /* |
| 35 | * Field Definitions. |
| 36 | */ |
| 37 | |
| 38 | /* |
| 39 | * R0 (0x00) - DEVICE_ID |
| 40 | */ |
| 41 | #define WM8523_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */ |
| 42 | #define WM8523_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */ |
| 43 | #define WM8523_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */ |
| 44 | |
| 45 | /* |
| 46 | * R1 (0x01) - REVISION |
| 47 | */ |
| 48 | #define WM8523_CHIP_REV_MASK 0x0007 /* CHIP_REV - [2:0] */ |
| 49 | #define WM8523_CHIP_REV_SHIFT 0 /* CHIP_REV - [2:0] */ |
| 50 | #define WM8523_CHIP_REV_WIDTH 3 /* CHIP_REV - [2:0] */ |
| 51 | |
| 52 | /* |
| 53 | * R2 (0x02) - PSCTRL1 |
| 54 | */ |
| 55 | #define WM8523_SYS_ENA_MASK 0x0003 /* SYS_ENA - [1:0] */ |
| 56 | #define WM8523_SYS_ENA_SHIFT 0 /* SYS_ENA - [1:0] */ |
| 57 | #define WM8523_SYS_ENA_WIDTH 2 /* SYS_ENA - [1:0] */ |
| 58 | |
| 59 | /* |
| 60 | * R3 (0x03) - AIF_CTRL1 |
| 61 | */ |
| 62 | #define WM8523_TDM_MODE_MASK 0x1800 /* TDM_MODE - [12:11] */ |
| 63 | #define WM8523_TDM_MODE_SHIFT 11 /* TDM_MODE - [12:11] */ |
| 64 | #define WM8523_TDM_MODE_WIDTH 2 /* TDM_MODE - [12:11] */ |
| 65 | #define WM8523_TDM_SLOT_MASK 0x0600 /* TDM_SLOT - [10:9] */ |
| 66 | #define WM8523_TDM_SLOT_SHIFT 9 /* TDM_SLOT - [10:9] */ |
| 67 | #define WM8523_TDM_SLOT_WIDTH 2 /* TDM_SLOT - [10:9] */ |
| 68 | #define WM8523_DEEMPH 0x0100 /* DEEMPH */ |
| 69 | #define WM8523_DEEMPH_MASK 0x0100 /* DEEMPH */ |
| 70 | #define WM8523_DEEMPH_SHIFT 8 /* DEEMPH */ |
| 71 | #define WM8523_DEEMPH_WIDTH 1 /* DEEMPH */ |
| 72 | #define WM8523_AIF_MSTR 0x0080 /* AIF_MSTR */ |
| 73 | #define WM8523_AIF_MSTR_MASK 0x0080 /* AIF_MSTR */ |
| 74 | #define WM8523_AIF_MSTR_SHIFT 7 /* AIF_MSTR */ |
| 75 | #define WM8523_AIF_MSTR_WIDTH 1 /* AIF_MSTR */ |
| 76 | #define WM8523_LRCLK_INV 0x0040 /* LRCLK_INV */ |
| 77 | #define WM8523_LRCLK_INV_MASK 0x0040 /* LRCLK_INV */ |
| 78 | #define WM8523_LRCLK_INV_SHIFT 6 /* LRCLK_INV */ |
| 79 | #define WM8523_LRCLK_INV_WIDTH 1 /* LRCLK_INV */ |
| 80 | #define WM8523_BCLK_INV 0x0020 /* BCLK_INV */ |
| 81 | #define WM8523_BCLK_INV_MASK 0x0020 /* BCLK_INV */ |
| 82 | #define WM8523_BCLK_INV_SHIFT 5 /* BCLK_INV */ |
| 83 | #define WM8523_BCLK_INV_WIDTH 1 /* BCLK_INV */ |
| 84 | #define WM8523_WL_MASK 0x0018 /* WL - [4:3] */ |
| 85 | #define WM8523_WL_SHIFT 3 /* WL - [4:3] */ |
| 86 | #define WM8523_WL_WIDTH 2 /* WL - [4:3] */ |
| 87 | #define WM8523_FMT_MASK 0x0007 /* FMT - [2:0] */ |
| 88 | #define WM8523_FMT_SHIFT 0 /* FMT - [2:0] */ |
| 89 | #define WM8523_FMT_WIDTH 3 /* FMT - [2:0] */ |
| 90 | |
| 91 | /* |
| 92 | * R4 (0x04) - AIF_CTRL2 |
| 93 | */ |
| 94 | #define WM8523_DAC_OP_MUX_MASK 0x00C0 /* DAC_OP_MUX - [7:6] */ |
| 95 | #define WM8523_DAC_OP_MUX_SHIFT 6 /* DAC_OP_MUX - [7:6] */ |
| 96 | #define WM8523_DAC_OP_MUX_WIDTH 2 /* DAC_OP_MUX - [7:6] */ |
| 97 | #define WM8523_BCLKDIV_MASK 0x0038 /* BCLKDIV - [5:3] */ |
| 98 | #define WM8523_BCLKDIV_SHIFT 3 /* BCLKDIV - [5:3] */ |
| 99 | #define WM8523_BCLKDIV_WIDTH 3 /* BCLKDIV - [5:3] */ |
| 100 | #define WM8523_SR_MASK 0x0007 /* SR - [2:0] */ |
| 101 | #define WM8523_SR_SHIFT 0 /* SR - [2:0] */ |
| 102 | #define WM8523_SR_WIDTH 3 /* SR - [2:0] */ |
| 103 | |
| 104 | /* |
| 105 | * R5 (0x05) - DAC_CTRL3 |
| 106 | */ |
| 107 | #define WM8523_ZC 0x0010 /* ZC */ |
| 108 | #define WM8523_ZC_MASK 0x0010 /* ZC */ |
| 109 | #define WM8523_ZC_SHIFT 4 /* ZC */ |
| 110 | #define WM8523_ZC_WIDTH 1 /* ZC */ |
| 111 | #define WM8523_DACR 0x0008 /* DACR */ |
| 112 | #define WM8523_DACR_MASK 0x0008 /* DACR */ |
| 113 | #define WM8523_DACR_SHIFT 3 /* DACR */ |
| 114 | #define WM8523_DACR_WIDTH 1 /* DACR */ |
| 115 | #define WM8523_DACL 0x0004 /* DACL */ |
| 116 | #define WM8523_DACL_MASK 0x0004 /* DACL */ |
| 117 | #define WM8523_DACL_SHIFT 2 /* DACL */ |
| 118 | #define WM8523_DACL_WIDTH 1 /* DACL */ |
| 119 | #define WM8523_VOL_UP_RAMP 0x0002 /* VOL_UP_RAMP */ |
| 120 | #define WM8523_VOL_UP_RAMP_MASK 0x0002 /* VOL_UP_RAMP */ |
| 121 | #define WM8523_VOL_UP_RAMP_SHIFT 1 /* VOL_UP_RAMP */ |
| 122 | #define WM8523_VOL_UP_RAMP_WIDTH 1 /* VOL_UP_RAMP */ |
| 123 | #define WM8523_VOL_DOWN_RAMP 0x0001 /* VOL_DOWN_RAMP */ |
| 124 | #define WM8523_VOL_DOWN_RAMP_MASK 0x0001 /* VOL_DOWN_RAMP */ |
| 125 | #define WM8523_VOL_DOWN_RAMP_SHIFT 0 /* VOL_DOWN_RAMP */ |
| 126 | #define WM8523_VOL_DOWN_RAMP_WIDTH 1 /* VOL_DOWN_RAMP */ |
| 127 | |
| 128 | /* |
| 129 | * R6 (0x06) - DAC_GAINL |
| 130 | */ |
| 131 | #define WM8523_DACL_VU 0x0200 /* DACL_VU */ |
| 132 | #define WM8523_DACL_VU_MASK 0x0200 /* DACL_VU */ |
| 133 | #define WM8523_DACL_VU_SHIFT 9 /* DACL_VU */ |
| 134 | #define WM8523_DACL_VU_WIDTH 1 /* DACL_VU */ |
| 135 | #define WM8523_DACL_VOL_MASK 0x01FF /* DACL_VOL - [8:0] */ |
| 136 | #define WM8523_DACL_VOL_SHIFT 0 /* DACL_VOL - [8:0] */ |
| 137 | #define WM8523_DACL_VOL_WIDTH 9 /* DACL_VOL - [8:0] */ |
| 138 | |
| 139 | /* |
| 140 | * R7 (0x07) - DAC_GAINR |
| 141 | */ |
| 142 | #define WM8523_DACR_VU 0x0200 /* DACR_VU */ |
| 143 | #define WM8523_DACR_VU_MASK 0x0200 /* DACR_VU */ |
| 144 | #define WM8523_DACR_VU_SHIFT 9 /* DACR_VU */ |
| 145 | #define WM8523_DACR_VU_WIDTH 1 /* DACR_VU */ |
| 146 | #define WM8523_DACR_VOL_MASK 0x01FF /* DACR_VOL - [8:0] */ |
| 147 | #define WM8523_DACR_VOL_SHIFT 0 /* DACR_VOL - [8:0] */ |
| 148 | #define WM8523_DACR_VOL_WIDTH 9 /* DACR_VOL - [8:0] */ |
| 149 | |
| 150 | /* |
| 151 | * R8 (0x08) - ZERO_DETECT |
| 152 | */ |
| 153 | #define WM8523_ZD_COUNT_MASK 0x0003 /* ZD_COUNT - [1:0] */ |
| 154 | #define WM8523_ZD_COUNT_SHIFT 0 /* ZD_COUNT - [1:0] */ |
| 155 | #define WM8523_ZD_COUNT_WIDTH 2 /* ZD_COUNT - [1:0] */ |
| 156 | |
| 157 | extern struct snd_soc_dai wm8523_dai; |
| 158 | extern struct snd_soc_codec_device soc_codec_dev_wm8523; |
| 159 | |
| 160 | #endif |