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Shawn Guo17723112012-04-28 13:00:50 +08001/*
Paul Gortmaker1ab599e2016-06-25 22:46:50 -04002 * Freescale i.MX23 pinctrl driver
3 *
4 * Author: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo17723112012-04-28 13:00:50 +08005 * Copyright 2012 Freescale Semiconductor, Inc.
6 *
7 * The code contained herein is licensed under the GNU General Public
8 * License. You may obtain a copy of the GNU General Public License
9 * Version 2 or later at the following locations:
10 *
11 * http://www.opensource.org/licenses/gpl-license.html
12 * http://www.gnu.org/copyleft/gpl.html
13 */
14
15#include <linux/init.h>
Shawn Guo17723112012-04-28 13:00:50 +080016#include <linux/of_device.h>
17#include <linux/pinctrl/pinctrl.h>
18#include "pinctrl-mxs.h"
19
20enum imx23_pin_enum {
21 GPMI_D00 = PINID(0, 0),
22 GPMI_D01 = PINID(0, 1),
23 GPMI_D02 = PINID(0, 2),
24 GPMI_D03 = PINID(0, 3),
25 GPMI_D04 = PINID(0, 4),
26 GPMI_D05 = PINID(0, 5),
27 GPMI_D06 = PINID(0, 6),
28 GPMI_D07 = PINID(0, 7),
29 GPMI_D08 = PINID(0, 8),
30 GPMI_D09 = PINID(0, 9),
31 GPMI_D10 = PINID(0, 10),
32 GPMI_D11 = PINID(0, 11),
33 GPMI_D12 = PINID(0, 12),
34 GPMI_D13 = PINID(0, 13),
35 GPMI_D14 = PINID(0, 14),
36 GPMI_D15 = PINID(0, 15),
37 GPMI_CLE = PINID(0, 16),
38 GPMI_ALE = PINID(0, 17),
39 GPMI_CE2N = PINID(0, 18),
40 GPMI_RDY0 = PINID(0, 19),
41 GPMI_RDY1 = PINID(0, 20),
42 GPMI_RDY2 = PINID(0, 21),
43 GPMI_RDY3 = PINID(0, 22),
44 GPMI_WPN = PINID(0, 23),
45 GPMI_WRN = PINID(0, 24),
46 GPMI_RDN = PINID(0, 25),
47 AUART1_CTS = PINID(0, 26),
48 AUART1_RTS = PINID(0, 27),
49 AUART1_RX = PINID(0, 28),
50 AUART1_TX = PINID(0, 29),
51 I2C_SCL = PINID(0, 30),
52 I2C_SDA = PINID(0, 31),
53 LCD_D00 = PINID(1, 0),
54 LCD_D01 = PINID(1, 1),
55 LCD_D02 = PINID(1, 2),
56 LCD_D03 = PINID(1, 3),
57 LCD_D04 = PINID(1, 4),
58 LCD_D05 = PINID(1, 5),
59 LCD_D06 = PINID(1, 6),
60 LCD_D07 = PINID(1, 7),
61 LCD_D08 = PINID(1, 8),
62 LCD_D09 = PINID(1, 9),
63 LCD_D10 = PINID(1, 10),
64 LCD_D11 = PINID(1, 11),
65 LCD_D12 = PINID(1, 12),
66 LCD_D13 = PINID(1, 13),
67 LCD_D14 = PINID(1, 14),
68 LCD_D15 = PINID(1, 15),
69 LCD_D16 = PINID(1, 16),
70 LCD_D17 = PINID(1, 17),
71 LCD_RESET = PINID(1, 18),
72 LCD_RS = PINID(1, 19),
73 LCD_WR = PINID(1, 20),
74 LCD_CS = PINID(1, 21),
75 LCD_DOTCK = PINID(1, 22),
76 LCD_ENABLE = PINID(1, 23),
77 LCD_HSYNC = PINID(1, 24),
78 LCD_VSYNC = PINID(1, 25),
79 PWM0 = PINID(1, 26),
80 PWM1 = PINID(1, 27),
81 PWM2 = PINID(1, 28),
82 PWM3 = PINID(1, 29),
83 PWM4 = PINID(1, 30),
84 SSP1_CMD = PINID(2, 0),
85 SSP1_DETECT = PINID(2, 1),
86 SSP1_DATA0 = PINID(2, 2),
87 SSP1_DATA1 = PINID(2, 3),
88 SSP1_DATA2 = PINID(2, 4),
89 SSP1_DATA3 = PINID(2, 5),
90 SSP1_SCK = PINID(2, 6),
91 ROTARYA = PINID(2, 7),
92 ROTARYB = PINID(2, 8),
93 EMI_A00 = PINID(2, 9),
94 EMI_A01 = PINID(2, 10),
95 EMI_A02 = PINID(2, 11),
96 EMI_A03 = PINID(2, 12),
97 EMI_A04 = PINID(2, 13),
98 EMI_A05 = PINID(2, 14),
99 EMI_A06 = PINID(2, 15),
100 EMI_A07 = PINID(2, 16),
101 EMI_A08 = PINID(2, 17),
102 EMI_A09 = PINID(2, 18),
103 EMI_A10 = PINID(2, 19),
104 EMI_A11 = PINID(2, 20),
105 EMI_A12 = PINID(2, 21),
106 EMI_BA0 = PINID(2, 22),
107 EMI_BA1 = PINID(2, 23),
108 EMI_CASN = PINID(2, 24),
109 EMI_CE0N = PINID(2, 25),
110 EMI_CE1N = PINID(2, 26),
111 GPMI_CE1N = PINID(2, 27),
112 GPMI_CE0N = PINID(2, 28),
113 EMI_CKE = PINID(2, 29),
114 EMI_RASN = PINID(2, 30),
115 EMI_WEN = PINID(2, 31),
116 EMI_D00 = PINID(3, 0),
117 EMI_D01 = PINID(3, 1),
118 EMI_D02 = PINID(3, 2),
119 EMI_D03 = PINID(3, 3),
120 EMI_D04 = PINID(3, 4),
121 EMI_D05 = PINID(3, 5),
122 EMI_D06 = PINID(3, 6),
123 EMI_D07 = PINID(3, 7),
124 EMI_D08 = PINID(3, 8),
125 EMI_D09 = PINID(3, 9),
126 EMI_D10 = PINID(3, 10),
127 EMI_D11 = PINID(3, 11),
128 EMI_D12 = PINID(3, 12),
129 EMI_D13 = PINID(3, 13),
130 EMI_D14 = PINID(3, 14),
131 EMI_D15 = PINID(3, 15),
132 EMI_DQM0 = PINID(3, 16),
133 EMI_DQM1 = PINID(3, 17),
134 EMI_DQS0 = PINID(3, 18),
135 EMI_DQS1 = PINID(3, 19),
136 EMI_CLK = PINID(3, 20),
137 EMI_CLKN = PINID(3, 21),
138};
139
140static const struct pinctrl_pin_desc imx23_pins[] = {
141 MXS_PINCTRL_PIN(GPMI_D00),
142 MXS_PINCTRL_PIN(GPMI_D01),
143 MXS_PINCTRL_PIN(GPMI_D02),
144 MXS_PINCTRL_PIN(GPMI_D03),
145 MXS_PINCTRL_PIN(GPMI_D04),
146 MXS_PINCTRL_PIN(GPMI_D05),
147 MXS_PINCTRL_PIN(GPMI_D06),
148 MXS_PINCTRL_PIN(GPMI_D07),
149 MXS_PINCTRL_PIN(GPMI_D08),
150 MXS_PINCTRL_PIN(GPMI_D09),
151 MXS_PINCTRL_PIN(GPMI_D10),
152 MXS_PINCTRL_PIN(GPMI_D11),
153 MXS_PINCTRL_PIN(GPMI_D12),
154 MXS_PINCTRL_PIN(GPMI_D13),
155 MXS_PINCTRL_PIN(GPMI_D14),
156 MXS_PINCTRL_PIN(GPMI_D15),
157 MXS_PINCTRL_PIN(GPMI_CLE),
158 MXS_PINCTRL_PIN(GPMI_ALE),
159 MXS_PINCTRL_PIN(GPMI_CE2N),
160 MXS_PINCTRL_PIN(GPMI_RDY0),
161 MXS_PINCTRL_PIN(GPMI_RDY1),
162 MXS_PINCTRL_PIN(GPMI_RDY2),
163 MXS_PINCTRL_PIN(GPMI_RDY3),
164 MXS_PINCTRL_PIN(GPMI_WPN),
165 MXS_PINCTRL_PIN(GPMI_WRN),
166 MXS_PINCTRL_PIN(GPMI_RDN),
167 MXS_PINCTRL_PIN(AUART1_CTS),
168 MXS_PINCTRL_PIN(AUART1_RTS),
169 MXS_PINCTRL_PIN(AUART1_RX),
170 MXS_PINCTRL_PIN(AUART1_TX),
171 MXS_PINCTRL_PIN(I2C_SCL),
172 MXS_PINCTRL_PIN(I2C_SDA),
173 MXS_PINCTRL_PIN(LCD_D00),
174 MXS_PINCTRL_PIN(LCD_D01),
175 MXS_PINCTRL_PIN(LCD_D02),
176 MXS_PINCTRL_PIN(LCD_D03),
177 MXS_PINCTRL_PIN(LCD_D04),
178 MXS_PINCTRL_PIN(LCD_D05),
179 MXS_PINCTRL_PIN(LCD_D06),
180 MXS_PINCTRL_PIN(LCD_D07),
181 MXS_PINCTRL_PIN(LCD_D08),
182 MXS_PINCTRL_PIN(LCD_D09),
183 MXS_PINCTRL_PIN(LCD_D10),
184 MXS_PINCTRL_PIN(LCD_D11),
185 MXS_PINCTRL_PIN(LCD_D12),
186 MXS_PINCTRL_PIN(LCD_D13),
187 MXS_PINCTRL_PIN(LCD_D14),
188 MXS_PINCTRL_PIN(LCD_D15),
189 MXS_PINCTRL_PIN(LCD_D16),
190 MXS_PINCTRL_PIN(LCD_D17),
191 MXS_PINCTRL_PIN(LCD_RESET),
192 MXS_PINCTRL_PIN(LCD_RS),
193 MXS_PINCTRL_PIN(LCD_WR),
194 MXS_PINCTRL_PIN(LCD_CS),
195 MXS_PINCTRL_PIN(LCD_DOTCK),
196 MXS_PINCTRL_PIN(LCD_ENABLE),
197 MXS_PINCTRL_PIN(LCD_HSYNC),
198 MXS_PINCTRL_PIN(LCD_VSYNC),
199 MXS_PINCTRL_PIN(PWM0),
200 MXS_PINCTRL_PIN(PWM1),
201 MXS_PINCTRL_PIN(PWM2),
202 MXS_PINCTRL_PIN(PWM3),
203 MXS_PINCTRL_PIN(PWM4),
204 MXS_PINCTRL_PIN(SSP1_CMD),
205 MXS_PINCTRL_PIN(SSP1_DETECT),
206 MXS_PINCTRL_PIN(SSP1_DATA0),
207 MXS_PINCTRL_PIN(SSP1_DATA1),
208 MXS_PINCTRL_PIN(SSP1_DATA2),
209 MXS_PINCTRL_PIN(SSP1_DATA3),
210 MXS_PINCTRL_PIN(SSP1_SCK),
211 MXS_PINCTRL_PIN(ROTARYA),
212 MXS_PINCTRL_PIN(ROTARYB),
213 MXS_PINCTRL_PIN(EMI_A00),
214 MXS_PINCTRL_PIN(EMI_A01),
215 MXS_PINCTRL_PIN(EMI_A02),
216 MXS_PINCTRL_PIN(EMI_A03),
217 MXS_PINCTRL_PIN(EMI_A04),
218 MXS_PINCTRL_PIN(EMI_A05),
219 MXS_PINCTRL_PIN(EMI_A06),
220 MXS_PINCTRL_PIN(EMI_A07),
221 MXS_PINCTRL_PIN(EMI_A08),
222 MXS_PINCTRL_PIN(EMI_A09),
223 MXS_PINCTRL_PIN(EMI_A10),
224 MXS_PINCTRL_PIN(EMI_A11),
225 MXS_PINCTRL_PIN(EMI_A12),
226 MXS_PINCTRL_PIN(EMI_BA0),
227 MXS_PINCTRL_PIN(EMI_BA1),
228 MXS_PINCTRL_PIN(EMI_CASN),
229 MXS_PINCTRL_PIN(EMI_CE0N),
230 MXS_PINCTRL_PIN(EMI_CE1N),
231 MXS_PINCTRL_PIN(GPMI_CE1N),
232 MXS_PINCTRL_PIN(GPMI_CE0N),
233 MXS_PINCTRL_PIN(EMI_CKE),
234 MXS_PINCTRL_PIN(EMI_RASN),
235 MXS_PINCTRL_PIN(EMI_WEN),
236 MXS_PINCTRL_PIN(EMI_D00),
237 MXS_PINCTRL_PIN(EMI_D01),
238 MXS_PINCTRL_PIN(EMI_D02),
239 MXS_PINCTRL_PIN(EMI_D03),
240 MXS_PINCTRL_PIN(EMI_D04),
241 MXS_PINCTRL_PIN(EMI_D05),
242 MXS_PINCTRL_PIN(EMI_D06),
243 MXS_PINCTRL_PIN(EMI_D07),
244 MXS_PINCTRL_PIN(EMI_D08),
245 MXS_PINCTRL_PIN(EMI_D09),
246 MXS_PINCTRL_PIN(EMI_D10),
247 MXS_PINCTRL_PIN(EMI_D11),
248 MXS_PINCTRL_PIN(EMI_D12),
249 MXS_PINCTRL_PIN(EMI_D13),
250 MXS_PINCTRL_PIN(EMI_D14),
251 MXS_PINCTRL_PIN(EMI_D15),
252 MXS_PINCTRL_PIN(EMI_DQM0),
253 MXS_PINCTRL_PIN(EMI_DQM1),
254 MXS_PINCTRL_PIN(EMI_DQS0),
255 MXS_PINCTRL_PIN(EMI_DQS1),
256 MXS_PINCTRL_PIN(EMI_CLK),
257 MXS_PINCTRL_PIN(EMI_CLKN),
258};
259
260static struct mxs_regs imx23_regs = {
261 .muxsel = 0x100,
262 .drive = 0x200,
263 .pull = 0x400,
264};
265
266static struct mxs_pinctrl_soc_data imx23_pinctrl_data = {
267 .regs = &imx23_regs,
268 .pins = imx23_pins,
269 .npins = ARRAY_SIZE(imx23_pins),
270};
271
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800272static int imx23_pinctrl_probe(struct platform_device *pdev)
Shawn Guo17723112012-04-28 13:00:50 +0800273{
274 return mxs_pinctrl_probe(pdev, &imx23_pinctrl_data);
275}
276
Kiran Padwal5dfe10b2014-08-11 16:47:50 +0530277static const struct of_device_id imx23_pinctrl_of_match[] = {
Shawn Guo17723112012-04-28 13:00:50 +0800278 { .compatible = "fsl,imx23-pinctrl", },
279 { /* sentinel */ }
280};
Shawn Guo17723112012-04-28 13:00:50 +0800281
282static struct platform_driver imx23_pinctrl_driver = {
283 .driver = {
284 .name = "imx23-pinctrl",
Paul Gortmaker1ab599e2016-06-25 22:46:50 -0400285 .suppress_bind_attrs = true,
Shawn Guo17723112012-04-28 13:00:50 +0800286 .of_match_table = imx23_pinctrl_of_match,
287 },
288 .probe = imx23_pinctrl_probe,
Shawn Guo17723112012-04-28 13:00:50 +0800289};
290
291static int __init imx23_pinctrl_init(void)
292{
293 return platform_driver_register(&imx23_pinctrl_driver);
294}
Shawn Guoc43ba802012-07-19 16:41:10 +0800295postcore_initcall(imx23_pinctrl_init);