blob: be1407cf5abd1b1479e55fbfeac48be44dc90d4c [file] [log] [blame]
Shawn Guo9daaf312011-10-17 08:42:17 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
Shawn Guo36dffd82013-04-07 10:49:34 +080014#include "imx51.dtsi"
Shawn Guo9daaf312011-10-17 08:42:17 +080015
16/ {
17 model = "Freescale i.MX51 Babbage Board";
18 compatible = "fsl,imx51-babbage", "fsl,imx51";
19
Shawn Guo9daaf312011-10-17 08:42:17 +080020 memory {
21 reg = <0x90000000 0x20000000>;
22 };
23
Shawn Guobe4ccfc2012-12-31 11:32:48 +080024 display@di0 {
25 compatible = "fsl,imx-parallel-display";
26 crtcs = <&ipu 0>;
27 interface-pix-fmt = "rgb24";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
Fabio Estevam493a8632013-10-08 15:52:12 -030030 display-timings {
31 native-mode = <&timing0>;
32 timing0: dvi {
33 clock-frequency = <65000000>;
34 hactive = <1024>;
35 vactive = <768>;
36 hback-porch = <220>;
37 hfront-porch = <40>;
38 vback-porch = <21>;
39 vfront-porch = <7>;
40 hsync-len = <60>;
41 vsync-len = <10>;
42 };
43 };
Shawn Guobe4ccfc2012-12-31 11:32:48 +080044 };
Sascha Hauerd6aef842012-11-12 15:39:01 +010045
Shawn Guobe4ccfc2012-12-31 11:32:48 +080046 display@di1 {
47 compatible = "fsl,imx-parallel-display";
48 crtcs = <&ipu 1>;
49 interface-pix-fmt = "rgb565";
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
Fabio Estevam493a8632013-10-08 15:52:12 -030052 status = "disabled";
53 display-timings {
54 native-mode = <&timing1>;
55 timing1: claawvga {
56 clock-frequency = <27000000>;
57 hactive = <800>;
58 vactive = <480>;
59 hback-porch = <40>;
60 hfront-porch = <60>;
61 vback-porch = <10>;
62 vfront-porch = <10>;
63 hsync-len = <20>;
64 vsync-len = <10>;
65 hsync-active = <0>;
66 vsync-active = <0>;
67 de-active = <1>;
68 pixelclk-active = <0>;
69 };
70 };
Shawn Guo9daaf312011-10-17 08:42:17 +080071 };
72
73 gpio-keys {
74 compatible = "gpio-keys";
75
76 power {
77 label = "Power Button";
Richard Zhao4d191862011-12-14 09:26:44 +080078 gpios = <&gpio2 21 0>;
Shawn Guo9daaf312011-10-17 08:42:17 +080079 linux,code = <116>; /* KEY_POWER */
80 gpio-key,wakeup;
81 };
82 };
Shawn Guoa15d9f82012-05-11 13:08:46 +080083
84 sound {
85 compatible = "fsl,imx51-babbage-sgtl5000",
86 "fsl,imx-audio-sgtl5000";
87 model = "imx51-babbage-sgtl5000";
88 ssi-controller = <&ssi2>;
89 audio-codec = <&sgtl5000>;
90 audio-routing =
91 "MIC_IN", "Mic Jack",
92 "Mic Jack", "Mic Bias",
93 "Headphone Jack", "HP_OUT";
94 mux-int-port = <2>;
95 mux-ext-port = <3>;
96 };
Fabio Estevam84bb0842013-06-09 22:07:47 -030097
98 clocks {
Alexander Shiyan677e28b2013-07-27 11:19:45 +040099 ckih1 {
100 clock-frequency = <22579200>;
101 };
102
Fabio Estevam84bb0842013-06-09 22:07:47 -0300103 clk_26M: codec_clock {
104 compatible = "fixed-clock";
105 reg=<0>;
106 #clock-cells = <0>;
107 clock-frequency = <26000000>;
108 gpios = <&gpio4 26 1>;
109 };
110 };
Shawn Guo9daaf312011-10-17 08:42:17 +0800111};
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800112
113&esdhc1 {
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_esdhc1_1>;
116 fsl,cd-controller;
117 fsl,wp-controller;
118 status = "okay";
119};
120
121&esdhc2 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_esdhc2_1>;
124 cd-gpios = <&gpio1 6 0>;
125 wp-gpios = <&gpio1 5 0>;
126 status = "okay";
127};
128
129&uart3 {
130 pinctrl-names = "default";
Alexander Shiyan727b8122013-08-21 11:28:23 +0400131 pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>;
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800132 fsl,uart-has-rtscts;
133 status = "okay";
134};
135
136&ecspi1 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ecspi1_1>;
139 fsl,spi-num-chipselects = <2>;
140 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
141 status = "okay";
142
143 pmic: mc13892@0 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "fsl,mc13892";
147 spi-max-frequency = <6000000>;
Sascha Hauerdc071432013-06-25 15:51:59 +0200148 spi-cs-high;
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800149 reg = <0>;
150 interrupt-parent = <&gpio1>;
151 interrupts = <8 0x4>;
152
153 regulators {
154 sw1_reg: sw1 {
155 regulator-min-microvolt = <600000>;
156 regulator-max-microvolt = <1375000>;
157 regulator-boot-on;
158 regulator-always-on;
159 };
160
161 sw2_reg: sw2 {
162 regulator-min-microvolt = <900000>;
163 regulator-max-microvolt = <1850000>;
164 regulator-boot-on;
165 regulator-always-on;
166 };
167
168 sw3_reg: sw3 {
169 regulator-min-microvolt = <1100000>;
170 regulator-max-microvolt = <1850000>;
171 regulator-boot-on;
172 regulator-always-on;
173 };
174
175 sw4_reg: sw4 {
176 regulator-min-microvolt = <1100000>;
177 regulator-max-microvolt = <1850000>;
178 regulator-boot-on;
179 regulator-always-on;
180 };
181
182 vpll_reg: vpll {
183 regulator-min-microvolt = <1050000>;
184 regulator-max-microvolt = <1800000>;
185 regulator-boot-on;
186 regulator-always-on;
187 };
188
189 vdig_reg: vdig {
190 regulator-min-microvolt = <1650000>;
191 regulator-max-microvolt = <1650000>;
192 regulator-boot-on;
193 };
194
195 vsd_reg: vsd {
196 regulator-min-microvolt = <1800000>;
197 regulator-max-microvolt = <3150000>;
198 };
199
200 vusb2_reg: vusb2 {
201 regulator-min-microvolt = <2400000>;
202 regulator-max-microvolt = <2775000>;
203 regulator-boot-on;
204 regulator-always-on;
205 };
206
207 vvideo_reg: vvideo {
208 regulator-min-microvolt = <2775000>;
209 regulator-max-microvolt = <2775000>;
210 };
211
212 vaudio_reg: vaudio {
213 regulator-min-microvolt = <2300000>;
214 regulator-max-microvolt = <3000000>;
215 };
216
217 vcam_reg: vcam {
218 regulator-min-microvolt = <2500000>;
219 regulator-max-microvolt = <3000000>;
220 };
221
222 vgen1_reg: vgen1 {
223 regulator-min-microvolt = <1200000>;
224 regulator-max-microvolt = <1200000>;
225 };
226
227 vgen2_reg: vgen2 {
228 regulator-min-microvolt = <1200000>;
229 regulator-max-microvolt = <3150000>;
230 regulator-always-on;
231 };
232
233 vgen3_reg: vgen3 {
234 regulator-min-microvolt = <1800000>;
235 regulator-max-microvolt = <2900000>;
236 regulator-always-on;
237 };
238 };
239 };
240
241 flash: at45db321d@1 {
242 #address-cells = <1>;
243 #size-cells = <1>;
244 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
245 spi-max-frequency = <25000000>;
246 reg = <1>;
247
248 partition@0 {
249 label = "U-Boot";
250 reg = <0x0 0x40000>;
251 read-only;
252 };
253
254 partition@40000 {
255 label = "Kernel";
256 reg = <0x40000 0x3c0000>;
257 };
258 };
259};
260
261&ssi2 {
262 fsl,mode = "i2s-slave";
263 status = "okay";
264};
265
266&iomuxc {
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_hog>;
269
270 hog {
271 pinctrl_hog: hoggrp {
272 fsl,pins = <
Shawn Guoe1641532013-02-20 10:32:52 +0800273 MX51_PAD_GPIO1_0__SD1_CD 0x20d5
274 MX51_PAD_GPIO1_1__SD1_WP 0x20d5
275 MX51_PAD_GPIO1_5__GPIO1_5 0x100
276 MX51_PAD_GPIO1_6__GPIO1_6 0x100
277 MX51_PAD_EIM_A27__GPIO2_21 0x5
278 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
279 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
Fabio Estevam84bb0842013-06-09 22:07:47 -0300280 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800281 >;
282 };
283 };
284};
285
286&uart1 {
287 pinctrl-names = "default";
Alexander Shiyan727b8122013-08-21 11:28:23 +0400288 pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>;
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800289 fsl,uart-has-rtscts;
290 status = "okay";
291};
292
293&uart2 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_uart2_1>;
296 status = "okay";
297};
298
299&i2c2 {
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_i2c2_1>;
302 status = "okay";
303
304 sgtl5000: codec@0a {
305 compatible = "fsl,sgtl5000";
306 reg = <0x0a>;
Fabio Estevam84bb0842013-06-09 22:07:47 -0300307 clocks = <&clk_26M>;
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800308 VDDA-supply = <&vdig_reg>;
309 VDDIO-supply = <&vvideo_reg>;
310 };
311};
312
313&audmux {
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_audmux_1>;
316 status = "okay";
317};
318
319&fec {
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_fec_1>;
322 phy-mode = "mii";
323 status = "okay";
324};
Liu Ying67eb7c02013-01-03 20:37:34 +0800325
326&kpp {
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_kpp_1>;
329 linux,keymap = <0x00000067 /* KEY_UP */
330 0x0001006c /* KEY_DOWN */
331 0x00020072 /* KEY_VOLUMEDOWN */
332 0x00030066 /* KEY_HOME */
333 0x0100006a /* KEY_RIGHT */
334 0x01010069 /* KEY_LEFT */
335 0x0102001c /* KEY_ENTER */
336 0x01030073 /* KEY_VOLUMEUP */
337 0x02000040 /* KEY_F6 */
338 0x02010042 /* KEY_F8 */
339 0x02020043 /* KEY_F9 */
340 0x02030044 /* KEY_F10 */
341 0x0300003b /* KEY_F1 */
342 0x0301003c /* KEY_F2 */
343 0x0302003d /* KEY_F3 */
344 0x03030074>; /* KEY_POWER */
345 status = "okay";
346};