blob: 174f86938c89c6917b0eccfa13b799cb9c8917ec [file] [log] [blame]
Shawn Guo73d2b4c2011-10-17 08:42:16 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
Shawn Guo36dffd82013-04-07 10:49:34 +080014#include "imx53.dtsi"
Shawn Guo73d2b4c2011-10-17 08:42:16 +080015
16/ {
17 model = "Freescale i.MX53 Automotive Reference Design Board";
18 compatible = "fsl,imx53-ard", "fsl,imx53";
19
Shawn Guo73d2b4c2011-10-17 08:42:16 +080020 memory {
21 reg = <0x70000000 0x40000000>;
22 };
23
Shawn Guo73d2b4c2011-10-17 08:42:16 +080024 eim-cs1@f4000000 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "fsl,eim-bus", "simple-bus";
28 reg = <0xf4000000 0x3ff0000>;
29 ranges;
30
31 lan9220@f4000000 {
32 compatible = "smsc,lan9220", "smsc,lan9115";
33 reg = <0xf4000000 0x2000000>;
34 phy-mode = "mii";
Richard Zhao4d191862011-12-14 09:26:44 +080035 interrupt-parent = <&gpio2>;
Shawn Guo65dee072012-08-02 22:08:26 +080036 interrupts = <31 0x8>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080037 reg-io-width = <4>;
Shawn Guo1eec0c52012-08-02 22:48:39 +080038 /*
39 * VDD33A and VDDVARIO of LAN9220 are supplied by
40 * SW4_3V3 of LTC3589. Before the regulator driver
41 * for this PMIC is available, we use a fixed dummy
42 * 3V3 regulator to get LAN9220 driver probing work.
43 */
44 vdd33a-supply = <&reg_3p3v>;
45 vddvario-supply = <&reg_3p3v>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080046 smsc,irq-push-pull;
47 };
48 };
49
Shawn Guo1eec0c52012-08-02 22:48:39 +080050 regulators {
51 compatible = "simple-bus";
52
53 reg_3p3v: 3p3v {
54 compatible = "regulator-fixed";
55 regulator-name = "3P3V";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
58 regulator-always-on;
59 };
60 };
61
Shawn Guo73d2b4c2011-10-17 08:42:16 +080062 gpio-keys {
63 compatible = "gpio-keys";
64
65 home {
66 label = "Home";
Richard Zhao4d191862011-12-14 09:26:44 +080067 gpios = <&gpio5 10 0>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080068 linux,code = <102>; /* KEY_HOME */
69 gpio-key,wakeup;
70 };
71
72 back {
73 label = "Back";
Richard Zhao4d191862011-12-14 09:26:44 +080074 gpios = <&gpio5 11 0>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080075 linux,code = <158>; /* KEY_BACK */
76 gpio-key,wakeup;
77 };
78
79 program {
80 label = "Program";
Richard Zhao4d191862011-12-14 09:26:44 +080081 gpios = <&gpio5 12 0>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080082 linux,code = <362>; /* KEY_PROGRAM */
83 gpio-key,wakeup;
84 };
85
86 volume-up {
87 label = "Volume Up";
Richard Zhao4d191862011-12-14 09:26:44 +080088 gpios = <&gpio5 13 0>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080089 linux,code = <115>; /* KEY_VOLUMEUP */
90 };
91
92 volume-down {
93 label = "Volume Down";
Richard Zhao4d191862011-12-14 09:26:44 +080094 gpios = <&gpio4 0 0>;
Shawn Guo73d2b4c2011-10-17 08:42:16 +080095 linux,code = <114>; /* KEY_VOLUMEDOWN */
96 };
97 };
98};
Shawn Guobe4ccfc2012-12-31 11:32:48 +080099
100&esdhc1 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_esdhc1_2>;
103 cd-gpios = <&gpio1 1 0>;
104 wp-gpios = <&gpio1 9 0>;
105 status = "okay";
106};
107
108&iomuxc {
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_hog>;
111
112 hog {
113 pinctrl_hog: hoggrp {
114 fsl,pins = <
Shawn Guoe1641532013-02-20 10:32:52 +0800115 MX53_PAD_GPIO_1__GPIO1_1 0x80000000
116 MX53_PAD_GPIO_9__GPIO1_9 0x80000000
117 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
118 MX53_PAD_GPIO_10__GPIO4_0 0x80000000
119 MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
120 MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
121 MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
122 MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
123 MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
124 MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
125 MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
126 MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
127 MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
128 MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
129 MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
130 MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
131 MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
132 MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
133 MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
134 MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
135 MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
136 MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
137 MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
138 MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
139 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
140 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
141 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
142 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
143 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
144 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
145 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
146 MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
147 MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
148 MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800149 >;
150 };
151 };
152};
153
154&uart1 {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_uart1_2>;
157 status = "okay";
158};