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Shawn Guo7d740f82011-09-06 13:53:26 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
Shawn Guo36dffd82013-04-07 10:49:34 +080014#include "imx6q.dtsi"
Shawn Guo7d740f82011-09-06 13:53:26 +080015
16/ {
Dirk Behme752baf52011-12-08 08:22:01 +010017 model = "Freescale i.MX6 Quad Armadillo2 Board";
18 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
Shawn Guo7d740f82011-09-06 13:53:26 +080019
Shawn Guo7d740f82011-09-06 13:53:26 +080020 memory {
21 reg = <0x10000000 0x80000000>;
22 };
23
Shawn Guo648162a2012-02-27 17:11:12 +080024 regulators {
25 compatible = "simple-bus";
26
27 reg_3p3v: 3p3v {
28 compatible = "regulator-fixed";
29 regulator-name = "3P3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
32 regulator-always-on;
33 };
34 };
35
Shawn Guo7d740f82011-09-06 13:53:26 +080036 leds {
37 compatible = "gpio-leds";
38
39 debug-led {
40 label = "Heartbeat";
Richard Zhao4d191862011-12-14 09:26:44 +080041 gpios = <&gpio3 25 0>;
Shawn Guo7d740f82011-09-06 13:53:26 +080042 linux,default-trigger = "heartbeat";
43 };
44 };
45};
Shawn Guobe4ccfc2012-12-31 11:32:48 +080046
47&gpmi {
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_gpmi_nand_1>;
50 status = "disabled"; /* gpmi nand conflicts with SD */
51};
52
53&iomuxc {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_hog>;
56
57 hog {
58 pinctrl_hog: hoggrp {
59 fsl,pins = <
Shawn Guoc56009b2f2013-07-11 13:58:36 +080060 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
Shawn Guobe4ccfc2012-12-31 11:32:48 +080061 >;
62 };
63 };
64
65 arm2 {
66 pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
67 fsl,pins = <
Shawn Guoc56009b2f2013-07-11 13:58:36 +080068 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
69 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
Shawn Guobe4ccfc2012-12-31 11:32:48 +080070 >;
71 };
72 };
73};
74
75&fec {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_enet_2>;
78 phy-mode = "rgmii";
79 status = "okay";
80};
81
82&usdhc3 {
83 cd-gpios = <&gpio6 11 0>;
84 wp-gpios = <&gpio6 14 0>;
85 vmmc-supply = <&reg_3p3v>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_usdhc3_1
88 &pinctrl_usdhc3_arm2>;
89 status = "okay";
90};
91
92&usdhc4 {
93 non-removable;
94 vmmc-supply = <&reg_3p3v>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_usdhc4_1>;
97 status = "okay";
98};
99
Huang Shijie51056d92013-07-08 17:14:22 +0800100&uart2 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart2_2>;
103 fsl,dte-mode;
104 fsl,uart-has-rtscts;
Huang Shijie51056d92013-07-08 17:14:22 +0800105 status = "okay";
106};
107
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800108&uart4 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_uart4_1>;
111 status = "okay";
112};