blob: 0f06f8687b0bb46581be1b75dce84a4f93e303e5 [file] [log] [blame]
Linus Walleij4980f9b2012-09-06 09:08:24 +01001/*
2 * SoC core Device Tree for the ARM Integrator platforms
3 */
4
5/include/ "skeleton.dtsi"
6
7/ {
Linus Walleijbb4dbef2013-06-16 02:44:27 +02008 core-module@10000000 {
9 compatible = "arm,core-module-integrator";
10 reg = <0x10000000 0x200>;
11 };
12
Linus Walleij4980f9b2012-09-06 09:08:24 +010013 timer@13000000 {
14 reg = <0x13000000 0x100>;
15 interrupt-parent = <&pic>;
16 interrupts = <5>;
17 };
18
19 timer@13000100 {
20 reg = <0x13000100 0x100>;
21 interrupt-parent = <&pic>;
22 interrupts = <6>;
23 };
24
25 timer@13000200 {
26 reg = <0x13000200 0x100>;
27 interrupt-parent = <&pic>;
28 interrupts = <7>;
29 };
30
31 pic@14000000 {
32 compatible = "arm,versatile-fpga-irq";
33 #interrupt-cells = <1>;
34 interrupt-controller;
35 reg = <0x14000000 0x100>;
36 clear-mask = <0xffffffff>;
37 };
Linus Walleij4672cdd2012-09-06 09:08:47 +010038
Linus Walleij73efd532012-09-06 09:09:11 +010039 flash@24000000 {
40 compatible = "cfi-flash";
41 reg = <0x24000000 0x02000000>;
42 };
43
Linus Walleij4672cdd2012-09-06 09:08:47 +010044 fpga {
45 compatible = "arm,amba-bus", "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49 interrupt-parent = <&pic>;
50
51 /*
52 * These PrimeCells are in the same locations and using the
53 * same interrupts in all Integrators, however the silicon
54 * version deployed is different.
55 */
56 rtc@15000000 {
57 reg = <0x15000000 0x1000>;
58 interrupts = <8>;
59 };
60
61 uart@16000000 {
62 reg = <0x16000000 0x1000>;
63 interrupts = <1>;
64 };
65
66 uart@17000000 {
67 reg = <0x17000000 0x1000>;
68 interrupts = <2>;
69 };
70
71 kmi@18000000 {
72 reg = <0x18000000 0x1000>;
73 interrupts = <3>;
74 };
75
76 kmi@19000000 {
77 reg = <0x19000000 0x1000>;
78 interrupts = <4>;
79 };
80 };
Linus Walleij4980f9b2012-09-06 09:08:24 +010081};