Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 1 | /* |
| 2 | * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC |
| 3 | * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC |
| 4 | * |
| 5 | * Copyright (C) 2013 Atmel, |
| 6 | * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> |
| 7 | * |
| 8 | * Licensed under GPLv2 or later. |
| 9 | */ |
| 10 | |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 11 | #include "skeleton.dtsi" |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 12 | #include <dt-bindings/dma/at91.h> |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 13 | #include <dt-bindings/pinctrl/at91.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 15 | #include <dt-bindings/gpio/gpio.h> |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 16 | |
| 17 | / { |
| 18 | model = "Atmel SAMA5D3 family SoC"; |
| 19 | compatible = "atmel,sama5d3", "atmel,sama5"; |
| 20 | interrupt-parent = <&aic>; |
| 21 | |
| 22 | aliases { |
| 23 | serial0 = &dbgu; |
| 24 | serial1 = &usart0; |
| 25 | serial2 = &usart1; |
| 26 | serial3 = &usart2; |
| 27 | serial4 = &usart3; |
| 28 | gpio0 = &pioA; |
| 29 | gpio1 = &pioB; |
| 30 | gpio2 = &pioC; |
| 31 | gpio3 = &pioD; |
| 32 | gpio4 = &pioE; |
| 33 | tcb0 = &tcb0; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 34 | i2c0 = &i2c0; |
| 35 | i2c1 = &i2c1; |
| 36 | i2c2 = &i2c2; |
| 37 | ssc0 = &ssc0; |
| 38 | ssc1 = &ssc1; |
| 39 | }; |
| 40 | cpus { |
Arnd Bergmann | 8b2efa89 | 2013-06-10 16:48:36 +0200 | [diff] [blame] | 41 | #address-cells = <1>; |
| 42 | #size-cells = <0>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 43 | cpu@0 { |
Lorenzo Pieralisi | e757a6e | 2013-04-18 18:31:35 +0100 | [diff] [blame] | 44 | device_type = "cpu"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 45 | compatible = "arm,cortex-a5"; |
Lorenzo Pieralisi | e757a6e | 2013-04-18 18:31:35 +0100 | [diff] [blame] | 46 | reg = <0x0>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 47 | }; |
| 48 | }; |
| 49 | |
Alexandre Belloni | d9da977 | 2013-08-05 17:26:06 +0200 | [diff] [blame] | 50 | pmu { |
| 51 | compatible = "arm,cortex-a5-pmu"; |
| 52 | interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; |
| 53 | }; |
| 54 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 55 | memory { |
| 56 | reg = <0x20000000 0x8000000>; |
| 57 | }; |
| 58 | |
| 59 | ahb { |
| 60 | compatible = "simple-bus"; |
| 61 | #address-cells = <1>; |
| 62 | #size-cells = <1>; |
| 63 | ranges; |
| 64 | |
| 65 | apb { |
| 66 | compatible = "simple-bus"; |
| 67 | #address-cells = <1>; |
| 68 | #size-cells = <1>; |
| 69 | ranges; |
| 70 | |
| 71 | mmc0: mmc@f0000000 { |
| 72 | compatible = "atmel,hsmci"; |
| 73 | reg = <0xf0000000 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 74 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 75 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; |
Ludovic Desroches | 05c1bc9 | 2013-04-16 15:03:10 +0200 | [diff] [blame] | 76 | dma-names = "rxtx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 77 | pinctrl-names = "default"; |
| 78 | pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; |
| 79 | status = "disabled"; |
| 80 | #address-cells = <1>; |
| 81 | #size-cells = <0>; |
| 82 | }; |
| 83 | |
| 84 | spi0: spi@f0004000 { |
| 85 | #address-cells = <1>; |
| 86 | #size-cells = <0>; |
Nicolas Ferre | b7ef678 | 2013-06-24 12:04:55 +0200 | [diff] [blame] | 87 | compatible = "atmel,at91rm9200-spi"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 88 | reg = <0xf0004000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 89 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; |
Nicolas Ferre | e543a73 | 2013-06-24 12:16:05 +0200 | [diff] [blame] | 90 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, |
| 91 | <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; |
| 92 | dma-names = "tx", "rx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 93 | pinctrl-names = "default"; |
| 94 | pinctrl-0 = <&pinctrl_spi0>; |
| 95 | status = "disabled"; |
| 96 | }; |
| 97 | |
| 98 | ssc0: ssc@f0008000 { |
| 99 | compatible = "atmel,at91sam9g45-ssc"; |
| 100 | reg = <0xf0008000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 101 | interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 102 | pinctrl-names = "default"; |
| 103 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
| 104 | status = "disabled"; |
| 105 | }; |
| 106 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 107 | tcb0: timer@f0010000 { |
| 108 | compatible = "atmel,at91sam9x5-tcb"; |
| 109 | reg = <0xf0010000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 110 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | i2c0: i2c@f0014000 { |
| 114 | compatible = "atmel,at91sam9x5-i2c"; |
| 115 | reg = <0xf0014000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 116 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 117 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, |
| 118 | <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; |
Ludovic Desroches | d9a63a4 | 2013-04-16 15:03:08 +0200 | [diff] [blame] | 119 | dma-names = "tx", "rx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 120 | pinctrl-names = "default"; |
| 121 | pinctrl-0 = <&pinctrl_i2c0>; |
| 122 | #address-cells = <1>; |
| 123 | #size-cells = <0>; |
| 124 | status = "disabled"; |
| 125 | }; |
| 126 | |
| 127 | i2c1: i2c@f0018000 { |
| 128 | compatible = "atmel,at91sam9x5-i2c"; |
| 129 | reg = <0xf0018000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 130 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 131 | dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, |
| 132 | <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; |
Ludovic Desroches | d9a63a4 | 2013-04-16 15:03:08 +0200 | [diff] [blame] | 133 | dma-names = "tx", "rx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 134 | pinctrl-names = "default"; |
| 135 | pinctrl-0 = <&pinctrl_i2c1>; |
| 136 | #address-cells = <1>; |
| 137 | #size-cells = <0>; |
| 138 | status = "disabled"; |
| 139 | }; |
| 140 | |
| 141 | usart0: serial@f001c000 { |
| 142 | compatible = "atmel,at91sam9260-usart"; |
| 143 | reg = <0xf001c000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 144 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 145 | pinctrl-names = "default"; |
| 146 | pinctrl-0 = <&pinctrl_usart0>; |
| 147 | status = "disabled"; |
| 148 | }; |
| 149 | |
| 150 | usart1: serial@f0020000 { |
| 151 | compatible = "atmel,at91sam9260-usart"; |
| 152 | reg = <0xf0020000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 153 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 154 | pinctrl-names = "default"; |
| 155 | pinctrl-0 = <&pinctrl_usart1>; |
| 156 | status = "disabled"; |
| 157 | }; |
| 158 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 159 | isi: isi@f0034000 { |
| 160 | compatible = "atmel,at91sam9g45-isi"; |
| 161 | reg = <0xf0034000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 162 | interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 163 | status = "disabled"; |
| 164 | }; |
| 165 | |
| 166 | mmc1: mmc@f8000000 { |
| 167 | compatible = "atmel,hsmci"; |
| 168 | reg = <0xf8000000 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 169 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 170 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; |
Ludovic Desroches | 05c1bc9 | 2013-04-16 15:03:10 +0200 | [diff] [blame] | 171 | dma-names = "rxtx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 172 | pinctrl-names = "default"; |
| 173 | pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; |
| 174 | status = "disabled"; |
| 175 | #address-cells = <1>; |
| 176 | #size-cells = <0>; |
| 177 | }; |
| 178 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 179 | spi1: spi@f8008000 { |
| 180 | #address-cells = <1>; |
| 181 | #size-cells = <0>; |
Nicolas Ferre | b7ef678 | 2013-06-24 12:04:55 +0200 | [diff] [blame] | 182 | compatible = "atmel,at91rm9200-spi"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 183 | reg = <0xf8008000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 184 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; |
Nicolas Ferre | e543a73 | 2013-06-24 12:16:05 +0200 | [diff] [blame] | 185 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, |
| 186 | <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; |
| 187 | dma-names = "tx", "rx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 188 | pinctrl-names = "default"; |
| 189 | pinctrl-0 = <&pinctrl_spi1>; |
| 190 | status = "disabled"; |
| 191 | }; |
| 192 | |
| 193 | ssc1: ssc@f800c000 { |
| 194 | compatible = "atmel,at91sam9g45-ssc"; |
| 195 | reg = <0xf800c000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 196 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 197 | pinctrl-names = "default"; |
| 198 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; |
| 199 | status = "disabled"; |
| 200 | }; |
| 201 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 202 | adc0: adc@f8018000 { |
| 203 | compatible = "atmel,at91sam9260-adc"; |
| 204 | reg = <0xf8018000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 205 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 206 | pinctrl-names = "default"; |
| 207 | pinctrl-0 = < |
| 208 | &pinctrl_adc0_adtrg |
| 209 | &pinctrl_adc0_ad0 |
| 210 | &pinctrl_adc0_ad1 |
| 211 | &pinctrl_adc0_ad2 |
| 212 | &pinctrl_adc0_ad3 |
| 213 | &pinctrl_adc0_ad4 |
| 214 | &pinctrl_adc0_ad5 |
| 215 | &pinctrl_adc0_ad6 |
| 216 | &pinctrl_adc0_ad7 |
| 217 | &pinctrl_adc0_ad8 |
| 218 | &pinctrl_adc0_ad9 |
| 219 | &pinctrl_adc0_ad10 |
| 220 | &pinctrl_adc0_ad11 |
| 221 | >; |
| 222 | atmel,adc-channel-base = <0x50>; |
| 223 | atmel,adc-channels-used = <0xfff>; |
| 224 | atmel,adc-drdy-mask = <0x1000000>; |
| 225 | atmel,adc-num-channels = <12>; |
| 226 | atmel,adc-startup-time = <40>; |
| 227 | atmel,adc-status-register = <0x30>; |
| 228 | atmel,adc-trigger-register = <0xc0>; |
| 229 | atmel,adc-use-external; |
| 230 | atmel,adc-vref = <3000>; |
| 231 | atmel,adc-res = <10 12>; |
| 232 | atmel,adc-res-names = "lowres", "highres"; |
| 233 | status = "disabled"; |
| 234 | |
| 235 | trigger@0 { |
| 236 | trigger-name = "external-rising"; |
| 237 | trigger-value = <0x1>; |
| 238 | trigger-external; |
| 239 | }; |
| 240 | trigger@1 { |
| 241 | trigger-name = "external-falling"; |
| 242 | trigger-value = <0x2>; |
| 243 | trigger-external; |
| 244 | }; |
| 245 | trigger@2 { |
| 246 | trigger-name = "external-any"; |
| 247 | trigger-value = <0x3>; |
| 248 | trigger-external; |
| 249 | }; |
| 250 | trigger@3 { |
| 251 | trigger-name = "continuous"; |
| 252 | trigger-value = <0x6>; |
| 253 | }; |
| 254 | }; |
| 255 | |
| 256 | tsadcc: tsadcc@f8018000 { |
| 257 | compatible = "atmel,at91sam9x5-tsadcc"; |
| 258 | reg = <0xf8018000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 259 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 260 | atmel,tsadcc_clock = <300000>; |
| 261 | atmel,filtering_average = <0x03>; |
| 262 | atmel,pendet_debounce = <0x08>; |
| 263 | atmel,pendet_sensitivity = <0x02>; |
| 264 | atmel,ts_sample_hold_time = <0x0a>; |
| 265 | status = "disabled"; |
| 266 | }; |
| 267 | |
| 268 | i2c2: i2c@f801c000 { |
| 269 | compatible = "atmel,at91sam9x5-i2c"; |
| 270 | reg = <0xf801c000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 271 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | d4ae89c | 2013-05-30 18:08:22 +0200 | [diff] [blame] | 272 | dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, |
| 273 | <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; |
Ludovic Desroches | d9a63a4 | 2013-04-16 15:03:08 +0200 | [diff] [blame] | 274 | dma-names = "tx", "rx"; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 275 | #address-cells = <1>; |
| 276 | #size-cells = <0>; |
| 277 | status = "disabled"; |
| 278 | }; |
| 279 | |
| 280 | usart2: serial@f8020000 { |
| 281 | compatible = "atmel,at91sam9260-usart"; |
| 282 | reg = <0xf8020000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 283 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 284 | pinctrl-names = "default"; |
| 285 | pinctrl-0 = <&pinctrl_usart2>; |
| 286 | status = "disabled"; |
| 287 | }; |
| 288 | |
| 289 | usart3: serial@f8024000 { |
| 290 | compatible = "atmel,at91sam9260-usart"; |
| 291 | reg = <0xf8024000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 292 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 293 | pinctrl-names = "default"; |
| 294 | pinctrl-0 = <&pinctrl_usart3>; |
| 295 | status = "disabled"; |
| 296 | }; |
| 297 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 298 | sha@f8034000 { |
| 299 | compatible = "atmel,sam9g46-sha"; |
| 300 | reg = <0xf8034000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 301 | interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | aes@f8038000 { |
| 305 | compatible = "atmel,sam9g46-aes"; |
| 306 | reg = <0xf8038000 0x100>; |
| 307 | interrupts = <43 4 0>; |
| 308 | }; |
| 309 | |
| 310 | tdes@f803c000 { |
| 311 | compatible = "atmel,sam9g46-tdes"; |
| 312 | reg = <0xf803c000 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 313 | interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 314 | }; |
| 315 | |
| 316 | dma0: dma-controller@ffffe600 { |
| 317 | compatible = "atmel,at91sam9g45-dma"; |
| 318 | reg = <0xffffe600 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 319 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 980ce7d | 2013-04-16 15:03:06 +0200 | [diff] [blame] | 320 | #dma-cells = <2>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 321 | }; |
| 322 | |
| 323 | dma1: dma-controller@ffffe800 { |
| 324 | compatible = "atmel,at91sam9g45-dma"; |
| 325 | reg = <0xffffe800 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 326 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; |
Ludovic Desroches | 980ce7d | 2013-04-16 15:03:06 +0200 | [diff] [blame] | 327 | #dma-cells = <2>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 328 | }; |
| 329 | |
| 330 | ramc0: ramc@ffffea00 { |
| 331 | compatible = "atmel,at91sam9g45-ddramc"; |
| 332 | reg = <0xffffea00 0x200>; |
| 333 | }; |
| 334 | |
| 335 | dbgu: serial@ffffee00 { |
| 336 | compatible = "atmel,at91sam9260-usart"; |
| 337 | reg = <0xffffee00 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 338 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 339 | pinctrl-names = "default"; |
| 340 | pinctrl-0 = <&pinctrl_dbgu>; |
| 341 | status = "disabled"; |
| 342 | }; |
| 343 | |
| 344 | aic: interrupt-controller@fffff000 { |
| 345 | #interrupt-cells = <3>; |
| 346 | compatible = "atmel,sama5d3-aic"; |
| 347 | interrupt-controller; |
| 348 | reg = <0xfffff000 0x200>; |
| 349 | atmel,external-irqs = <47>; |
| 350 | }; |
| 351 | |
| 352 | pinctrl@fffff200 { |
| 353 | #address-cells = <1>; |
| 354 | #size-cells = <1>; |
| 355 | compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 356 | ranges = <0xfffff200 0xfffff200 0xa00>; |
| 357 | atmel,mux-mask = < |
| 358 | /* A B C */ |
| 359 | 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ |
| 360 | 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ |
| 361 | 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ |
| 362 | 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ |
| 363 | 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ |
| 364 | >; |
| 365 | |
| 366 | /* shared pinctrl settings */ |
| 367 | adc0 { |
| 368 | pinctrl_adc0_adtrg: adc0_adtrg { |
| 369 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 370 | <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 371 | }; |
| 372 | pinctrl_adc0_ad0: adc0_ad0 { |
| 373 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 374 | <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 375 | }; |
| 376 | pinctrl_adc0_ad1: adc0_ad1 { |
| 377 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 378 | <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 379 | }; |
| 380 | pinctrl_adc0_ad2: adc0_ad2 { |
| 381 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 382 | <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 383 | }; |
| 384 | pinctrl_adc0_ad3: adc0_ad3 { |
| 385 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 386 | <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 387 | }; |
| 388 | pinctrl_adc0_ad4: adc0_ad4 { |
| 389 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 390 | <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 391 | }; |
| 392 | pinctrl_adc0_ad5: adc0_ad5 { |
| 393 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 394 | <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 395 | }; |
| 396 | pinctrl_adc0_ad6: adc0_ad6 { |
| 397 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 398 | <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 399 | }; |
| 400 | pinctrl_adc0_ad7: adc0_ad7 { |
| 401 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 402 | <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 403 | }; |
| 404 | pinctrl_adc0_ad8: adc0_ad8 { |
| 405 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 406 | <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 407 | }; |
| 408 | pinctrl_adc0_ad9: adc0_ad9 { |
| 409 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 410 | <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 411 | }; |
| 412 | pinctrl_adc0_ad10: adc0_ad10 { |
| 413 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 414 | <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 415 | }; |
| 416 | pinctrl_adc0_ad11: adc0_ad11 { |
| 417 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 418 | <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 419 | }; |
| 420 | }; |
| 421 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 422 | dbgu { |
| 423 | pinctrl_dbgu: dbgu-0 { |
| 424 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 425 | <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */ |
| 426 | AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 427 | }; |
| 428 | }; |
| 429 | |
| 430 | i2c0 { |
| 431 | pinctrl_i2c0: i2c0-0 { |
| 432 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 433 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ |
| 434 | AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 435 | }; |
| 436 | }; |
| 437 | |
| 438 | i2c1 { |
| 439 | pinctrl_i2c1: i2c1-0 { |
| 440 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 441 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ |
| 442 | AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 443 | }; |
| 444 | }; |
| 445 | |
| 446 | isi { |
| 447 | pinctrl_isi: isi-0 { |
| 448 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 449 | <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ |
| 450 | AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ |
| 451 | AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ |
| 452 | AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ |
| 453 | AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ |
| 454 | AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ |
| 455 | AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ |
| 456 | AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ |
| 457 | AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ |
| 458 | AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ |
| 459 | AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ |
| 460 | AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ |
| 461 | AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 462 | }; |
| 463 | pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { |
| 464 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 465 | <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 466 | }; |
| 467 | }; |
| 468 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 469 | mmc0 { |
| 470 | pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { |
| 471 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 472 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ |
| 473 | AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ |
| 474 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 475 | }; |
| 476 | pinctrl_mmc0_dat1_3: mmc0_dat1_3 { |
| 477 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 478 | <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ |
| 479 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ |
| 480 | AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 481 | }; |
| 482 | pinctrl_mmc0_dat4_7: mmc0_dat4_7 { |
| 483 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 484 | <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ |
| 485 | AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ |
| 486 | AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ |
| 487 | AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 488 | }; |
| 489 | }; |
| 490 | |
| 491 | mmc1 { |
| 492 | pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { |
| 493 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 494 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ |
| 495 | AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ |
| 496 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 497 | }; |
| 498 | pinctrl_mmc1_dat1_3: mmc1_dat1_3 { |
| 499 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 500 | <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ |
| 501 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ |
| 502 | AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 503 | }; |
| 504 | }; |
| 505 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 506 | nand0 { |
| 507 | pinctrl_nand0_ale_cle: nand0_ale_cle-0 { |
| 508 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 509 | <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ |
| 510 | AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 511 | }; |
| 512 | }; |
| 513 | |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 514 | spi0 { |
| 515 | pinctrl_spi0: spi0-0 { |
| 516 | atmel,pins = |
| 517 | <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ |
| 518 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ |
| 519 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ |
| 520 | }; |
| 521 | }; |
| 522 | |
| 523 | spi1 { |
| 524 | pinctrl_spi1: spi1-0 { |
| 525 | atmel,pins = |
| 526 | <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ |
| 527 | AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ |
| 528 | AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ |
| 529 | }; |
| 530 | }; |
| 531 | |
| 532 | ssc0 { |
| 533 | pinctrl_ssc0_tx: ssc0_tx { |
| 534 | atmel,pins = |
| 535 | <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ |
| 536 | AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ |
| 537 | AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ |
| 538 | }; |
| 539 | |
| 540 | pinctrl_ssc0_rx: ssc0_rx { |
| 541 | atmel,pins = |
| 542 | <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ |
| 543 | AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ |
| 544 | AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ |
| 545 | }; |
| 546 | }; |
| 547 | |
| 548 | ssc1 { |
| 549 | pinctrl_ssc1_tx: ssc1_tx { |
| 550 | atmel,pins = |
| 551 | <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ |
| 552 | AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ |
| 553 | AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ |
| 554 | }; |
| 555 | |
| 556 | pinctrl_ssc1_rx: ssc1_rx { |
| 557 | atmel,pins = |
| 558 | <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ |
| 559 | AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ |
| 560 | AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ |
| 561 | }; |
| 562 | }; |
| 563 | |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 564 | usart0 { |
| 565 | pinctrl_usart0: usart0-0 { |
| 566 | atmel,pins = |
| 567 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */ |
| 568 | AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */ |
| 569 | }; |
| 570 | |
| 571 | pinctrl_usart0_rts_cts: usart0_rts_cts-0 { |
| 572 | atmel,pins = |
| 573 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ |
| 574 | AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ |
| 575 | }; |
| 576 | }; |
| 577 | |
| 578 | usart1 { |
| 579 | pinctrl_usart1: usart1-0 { |
| 580 | atmel,pins = |
| 581 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */ |
| 582 | AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */ |
| 583 | }; |
| 584 | |
| 585 | pinctrl_usart1_rts_cts: usart1_rts_cts-0 { |
| 586 | atmel,pins = |
| 587 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ |
| 588 | AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ |
| 589 | }; |
| 590 | }; |
| 591 | |
| 592 | usart2 { |
| 593 | pinctrl_usart2: usart2-0 { |
| 594 | atmel,pins = |
| 595 | <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */ |
| 596 | AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */ |
| 597 | }; |
| 598 | |
| 599 | pinctrl_usart2_rts_cts: usart2_rts_cts-0 { |
| 600 | atmel,pins = |
| 601 | <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ |
| 602 | AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ |
| 603 | }; |
| 604 | }; |
| 605 | |
| 606 | usart3 { |
| 607 | pinctrl_usart3: usart3-0 { |
| 608 | atmel,pins = |
| 609 | <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */ |
| 610 | AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */ |
| 611 | }; |
| 612 | |
| 613 | pinctrl_usart3_rts_cts: usart3_rts_cts-0 { |
| 614 | atmel,pins = |
| 615 | <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ |
| 616 | AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ |
| 617 | }; |
| 618 | }; |
| 619 | |
| 620 | |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 621 | pioA: gpio@fffff200 { |
| 622 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| 623 | reg = <0xfffff200 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 624 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 625 | #gpio-cells = <2>; |
| 626 | gpio-controller; |
| 627 | interrupt-controller; |
| 628 | #interrupt-cells = <2>; |
| 629 | }; |
| 630 | |
| 631 | pioB: gpio@fffff400 { |
| 632 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| 633 | reg = <0xfffff400 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 634 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 635 | #gpio-cells = <2>; |
| 636 | gpio-controller; |
| 637 | interrupt-controller; |
| 638 | #interrupt-cells = <2>; |
| 639 | }; |
| 640 | |
| 641 | pioC: gpio@fffff600 { |
| 642 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| 643 | reg = <0xfffff600 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 644 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 645 | #gpio-cells = <2>; |
| 646 | gpio-controller; |
| 647 | interrupt-controller; |
| 648 | #interrupt-cells = <2>; |
| 649 | }; |
| 650 | |
| 651 | pioD: gpio@fffff800 { |
| 652 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| 653 | reg = <0xfffff800 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 654 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 655 | #gpio-cells = <2>; |
| 656 | gpio-controller; |
| 657 | interrupt-controller; |
| 658 | #interrupt-cells = <2>; |
| 659 | }; |
| 660 | |
| 661 | pioE: gpio@fffffa00 { |
| 662 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| 663 | reg = <0xfffffa00 0x100>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 664 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 665 | #gpio-cells = <2>; |
| 666 | gpio-controller; |
| 667 | interrupt-controller; |
| 668 | #interrupt-cells = <2>; |
| 669 | }; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 670 | }; |
| 671 | |
| 672 | pmc: pmc@fffffc00 { |
| 673 | compatible = "atmel,at91rm9200-pmc"; |
| 674 | reg = <0xfffffc00 0x120>; |
| 675 | }; |
| 676 | |
| 677 | rstc@fffffe00 { |
| 678 | compatible = "atmel,at91sam9g45-rstc"; |
| 679 | reg = <0xfffffe00 0x10>; |
| 680 | }; |
| 681 | |
| 682 | pit: timer@fffffe30 { |
| 683 | compatible = "atmel,at91sam9260-pit"; |
| 684 | reg = <0xfffffe30 0xf>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 685 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 686 | }; |
| 687 | |
| 688 | watchdog@fffffe40 { |
| 689 | compatible = "atmel,at91sam9260-wdt"; |
| 690 | reg = <0xfffffe40 0x10>; |
| 691 | status = "disabled"; |
| 692 | }; |
| 693 | |
| 694 | rtc@fffffeb0 { |
| 695 | compatible = "atmel,at91rm9200-rtc"; |
| 696 | reg = <0xfffffeb0 0x30>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 697 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 698 | }; |
| 699 | }; |
| 700 | |
| 701 | usb0: gadget@00500000 { |
| 702 | #address-cells = <1>; |
| 703 | #size-cells = <0>; |
| 704 | compatible = "atmel,at91sam9rl-udc"; |
| 705 | reg = <0x00500000 0x100000 |
| 706 | 0xf8030000 0x4000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 707 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 708 | status = "disabled"; |
| 709 | |
| 710 | ep0 { |
| 711 | reg = <0>; |
| 712 | atmel,fifo-size = <64>; |
| 713 | atmel,nb-banks = <1>; |
| 714 | }; |
| 715 | |
| 716 | ep1 { |
| 717 | reg = <1>; |
| 718 | atmel,fifo-size = <1024>; |
| 719 | atmel,nb-banks = <3>; |
| 720 | atmel,can-dma; |
| 721 | atmel,can-isoc; |
| 722 | }; |
| 723 | |
| 724 | ep2 { |
| 725 | reg = <2>; |
| 726 | atmel,fifo-size = <1024>; |
| 727 | atmel,nb-banks = <3>; |
| 728 | atmel,can-dma; |
| 729 | atmel,can-isoc; |
| 730 | }; |
| 731 | |
| 732 | ep3 { |
| 733 | reg = <3>; |
| 734 | atmel,fifo-size = <1024>; |
| 735 | atmel,nb-banks = <2>; |
| 736 | atmel,can-dma; |
| 737 | }; |
| 738 | |
| 739 | ep4 { |
| 740 | reg = <4>; |
| 741 | atmel,fifo-size = <1024>; |
| 742 | atmel,nb-banks = <2>; |
| 743 | atmel,can-dma; |
| 744 | }; |
| 745 | |
| 746 | ep5 { |
| 747 | reg = <5>; |
| 748 | atmel,fifo-size = <1024>; |
| 749 | atmel,nb-banks = <2>; |
| 750 | atmel,can-dma; |
| 751 | }; |
| 752 | |
| 753 | ep6 { |
| 754 | reg = <6>; |
| 755 | atmel,fifo-size = <1024>; |
| 756 | atmel,nb-banks = <2>; |
| 757 | atmel,can-dma; |
| 758 | }; |
| 759 | |
| 760 | ep7 { |
| 761 | reg = <7>; |
| 762 | atmel,fifo-size = <1024>; |
| 763 | atmel,nb-banks = <2>; |
| 764 | atmel,can-dma; |
| 765 | }; |
| 766 | |
| 767 | ep8 { |
| 768 | reg = <8>; |
| 769 | atmel,fifo-size = <1024>; |
| 770 | atmel,nb-banks = <2>; |
| 771 | }; |
| 772 | |
| 773 | ep9 { |
| 774 | reg = <9>; |
| 775 | atmel,fifo-size = <1024>; |
| 776 | atmel,nb-banks = <2>; |
| 777 | }; |
| 778 | |
| 779 | ep10 { |
| 780 | reg = <10>; |
| 781 | atmel,fifo-size = <1024>; |
| 782 | atmel,nb-banks = <2>; |
| 783 | }; |
| 784 | |
| 785 | ep11 { |
| 786 | reg = <11>; |
| 787 | atmel,fifo-size = <1024>; |
| 788 | atmel,nb-banks = <2>; |
| 789 | }; |
| 790 | |
| 791 | ep12 { |
| 792 | reg = <12>; |
| 793 | atmel,fifo-size = <1024>; |
| 794 | atmel,nb-banks = <2>; |
| 795 | }; |
| 796 | |
| 797 | ep13 { |
| 798 | reg = <13>; |
| 799 | atmel,fifo-size = <1024>; |
| 800 | atmel,nb-banks = <2>; |
| 801 | }; |
| 802 | |
| 803 | ep14 { |
| 804 | reg = <14>; |
| 805 | atmel,fifo-size = <1024>; |
| 806 | atmel,nb-banks = <2>; |
| 807 | }; |
| 808 | |
| 809 | ep15 { |
| 810 | reg = <15>; |
| 811 | atmel,fifo-size = <1024>; |
| 812 | atmel,nb-banks = <2>; |
| 813 | }; |
| 814 | }; |
| 815 | |
| 816 | usb1: ohci@00600000 { |
| 817 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 818 | reg = <0x00600000 0x100000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 819 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 820 | status = "disabled"; |
| 821 | }; |
| 822 | |
| 823 | usb2: ehci@00700000 { |
| 824 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
| 825 | reg = <0x00700000 0x100000>; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 826 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 827 | status = "disabled"; |
| 828 | }; |
| 829 | |
| 830 | nand0: nand@60000000 { |
| 831 | compatible = "atmel,at91rm9200-nand"; |
| 832 | #address-cells = <1>; |
| 833 | #size-cells = <1>; |
Josh Wu | 8ae599e | 2013-06-05 19:17:31 +0800 | [diff] [blame] | 834 | ranges; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 835 | reg = < 0x60000000 0x01000000 /* EBI CS3 */ |
| 836 | 0xffffc070 0x00000490 /* SMC PMECC regs */ |
| 837 | 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */ |
Josh Wu | afa6a2a | 2013-08-23 14:27:41 +0800 | [diff] [blame] | 838 | 0x00110000 0x00018000 /* ROM code */ |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 839 | >; |
Jean-Christophe PLAGNIOL-VILLARD | 5e8b3bc | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 840 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 841 | atmel,nand-addr-offset = <21>; |
| 842 | atmel,nand-cmd-offset = <22>; |
| 843 | pinctrl-names = "default"; |
| 844 | pinctrl-0 = <&pinctrl_nand0_ale_cle>; |
Josh Wu | afa6a2a | 2013-08-23 14:27:41 +0800 | [diff] [blame] | 845 | atmel,pmecc-lookup-table-offset = <0x0 0x8000>; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 846 | status = "disabled"; |
Josh Wu | 8ae599e | 2013-06-05 19:17:31 +0800 | [diff] [blame] | 847 | |
| 848 | nfc@70000000 { |
| 849 | compatible = "atmel,sama5d3-nfc"; |
| 850 | #address-cells = <1>; |
| 851 | #size-cells = <1>; |
| 852 | reg = < |
| 853 | 0x70000000 0x10000000 /* NFC Command Registers */ |
| 854 | 0xffffc000 0x00000070 /* NFC HSMC regs */ |
| 855 | 0x00200000 0x00100000 /* NFC SRAM banks */ |
| 856 | >; |
| 857 | }; |
Ludovic Desroches | 655ff266 | 2013-03-22 13:24:13 +0000 | [diff] [blame] | 858 | }; |
| 859 | }; |
| 860 | }; |